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SR FlipFlop MCQ With Answers

The document contains 20 multiple-choice questions (MCQs) focused on the S-R flip-flop, covering its definitions, outputs, conditions, and applications. Each question is accompanied by the correct answer and a brief explanation. Key concepts include the behavior of S-R flip-flops under different input conditions and their role in digital circuits.

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0% found this document useful (0 votes)
11 views5 pages

SR FlipFlop MCQ With Answers

The document contains 20 multiple-choice questions (MCQs) focused on the S-R flip-flop, covering its definitions, outputs, conditions, and applications. Each question is accompanied by the correct answer and a brief explanation. Key concepts include the behavior of S-R flip-flops under different input conditions and their role in digital circuits.

Uploaded by

kharagpursdo
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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20 Important MCQs on S-R Flip-Flop with Answers and Explanations

1. What does the S-R flip-flop stand for?

A) Set-Reset

B) Serial-Register

C) Shift-Register

D) Start-Reset

Answer: A) Set-Reset

Explanation: S-R flip-flop stands for Set and Reset, which are its two inputs.

2. What is the output when S=1 and R=0 in an S-R flip-flop?

A) Q = 0

B) Q = 1

C) Q toggles

D) Invalid

Answer: B) Q = 1

Explanation: This is the Set condition, so output Q is set to 1.

3. What is the output when S=0 and R=1?

A) Q = 1

B) Q toggles

C) Q = 0

D) Invalid

Answer: C) Q = 0

Explanation: This is the Reset condition, so output Q becomes 0.

4. What is the output when S=0 and R=0?

A) Set

B) Reset

C) Toggle

D) No change

Answer: D) No change

Explanation: When both S and R are 0, the output retains its previous state.

5. What is the condition when both S=1 and R=1?

A) Set

B) Reset
C) Toggle

D) Invalid

Answer: D) Invalid

Explanation: In a basic S-R flip-flop, this causes an undefined or invalid state.

6. What are the outputs of an S-R flip-flop usually called?

A) A and B

B) Q and Q'

C) X and Y

D) D and T

Answer: B) Q and Q'

Explanation: The outputs are Q (normal) and Q' (complement).

7. In an S-R flip-flop, Q and Q' are always:

A) Equal

B) Zero

C) Complementary

D) Undefined

Answer: C) Complementary

Explanation: Q and Q' are always opposite unless in an invalid state.

8. Which logic gates are used to build a basic S-R flip-flop?

A) XOR gates

B) NOR or NAND gates

C) AND gates

D) NOT gates

Answer: B) NOR or NAND gates

Explanation: S-R flip-flops are commonly built using cross-coupled NOR or NAND gates.

9. What is the purpose of a flip-flop?

A) Perform arithmetic

B) Store binary data

C) Multiply numbers

D) Amplify signals

Answer: B) Store binary data

Explanation: Flip-flops store one bit of binary information.


10. What type of circuit is an S-R flip-flop?

A) Combinational

B) Arithmetic

C) Sequential

D) Transient

Answer: C) Sequential

Explanation: Flip-flops are sequential circuits as their output depends on current input and previous state.

11. What is the next state of Q for S=1, R=0, and current Q=0?

A) 0

B) 1

C) Toggle

D) Invalid

Answer: B) 1

Explanation: Since S=1 and R=0, the flip-flop sets Q to 1, regardless of its previous state.

12. What happens if both S and R inputs stay at 1 for a long time in NOR-based S-R flip-flop?

A) Q will toggle

B) It remains set

C) Invalid or unpredictable behavior

D) Reset occurs

Answer: C) Invalid or unpredictable behavior

Explanation: S=1 and R=1 in a NOR-based S-R flip-flop is an invalid state.

13. What is the role of the clock in a clocked S-R flip-flop?

A) Adds power

B) Resets the flip-flop

C) Controls timing of data transfer

D) Removes invalid states

Answer: C) Controls timing of data transfer

Explanation: The clock signal controls when the flip-flop should respond to S and R inputs.

14. A gated S-R flip-flop only changes state when:

A) S=0, R=0

B) Clock = 0

C) Clock = 1

D) Q = Q'
Answer: C) Clock = 1

Explanation: A gated flip-flop responds only when the clock input is active (often logic 1).

15. The S-R latch with NAND gates has what difference from one made with NOR gates?

A) No difference

B) Reversed logic levels

C) Cannot store data

D) Has 3 states

Answer: B) Reversed logic levels

Explanation: A NAND-based S-R flip-flop uses active-low inputs (logic 0 sets/resets).

16. Which of the following is a limitation of the basic S-R flip-flop?

A) No outputs

B) Expensive

C) Invalid state when S=1 and R=1

D) Always resets

Answer: C) Invalid state when S=1 and R=1

Explanation: The major limitation is the undefined output when both inputs are 1.

17. What is used to eliminate the invalid state in S-R flip-flops?

A) NOT gate

B) D Flip-Flop

C) Toggle switch

D) Op-amp

Answer: B) D Flip-Flop

Explanation: D Flip-Flop is designed to avoid the invalid condition by having only one input.

18. What is the basic storage element in sequential logic circuits?

A) AND gate

B) Flip-Flop

C) Diode

D) Comparator

Answer: B) Flip-Flop

Explanation: Flip-flops are the fundamental building blocks for memory in digital circuits.

19. An S-R flip-flop can be used to implement which of the following?

A) Counter
B) Decoder

C) Oscillator

D) Buffer

Answer: A) Counter

Explanation: Flip-flops are used to build counters and registers in sequential circuits.

20. Which one of the following is TRUE for S-R flip-flop made with NOR gates?

A) S=1, R=1 sets the flip-flop

B) S=0, R=0 causes toggle

C) S=0, R=0 causes no change

D) S=1, R=0 resets it

Answer: C) S=0, R=0 causes no change

Explanation: When both inputs are 0, the output remains in its previous state.

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