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Programmable Logic Devices - Updated

Programmable Logic Devices (PLDs) are integrated circuits that can be configured to perform various logical functions through programming, which refers to hardware programming. There are three main types of PLDs: Programmable Read Only Memory (PROM), Programmable Logic Array (PLA), and Programmable Array Logic (PAL), each with distinct features regarding their programmable arrays. PROM allows for one-time programming, PLA has programmable AND and OR arrays, and PAL has a programmable AND array with a fixed OR array, making PAL easier to program but less flexible than PLA.

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0% found this document useful (0 votes)
5 views19 pages

Programmable Logic Devices - Updated

Programmable Logic Devices (PLDs) are integrated circuits that can be configured to perform various logical functions through programming, which refers to hardware programming. There are three main types of PLDs: Programmable Read Only Memory (PROM), Programmable Logic Array (PLA), and Programmable Array Logic (PAL), each with distinct features regarding their programmable arrays. PROM allows for one-time programming, PLA has programmable AND and OR arrays, and PAL has a programmable AND array with a fixed OR array, making PAL easier to program but less flexible than PLA.

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Programmable Logic Devices

What is a Programmable Logic Device?


• Programmable Logic Devices (PLDs) are the integrated circuits.
• Programmable Logic Devices (PLDs) are a collection of
integrated circuits which are configured to perform various
logical functions.
• They contain an array of AND gates & another array of OR gates.
• The process of entering the information into these devices is known
as programming.
• users can program these devices or ICs electrically in order to implement
the Boolean functions based on the requirement.
• The term programming refers to hardware programming but not software
programming.
• There are three kinds of PLDs based on the type of array(s), which has
programmable feature.
• Programmable Read Only Memory
• Programmable Array Logic
• Programmable Logic Array
Programmable Read Only Memory (PROM)

• Read Only Memory (ROM) is a memory device, which stores the binary
information permanently. That means, we cant change that stored
information by any means later.
• If the ROM has programmable feature, then it is called as Programmable
ROM (PROM).
• The user has the flexibility to program the binary information electrically
once by using PROM programmer.
• PROM is a programmable logic device that has fixed AND array &
Programmable OR array.
PROM is a programmable logic device that has fixed AND array &
Programmable OR array. The block diagram of PROM is shown in the
following figure.
Programmable Read Only Memory (PROM)

Let us implement the following Boolean functions using PROM.


A(X,Y,Z)=∑m(5,6,7)
B(X,Y,Z)=∑m(3,5,6,7)
The given two functions are in sum of min terms form
and each function is having three variables X, Y & Z.
So, we require a 3 to 8 decoder and two programmable OR gates for
producing these two functions.
The corresponding PROM is shown in the following figure.
Programmable Read Only Memory (PROM)
• 3 to 8 decoder generates eight
min terms.
• The two programmable OR gates
have the access of all these min
terms.
• only the required min terms are
programmed in order to produce
the respective Boolean functions
by each OR gate.
• The symbol X is used for
programmable connections.
Programmable Logic Array (PLA)

• The programmable logic array (PLA) is a type of programmable logic


device (PLD).
• PLA is the first PLD device.
• It contains an array/matrix of AND and OR gates whose configuration
is done as per the needs of applications.
• In a PLA, a set of fusible links is used to establish or remove the
contact of a literal in the AND operation or contact of a product term
in the OR operation.
• PLA is a type of PLD that allows both AND matrix and OR matrix to
program.
Block Diagram of PLA:
• Programmable logic array (PLA) is a type of fixed architecture.
• programmable logic device (PLD) which consists of
programmable AND and OR gates.
• A PLA contains a programmable AND array which is followed by
a programmable OR array.
It consists of the following main components −
• Input Buffer :
The input buffer is used in PLA to avoid the loading effect on the source that drives
the inputs.
• AND Array/Matrix :
The AND array/matrix is used in PLA to generate the product terms.
• OR Array/Matrix :
In a PLA, the OR array/matrix is used to generate the desired output. This is done by
Oring the product terms to produce the sum terms.
• Invert/Non-Invert Matrix :
It is a buffer used in PLAs to set the output to active-high or active-low.
• Output Buffer :
• This buffer is used at the output side. It is mainly provided to increase the driving
capability of the programmable logic array (PLA).
Combinational Logic Design using PLA

The step-by-step procedure to design a combinational logic circuit using PLAs


is explained below −
Step 1 − Develop a PLA program table that shows the inputs, product terms,
and outputs.
Step 2 − Design the AND matrix that can generate the desired product terms.
Step 3 − Design the OR matrix that can generate the desired output.
Step 4 − Design the invert/non-invert matrix to set the active-low or active-
high output.
Step 5 − Finally, program the PLA by utilizing the PLA program table.
Design a full-adder circuit using
programmable logic array (PLA).
Solution
• A full-adder consists of three-inputs and two outputs.
Since it has 3 inputs, thus there are total 8 product
terms which are given in the following truth table of the
full adder −
From these two Boolean
expressions, there are seven
product terms and two sum
terms.
• The PLA program table for this full-adder circuit is shown

In this PLA program table, "1" stands for the connection and "-" stands for the absence of
the product term in the output. "T" stands for true and it represents the active-high
output.
The PLA circuit diagram of the full-adder is shown
in the following figure.
Programmable Array Logic (PAL)

• The primary difference between PLA and PAL is that in a PLA device, both AND
array and OR array are programmable, whereas in the case of PAL, the OR
array is fixed while the AND array is programmable.
• A programmable array logic (PAL) also consists of arrays of AND and OR gates.
• The most significant advantage that the PAL has is that it is very easy to
program, as it contains only a programmable AND gate array, although it is not
as flexible as the PLA.
What is a PAL?
• In the field of digital electronics, there are several different types of
programmable logic devices or PLDs.
• The Programmable Array Logic (PAL) is also a type of PLD used to design and
implement a variety of custom logic functions.
• These programmable array logic devices allow digital designers to develop
complex logic structures with high flexibility and efficiency.
• Construction-wise, a PAL device consists of an array of programmable AND
gates connected to a fixed array of OR gates. This array structure helps to
implement various logic functions by interconnecting the input lines, AND
gates and OR gates.
Block Diagram of PAL
• The Programmable Array Logic (PAL) is also a type of fixed architecture
logic device having an array of programmable AND gates and an array of
fixed OR gates as shown in the following figure −

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