Programmable Logic Devices - Updated
Programmable Logic Devices - Updated
• Read Only Memory (ROM) is a memory device, which stores the binary
information permanently. That means, we cant change that stored
information by any means later.
• If the ROM has programmable feature, then it is called as Programmable
ROM (PROM).
• The user has the flexibility to program the binary information electrically
once by using PROM programmer.
• PROM is a programmable logic device that has fixed AND array &
Programmable OR array.
PROM is a programmable logic device that has fixed AND array &
Programmable OR array. The block diagram of PROM is shown in the
following figure.
Programmable Read Only Memory (PROM)
In this PLA program table, "1" stands for the connection and "-" stands for the absence of
the product term in the output. "T" stands for true and it represents the active-high
output.
The PLA circuit diagram of the full-adder is shown
in the following figure.
Programmable Array Logic (PAL)
• The primary difference between PLA and PAL is that in a PLA device, both AND
array and OR array are programmable, whereas in the case of PAL, the OR
array is fixed while the AND array is programmable.
• A programmable array logic (PAL) also consists of arrays of AND and OR gates.
• The most significant advantage that the PAL has is that it is very easy to
program, as it contains only a programmable AND gate array, although it is not
as flexible as the PLA.
What is a PAL?
• In the field of digital electronics, there are several different types of
programmable logic devices or PLDs.
• The Programmable Array Logic (PAL) is also a type of PLD used to design and
implement a variety of custom logic functions.
• These programmable array logic devices allow digital designers to develop
complex logic structures with high flexibility and efficiency.
• Construction-wise, a PAL device consists of an array of programmable AND
gates connected to a fixed array of OR gates. This array structure helps to
implement various logic functions by interconnecting the input lines, AND
gates and OR gates.
Block Diagram of PAL
• The Programmable Array Logic (PAL) is also a type of fixed architecture
logic device having an array of programmable AND gates and an array of
fixed OR gates as shown in the following figure −