BJT

• In 1947, John Bardeen, Walter Brattain, and William Shockley along with Bell
Laboratories successfully developed the first point-contact transistor, a precursor to the
BJT & they received Nobel Prize for this invention.
• A Bipolar Junction Transistor (BJT) is a crucial component in the field of electronics.
• A bipolar junction transistor (BJT) is a three-terminal device in which operation depends
on the interaction of both majority and minority carriers and hence the name bipolar.
• The BJT is analogues to vacuum triode and is comparatively smaller in size.
• It is used as amplifier and oscillator circuits, and as a switch in digital circuits. It has wide
applications in computers, satellites and other modern communication systems.

BJT Construction
The Bipolar Transistor basic construction consists of two PN-junctions producing three connecting
terminals with each terminal being given a name to identify it from the other two. These three
terminals are known and labelled as the Emitter ( E ), the Base ( B ) and the Collector ( C )
respectively. There are two basic types of bipolar transistor construction, PNP and NPN, which
basically describes the physical arrangement of the P-type and N-type semiconductor materials
from which they are made.
Physical representations of the two types of BJTs are shown in Figure 4. NPN type consists of two
n regions separated by a p region, and the PNP type consists of two p regions separated by n region.
The term bipolar refers to the use of both holes and electrons as current carriers in the transistor
structure.

Figure:1
The three terminals drawn from the transistor indicate Emitter, Base and Collector terminals. They
have their functionality as discussed below.

Emitter:
• The left-hand side of the above shown structure can be understood as Emitter.
• This has a moderate size and is heavily doped as its main function is to supply a number
of majority carriers, i.e. either electrons or holes.
• As this emits electrons, it is called as an Emitter.
 • This is simply indicated with the letter E.
Base:
• The middle material in the above figure is the Base.
• This is thin and lightly doped.
• Its main function is to pass the majority carriers from the emitter to the collector.
• This is indicated by the letter B.
Collector:
• The right-side material in the above figure can be understood as a Collector.
• Its name implies its function of collecting the carriers.
• This is larger in size than emitter and base & it is moderately doped.
• This is indicated by the letter C.
The symbols of PNP and NPN transistors are as shown below.

Figure:2
Arrowhead shows the direction of conventional current from p to n-Type. Terminal with arrow
identifies the Emitter.
Transistor Biasing:
• A transistor is a combination of two diodes, we have two junctions as shown in figure 1.
As one junction is between the emitter and base, that is called as Emitter-Base junction and
likewise, the other is Collector-Base junction.
• Biasing is controlling the operation of the circuit by providing power supply. The function
of both the PN junctions is controlled by providing bias to the circuit through some dc
supply. The figure below shows how a transistor is biased.
 Figure:3
• The N-type material is provided negative supply and P-type material is given positive
supply to make the circuit Forward bias.
• The N-type material is provided positive supply and P-type material is given negative
supply to make the circuit Reverse bias.
Operation of PNP Transistor:
The basic operation of the transistor will now be described using the pnp transistor. Here emitter-
base junction is forward biased and collector-base junction is reverse biased.

Figure: 5
• The voltage VEE provides a positive potential at the emitter which repels the holes in the
P type material and these holes cross the emitter-base junction, to reach the base region.
• There a very low percent of holes re-combine with free electrons of N-region. This provides
very low current which constitutes the base current IB.
• The remaining holes cross the collector-base junction, to constitute collector current IC,
which is the hole current.
• As a hole reaches the collector terminal, an electron from the battery negative terminal fills
the space in the collector. This flow slowly increases and the electron minority current
flows through the emitter, where each electron entering the positive terminal of VEE, is
replaced by a hole by moving towards the emitter junction. This constitutes emitter current
IE.
Point to remember:
➢ The conduction in a PNP transistor takes place through holes (Majority charge carriers).
➢ The collector current is slightly less than the emitter current.
➢ The increase or decrease in the emitter current affects the collector current.
Operation of PNP Transistor:
The operation of the npn transistor is exactly the same if the roles played by the electron and hole
are interchanged. Here we are describing operation of the npn transistor. The emitter-base junction
is forward biased and collector-base junction is reverse biased.
 Figure: 6
• The voltage VEE provides a negative potential at the emitter which repels the electrons in
the N-type material and these electrons cross the emitter-base junction, to reach the base
region.
• There, a very low percent of electrons re-combine with free holes of P-region. This
provides very low current which constitutes the base current IB.
• The remaining holes cross the collector-base junction, to constitute the collector current
IC.
• As an electron reaches out of the collector terminal, and enters the positive terminal of the
battery, an electron from the negative terminal of the battery VEE enters the emitter region.
This flow slowly increases and the electron current flows through the transistor.
Point to remember:
➢ The conduction in a NPN transistor takes place through electrons (Majority charge
carriers).
➢ The collector current is higher than the emitter current.
➢ The increase or decrease in the emitter current affects the collector current.
DIFFERENT MODES OF OPERATION OF TRANSISTOR:
There are four modes in which a transistor can be operated.
1. Cut-off mode
2. Saturation mode
3. Active mode
4. Reverse Active mode
Mode EBJ(Emitter-base Jn) CBJ (Collector-base Jn)
Cut-off mode Reverse Bias Reverse Bias
Saturation mode Forward Bias Forward Bias
Active mode Forward Bias Reverse Bias
Reverse Active mode Reverse Bias Forward Bias

Transistor Configurations:
A transistor can be used as a two-port network. Two port networks have two input and two output
terminals. The BJT is used as a two-port network by grounding i.e. by making one of the terminals
common between input and output.
1. Common Base Configuration - has Voltage Gain but no Current Gain.
2. Common Emitter Configuration - has both Current and Voltage Gain.
3. Common Collector Configuration - has Current Gain but no Voltage Gain.
Common Base Configuration (CB): Here base terminal is made common between input and
output by grounding it as shown in the figure. VBB is used to forward the bias base to the emitter
junction while VCC is used to reverse the bias base to the collector junction.

Figure:7
Forward biasing of the emitter junction results in the emission of charge carriers for the conduction
process. When electrons travel from the emitter to the collector, free electrons recombine with
holes available in the base region, while the remaining electrons are transferred to the collector.
IC = α IE
𝐼𝑐(𝐶𝑜𝑙𝑙𝑒𝑐𝑡𝑜𝑟 𝐶𝑢𝑟𝑟𝑒𝑛𝑡 )
α=
𝐼𝐸(𝐸𝑚𝑖𝑡𝑡𝑒𝑟 𝐶𝑢𝑟𝑟𝑒𝑛𝑡)

where α is proportionality constant, in other words common base current amplification factor.
CHARACTERISTICS OF CB CONFIGURATION:
The performance of transistors determined from their characteristic curves that relate different d.c
currents and voltages of a transistor. Such curves are known as static characteristics curves. There
are two important characteristics of a transistor:
1. Input characteristics
2. Output characteristics
Input characteristics
The curve drawn between emitter current and emitter – base voltage for a given value of collector
– base voltage is known as input characteristics.
 Figure:8 Input characteristics of CB configuration
Base width modulation (Early effect)
In a transistor, since the emitter – base junction is forward biased there is no effect on the width
of the depletion region. However, since collector – base junction is reverse biased as the reverse
bias voltage across the collector – base junction increases the width of the depletion region also
increases. Since the base is lightly doped the depletion region penetrates deeper into the base
region. This reduces the effective width of the base region. This variation or modulation of the
effective base width by the collector voltage is known as base width modulation or early effect.
The decrease in base width by the collector voltage has the following three effects.
It reduces the chances of recombination of electrons with the holes in the base region Hence
current gain increases with increase in collector – base voltage.
Output characteristics
The curve drawn between collector current and collector – base voltage, for a given value of
emitter current is known as output characteristics.

Figure:9 Output characteristics of CB configuration

COMMON – EMITTER(CE) CONFIGURATION:
The input is connected between base and emitter, while output is connected between collector and
emitter. Emitter is common to both input and output circuits. The bias voltage applied are Vce and
Vbe. The emitter-base junction is forward biased and collector-emitter junction is reverse biased.
The base current Ib flows in the input circuit and collector current Ic flows in the output circuit.
CE is commonly used because its current, Voltage, Power gain are quite high and output to input
impedance ratio is moderate.

Figure:10 CE configuration
The rate of change in collector current to change in base current is called amplification factor β.
The current gain in the common-emitter circuit is called BETA (β). Beta is the relationship of
collector current (output current) to base current (input current).
𝐼𝑐(𝐶𝑜𝑙𝑙𝑒𝑐𝑡𝑜𝑟 𝐶𝑢𝑟𝑟𝑒𝑛𝑡 )
β=
𝐼𝑏(𝐵𝑎𝑠𝑒 𝐶𝑢𝑟𝑟𝑒𝑛𝑡)

Input Characteristics:
The input characteristics of common emitter configuration are obtained between input current IB
and input voltage VBE with constant output voltage VCE. Keep the output voltage VCE constant
and vary the input voltage VBE for different points, now record the values of input current at each
point. Now using these values draw a graph between the values of IB and VBE at constant VCE.

Figure:11 Input characteristics of CE configuration

Output Characteristics:
The output characteristics of common emitter configuration are obtained between the output
current IC and output voltage VCE with constant input current IB. Keep the base current IB constant
and vary the value of output voltage VCE for different points, now note down the value of
collector IC for each point. Plot the graph between the parameters IC and VCE in order to get the
output characteristics of common emitter configuration.

Figure:12 Output characteristics of CE configuration

Relationship in between α and β:
A relationship can be developed between and using the basic relationships introduced thus far.
Using β=IC/IB, we have IB = IC/β, and from α=IC/IE, we have IE= IC/α. Substituting the current
relations in following equation
IE = IC + IB
𝐼𝑐 𝐼𝑐
= 𝐼𝑐 +
𝛼 𝛽
now dividing both sides of the equation by IC
1 1
= 1+
𝛼 𝛽
Or
𝛽
α =𝛽+1

or
1
β = 1−𝛼

Common Collector Configuration (CC):

In this configuration collector terminal as common for both input and output signals. This
configuration is also known as emitter follower configuration because the emitter voltage follows
the base voltage. This configuration is mostly used as a buffer and impedance matching
applications because of their high input impedance. In this configuration the input signal is applied
between the base-collector region and the output is taken from the emitter-collector region. Here
the input parameters are VBC and IB and the output parameters are VEC and IE. The common
collector configuration has high input impedance and low output impedance. The input and output
signals are in phase.

Figure:13 CC Configuration
Common collector current gain is-
𝐼𝐸(𝐸𝑚𝑖𝑡𝑡𝑒𝑟 𝐶𝑢𝑟𝑟𝑒𝑛𝑡)
ϒ = 𝐼𝑏(𝐵𝑎𝑠𝑒 𝐶𝑢𝑟𝑟𝑒𝑛𝑡)

ϒ = 1+β

Input Characteristics:
The input characteristics of a common-collector configuration are obtained between inputs current
IB and the input voltage VCB at constant output voltage VEC. Keep the output voltage VEC
constant at different levels and vary the input voltage VBC for different points and record the IB
values for each point. Now using these values, draw a graph between the parameters of VBC and
IB at constant VEC. (Vce1< Vce2 )

Figure:14 Input characteristics of CC configuration

Output Characteristics:
The operation of the common collector circuit is same as that of common emitter circuit. The
output characteristics of a common collector circuit are obtained between the output voltage VEC
and output current IE at constant input current IB. In the operation of common collector circuit if
the base current is zero then the emitter current also becomes zero. As a result, no current flows
through the transistor. If the base current increases, then the transistor operates in active region
and finally reaches to saturation region.
To plot the graph, keep the IB at constant value and vary the VEC value for various points, now
record the value of IE for each point. Repeat the same process for different IB values. Now using
these values, plot the graph between the parameters of IE and VCE at constant values of IB. The
below figure shows the output characteristics of common collector.

Figure:15 Output characteristics of CC configuration

 DC Biasing of Transistor
OPERATING POINT:
The term biasing is an all-inclusive term for the application of dc voltages to establish a fixed level
of current and voltage. For transistor amplifiers the resulting dc current and voltage establish an
operating point on the characteristics that define the region that will be employed for amplification
of the applied signal. Since the operating point is a fixed point on the characteristics, it is also
called the quiescent point (abbreviated Q-point). The biasing circuit can be designed to set the
device operation at any of these points or others within the active region. The maximum ratings
are indicated on the characteristics shown in the Figure below by a vertical line for the maximum
collector current ICmax and a horizontal line at the maximum collector-to-emitter voltage
VCEmax .

Figure:16 Various operating points

The BJT device could be biased to operate outside these maximum limits, but the result of such
operation would be either a considerable shortening of the lifetime of the device or destruction of
the device. Confining ourselves to the active region, one can select many different operating areas
or points. The chosen Q-point often depends on the intended use of the circuit.
DC Load Line:
The DC bias point or quiescent point (Q-Point) is the point on the DC load line which represents
the current in a transistor and the voltage across it when no signal is applied i.e., it represents dc
bias conditions. Biasing means the selection of DC or Q-point. The Q-point is selected based on
the application. If a BJT is to be used as an amplifier or as a constant current source, then Q-point
must be in the active region, while for switch or clipper applications the Q-point should be in the
non-linear region. To understand the concept, let us consider the circuit shown in Figure.
 Figure:17
If this circuit is used as an amplifier, then input terminals are base and emitter and output terminals
are collector and emitter i.e. CE configuration. The base-emitter junction is forward biased and the
collector-base junction is reverse-biased.
Vce = Vcc – Ic*Rc
If base voltage VB is such that the transistor is not conducting
Ic = 0,
Vce = Vcc- (0*10K) = 20 V (point A on DC load line)
If Ic is 2 mA
Vce = 0 V (Point B on DC load line)
If Ic is 0.5 mA
Vce = 15 V (Point C on DC load Line)
If Ic is 1 mA
Vce = 10 V (Point D on Dc Load line)

Figure:18 DC Load Line

DC Load line is a straight line superimposed on the output characteristics of the transistor. It gives
voltage across the transistor and current through the transistor. It can be plotted by drawing a
straight line between points A and B only. If a point is plotted such that IC = 1.5 mA and VCE =
10V, it will not appear on the load line. Hence, the load line shows that such a combination of
voltage and current does not exist in the circuit.
Transistor biasing:
Biasing is a technique using which DC operating conditions are adjusted to operate the transistor
in one of the three regions of output characteristics. Bipolar transistors must be properly biased to
operate correctly. The bias circuit stabilizes the operating point of the transistor for variations in
transistor characteristics and operating temperature. A bias network is selected to reduce the effects
of device variability, temperature, and voltage changes. A bias circuit may be composed of only
resistors or may include elements such as temperature-dependent resistors, diodes, or additional
voltage sources, depending on the range of operating conditions expected.
Here, we will study two biasing circuit
➢ Fixed Bias
➢ Voltage divider bias or potential divider
Fixed Bias Circuit:
This form of biasing is also called base bias. In the figure shown below, the single power source
is used for both collector and base of a transistor, although separate batteries can also be used.

Figure:19 Fixed bias circuit without emitter resistance

The analysis of this circuit for the linear region is as follow.
Using KVL:
Vcc - VRb - VBE = 0
VRb = IB*RB substituting this value in above equation
Vcc - IB*RB - VBE = 0
 𝑉𝑐𝑐−𝑉𝑏𝑒
IB = 𝑅𝑏

Using KVL around collector side, we get

Vcc – IC*Rc – VCE = 0
VCE = Vcc – IC*Rc
As we know IC = β IB
𝑉𝑐𝑐−𝑉𝑏𝑒
IC = β (IB = )
𝑅𝑏

In the above equation, IC is dependent on .  varies with temperature and collector current. The
variation in  causes IC and VCE to change, thus changing the Q-point of the transistor. This makes
the base bias circuit extremely -dependent.
Potential divider bias:
The voltage divider is formed using external resistors R1 and R2. The voltage across R2 forward
biases the emitter junction. By proper selection of resistors R1 and R2, the operating point of the
transistor can be made independent of β. In this circuit, the voltage divider holds the base voltage
fixed independent of the base current, provided the divider current is large compared to the base
current. However, even with a fixed base voltage, collector current varies with temperature. Hence,
an emitter resistor is added to stabilize the Q-point.

Figure:20 Potential divider circuit

Above circuit can be simplified as
 Figure:21 Simplified Potential divider circuit
The voltage divider configuration achieves the correct voltages through the use of resistors in
certain patterns. In this circuit, the base voltage is given by:
𝑉𝑐𝑐𝑅2
VB = 𝑅1+𝑅2

&
𝑅1𝑅2
RB = 𝑅1+𝑅2

Advantages:
➢ The operating point is almost independent of β variation.
➢ The operating point stabilized against a shift in temperature.
Small Signal Analysis (Hybrid π model)
Common Collector (CC) circuit:
Hybrid ππ model is a popular circuit model used for analyzing the small signal behavior of bipolar
junction and field effect transistors. Small signal analysis is a common modeling technique that is
used to approximate the behavior of electronic circuits containing nonlinear devices with linear
equations.
Small-signal analysis involve following steps:
1. Finding the quiescent or operating point of a circuit. This is found by zeroing all signal
sources leaving just the DC sources and then solving for the DC voltages and currents in
the circuit.
2. Linearizing the nonlinear circuit elements at the operating point. For example, a diode is
replaced with a resistor that models the dynamic resistance at the particular operating point.
The dynamic, or small-signal resistance is the ratio of the change in voltage to a small
(actually infinitesimal) change in current from the operating point.
3. Finding the small-signal solution. The DC sources are zeroed, the signal sources are
activated, and linear circuit analysis is used to solve for the small-signal voltages and
currents.

The hybrid π model is a linearized two-port network approximation to the BJT using the small-
signal base-emitter voltage, vbe, and collector-emitter voltage, vce, as independent variables, and
the small-signal base current, ib, and collector current, ic, as dependent variables.

Figure:22 Simplified, low-frequency hybrid π BJT model

A basic, low-frequency hybrid π model for the bipolar transistor is shown in above figure. The
various parameters are:
Transconductance:
gm = ic/vbe ( at vce = 0 )
gm =Ic/VT
IC = quiescent collector current (collector bias or DC collector current)
VT = temperature equivalent voltage
Input resistance:
rπ = vbe/ib (at vce=0)
rπ = VT/ IB
rπ = β/ gm
IB = DC base current,
β = current gain
Output resistance:
ro = vce/ib (at vbe=0)
ro ≈VA/ IC.
Analysis steps:
1. Complete a D.C. Analysis
a. We turned off the small-signal voltage source, replacing it with a short circuit.
b. We replaced the capacitor with an open circuit
2. Calculate the small-signal circuit parameters for each BJT.
3. Carefully replace all BJTs with their small-signal circuit model.
4. Set all D.C. sources to zero.
5. Analyze small-signal circuit.

Circuit Analysis
The circuit of the CC configuration is shown below in figure. Since the collector is to be at signal
ground, the collector resistance RC is removed. The input signal is capacitively coupled to the
base, the output signal is capacitively coupled from the emitter to a load resistance RL.

Figure: 23 Common Collector Circuit

Bias current IE will determine gm, rπ, and ro.
Drawing the circuit in its hybrid π equivalent:

Figure 24: CC Configuration (hybrid π equivalent)

Simplifying the above circuit and redrawing

Figure: 25 Simplification of figure 24

The Thevenin equivalent circuit of the encircled portion:

Figure:26 Thevenin equivalent of the circled portion

equivalent voltage and resistance are:
veq = vs RB/(Rs + RB)
Req = RS ǁ RB
To calculate gain (redrawing circuit)
 Figure:27 Using veq and Req in in above circuit
Using KVL,

For calculating input impedance

Figure:28 Calculating Rin

For output resistance calculation,
Rout = vout/iout
We need to calculated vout and iout.
By using KVL in circuit shown in figure 28

using KCL in circuit shown in figure 28, we have

putting the value of vout and iout in original equation of Rout, we get output impedance

Approximating above equation and simplifying it

Consider the CE amplifier circuit.
Circuit of a common emitter amplifier is given below. It consists of two bias dc voltages - Vcc and
VE E . An input voltage VS is applied to the transistor through a resistor RS. C1, C2 are coupling
capacitors and CE is bypass capacitor.

Figure: 29 CE amplifier
Obtain small signal equivalent model following steps may involves
1. D C voltage sources are replaced by ground
2. D C current sources are open circuited
3. Capacitors are shorted

Figure: 30
4. Rearrange the components such as to have a common ground.

Figure: 31
5. Simplify the circuit and insert transistor model
 Figure: 32
For analyzing behavior of a transistor we depends mainly on four parameters:
Input Resistance:
Input resistance of the circuit can be calculated by 'looking into the input side of the circuit' from
the mark as given in figure 33. This is because RS is taken as a source resistance and usually not
consider for input resistance calculation.

Figure: 33
art of the circuit considering for Rin calculation is

Figure: 34
From the above circuit,
Rin = Rb ǁrπ ---------(1)
Normally, we select Rb such that Rb >>rπ .
Then Rin becomes
Rin ≈ rπ ----------- (2)
We can conclude that input resistance of CE amplifier is nearly equal to rπ and its value is
typically few kilo ohms. So CE amplifier has a moderate value of input resistance.
Note: In fig 34, it is clear that Vi = Vπ
Output resistance:
Again to get the output resistance, look into the circuit from right side of arrow.

Figure: 35
Then from the circuit,
Ro =RcǁrO ----------(3)
Typically, Rc << rO .
Therefore, Ro ≈ Rc ----------(4)
Voltage gain:
Voltage gain (Av) is defined as
Av = Vo / Vi
Where, Vo = output voltage &
Vi = input voltage appear across the input terminal (here Base) of the amplifier.
expression for Vi
In figure 34, we get Rin = Rb ǁ rπ . Using this the input side of figure 33 can be redrawn as

Figure: 36
In above figure Vi is the voltage across Rin
 𝑅𝑖𝑛
Vi = Vs𝑅𝑖𝑛+𝑅𝑠 …………….5

Substitute for Rin using equ (2) and take Vi = Vπ then

Keep this equ in our account and try to get an equ for Vo. Consider the output side of the circuit
given in figure 33. It can be redrawn as below.

Figure: 37
In figure 37, resistances ro ,Rc and RL are parallel and -gmVπ is the current flowing through this
parallel combination. Using these facts we can write the equ for output voltage as
Vo = - gmVπ ( ro ǁ Rc ǁ RL ) ----------(7) but we have Vi = Vπ
Therefore, Vo / Vi = - gm ( ro ǁ Rc ǁ RL ) which is the voltage gain Av = Vo / Vi .
So, Av = Vo / Vi = - gm ( ro ǁ Rc ǁ RL ) -------(8)
Another parameter related to this is overall voltage gain. The overall voltage gain for the circuit in
figure 32 is given as Gv = Vo / Vs . We can easily get it as
Gv = Vo / Vs = (Vo / Vi ) x (Vi / Vs) . Here Vo/Vi is in our hand. We already have an equ for Vi/Vs
(refer equ 5 & 6).Then

Small signal parameter can be written as rπ = β / gm where β is the current gain.

Above equation becomes

voltage gain for CE amplifier is high.

Current gain:
For the CE amplifier circuit, short circuit current gain is considered. That is the current gain when
is RL shorted. From figure 37, when RL is shorted, output current is
ios = - gmVπ .
We can write an equation for input current as ii = Vi / Rin = Vπ / Rin .
Short circuit current gain (A is) = ios / ii .
A is = - gm Rin ------(11)
Using above equation, we can realize that CE amplifier has a large current gain.