MPL programs related theory

Experiment 1
Title Accept numbers , store & display
Problem Write an X86/64 ALP to accept five 64 bit Hexadecimal numbers
statement from user and store them in an array and display the accepted
numbers

Hex numbers have valid digits 0 to 9 & A to F

Each hex digit has 4 binary bits eg
1H is 0001 in binary
9H is 1001 in binary
Ah is 1010 in binary
So 64 bit binary number is equal to 64 divided by 4 which is equal to 16 hex digits
( Assumption : user has to enter only 0 to 9 & A to F characters. Because in Program we
are not checking the validity of the digits in the entered numbers)
Algorithm

1. Reserve 5 memory locations each of 64 bits ( array of 5 * 64 bits)

2. set a counter of 5
3. set a pointer to the start of the array
4. Accept a 64 bit number( i.e.16 digits) & store in array
5. Increment pointer
6. decrement counter
7. if counter is not 0 go to 4
8. set the pointer to the start of the array again
9. Set counter to 5
10. Display a 64 bit number( i.e.16 digits)
11. Increment pointer
12. decrement counter
13. if counter is not 0 go to 10
14. exit the program

Experiment 2
Title Length of a string
Problem statement Write an X86/64 ALP to accept a string and to display its length

Algorithm:
1. Reserve memory locations to store string given by user
2. Display message to the user to enter a string
3. Use system call to Accept string inputted by user
4. that same system call also gives the size( length )of string
5. convert the length to ASCII format
6. display the length

Experiment 3

Title Find the largest number

Problem statement Write an X86/64 ALP to find the largest of given byte/ Word /
Dword / 64-bit numbers
Algorithm
1. Numbers are stored in contiguous memory locations.( array)
2. set a pointer to the start of array
3. set counter equal to total count of numbers
4. set maximum number ( max) as zero.
5. compare max with number pointed by pointer
6. if max is less than number , set max equal to number
7. Increment pointer
8. decrement counter
9. if counter is not zero , go to 5 else goto 10
10. display max as maximum number in the array

Experiment No 4

Title: Count of positive and negative numbers

Problem Write an X86/64 ALP to count number of positive and negative numbers
Statement: from an array.
Theory:
We can use Numbers as only positive ( unsigned) or both positive & negative ( signed )
A byte can be used to represent only positive numbers ( unsigned) , So all 8 bits are used for
magnitude of the number
i.e. 0000 0000 to 1111 1111
So unsigned numbers will have range from 0 to 255.

A byte can also be used to represent a signed number . Then MSB bit indicates whether the
number is positive or negative. If it is 0 , then it is positive. If it is 1 then number is negative.
& remaining 7 bits used for the magnitude of the number.
The negative numbers are represented in 2’s complement
form.Eg
+ 1 is represented as

- 1 is found by first taking 2’s complement.

2’s complement of 0000 0001 is 11111111
So -1 is 11111111.

( easier way to find 2’s complement

Suppose a number is 0000 0110 ( i.e. + 6)
Start from LSB ( rightmost bit ) copy bits as they are till first 1 occurs. Then invert all
reamining bits
i.e. 1111 1010
)
The number can be checked whether it is positive or negative by checking the MSB bit of
the number.
Various instructions can be used to check MSB
1. BT AX, 15 & check carry bit value using instuction JC negative
2. SUB 0, number & check carry bit value using instuction JC negative
3. ADD number , 0 & check carry bit value using instuction JC negative
4. RCL number , 1 & check carry bit value using instuction JC negative
Algorithm:
1. Numbers are stored in contiguous memory locations.( array)
2. set a pointer to the start of array
3. set counter equal to total count of numbers
4. set positive number count & negative number count to 0.
5. Check the MSB bit of a number pointed by pointer
6. if MSB =0 , increment positive number count else increment negative number count
7. Increment pointer
 8. decrement counter
9. if counter is not zero , go to 5 else go to 10
10. display positive number count & negative number count

Experiment 5

Title Registers in protected mode

statement Write X86/64 ALP to detect protected mode and display the values of GDTR,
LDTR, IDTR, TR and MSW Registers also identify CPU type using CPUID
instruction.

80386 can operate in one of the following modes , one at a time:

Real mode Protected mode Virtual 8086 mode

It is mode which can be
386 is switched from real activated when 386 is
It is mode in which 386
mode to protected mode when already in protected mode ,
works after reset.
PE bit in CR0 is set to 1. by setting VM bit in flags
register
Purpose = to run multiple
purpose = to set up the purpose = to provide Full
8086 programs but with
processor for Protected features of protection &
protection along with other
Mode Operation. paging
386 programs
Works with full features of works as 8086 but with
works as 8086
386 some features of 386
access to registers except TR
access to all registers
access to all registers & LDTR, GDTR, control
except TR & LDTR.
registers, debug registers
Instructions of protected Instructions of protected
mode can’t be used i.e. mode can’t be used i.e.
All Instructions of protected
VERR, VERW, LAR, VERR, VERW, LAR, LSL
mode can be used
LSL LTR, STR, LLDT, LTR, STR, LLDT, SLDT
SLDT ,ARPL ,ARPL
Memory handling 1 MB for
Physical Memory = 1 MB Physical Memory = 4Gb 8086 programs & 4GB for
386 programs
No logical / virtual memory
No logical / virtual logical / virtual memory =
for 8086 programs & 64TB
memory 64TB
for 386 programs
Segment size = 64 KB for
Segment size is always 64 Segment size can vary from 1
8086 programs & 4GB for
KB byte up to 4GB
386 programs
This mode handles only
Can do multi tasking Can do multi tasking
one task at a time.
No paging of memory paging of memory paging of memory
No protection mechanism protection mechanism protection mechanism
All Virtual 8086 Mode
only The privilege level = programs execute at
All privilege levels ( 0 to 3)
0 (i.e. most privileged) is privilege
are used .
used level 3, (the level of least
privilege.)

Registers which are to be displayed in this program:

1)Test Registers: are used for the testing of the Translation Look aside Buffer

TR6 is used to set conditions for testing TLB and to start testing.
TR7 returns the result ( status) of TLB testing

2)Control Registers
The 386 has three control registers of 32 bits, CR0, CR2 and CR3, These registers, hold
machine status for all tasks in the system.

CR0: Machine Control Register ( machine status word (MSW))

CR0, shown in Figure , contains 6 bits for control and status purposes.

The low-order 16 bits of CR0 are also known as the Machine Status Word, MSW.
PG ( Paging) : when set to 1, then paging unit is enabled
PE (Protection Enable)
When PE = 0 80386 works in real mode
When PE is set to 1 , 80386 works in protected mode.
Changing PE from 1 to 0 , to switch from protected mode to real mode requires longer
sequence of instructions.
Descriptor of a segment
includes its base address, its length, its type, its privilege level, and some miscellaneous
status information.

It is 8 byte ( 64 bit)

Descriptor tables

The descriptors of all segments are kept together at one place in memory called Descriptor
table.

There are three type of Descriptor tables.

1. LDT
2. GDT
3. IDT

1. LDT :
All segments of a single user tasks ( programs) are kept in single Local Descriptor table.(
LDT)
when there is multitasking, Each user task’s segments has its own LDT, Thus There can
be many LDT in 80386 system
The LDT may contain only code, data, stack, task gate, and call gate descriptors.
LDT can hold 1 to max 8192 descriptors ( & since each descriptor takes 8 bytes , the size
of LDT is between 8 bytes and 64K bytes.

2. GDT
GDT contains code and data segments used by the operating systems and task state
segments, and descriptors for the LDTs in a system.
There can be only one GDT in 80386 system
3. IDT
The segments of all ISRs ( interrupt service routines) are kept in interrupt Descriptor
table(IDT)
IDT contain descriptors of only task gates, interrupt gates, and trap gates
There can be only one IDT in 80386 system

These 3 tables can be stored anywhere in the memory. But the processor needs to know
their starting address and these addresses are in :

GDTR, IDTR & LDTR

R means register.
The starting address of these 3 tables( GDT, IDT, LDT) has to be loaded in processor in
three registers namely GDTR, IDTR & LDTR, By using instructions LGDT, LIDT &
LLDT respectively.

Note :
GDTR & IDTR hold 32 bit base ( starting) address of GDT & 16 bit limit of GDT.
But LDTR holds descriptor of LDT, which is stored in GDT , from where its base address
& limit is copied in to invisible part of LDTR register. ( means it can’t be accessed by
programmer).

CPUID: ( CPU identification)

This instructions gives various details about processor installed in the system .
Before using this instruction EAX has to be loaded with a number , then CPUID returns
related information in EAX, EBX,EDX ECX, such as
Processor name eg Genuine Intel , Authentic AMD etc ,
processor serial number,
info about cache, TLB etc

Algorithm
1. Read a protected mode register ( using instructions :SMSW, SGDT, SIDT, SLDT, STR,
CPUID)
2. convert each digit of value in register to ASCII ( by adding 30H if digit is less than or
equal to 9 or adding 37H if digit is more than 9)
3. display all digits of a register ( after converting them to ASCII in step 2)
4.repeat for all registers
Experiment 6
Title Non overlapped block transfer without using string instructions
Statement Write X86/64 ALP to perform non overlapped block transfer without using
string specific instructions. Block containing data can be defined in the data
segment.

Theory :
80386 supports 17 data types:
1.Bit:2.Bit Field: 3. Bit String:4. Signed Byte ( 8 bit ) 5. Unsigned Byte( 8 bit ) 6. Signed
Word ( 16 bit ) 7. Unsigned Word ( 16 bit 8. Signed Double Word ( 32 bit) 9. Unsigned
Double Word ( 32 bit) 10. Signed Quad Word (64 bit ) 11. Unsigned Quad Word (64 bit )
12. Unpacked BCD: 13. Packed BCD: 14. Offset: 15. Pointer: 16. Char:
17. String: String is Sequences of separate but related data items stored in consecutive
addresses
( can be thought as single dimensional array) A string size can be between 1 byte to 4
Gbytes.The 80386 supports byte strings, wordstrings, and dword strings.

Algorithm
( case 1: source block is at lower address & destination block is at higher address )

Before transfer After transfer

1. initialize two blocks (strings) with 5 bytes , such that both blocks non overlapping.
2. display both strings before transfer
3. set pointer1 to start of source block.
4. set pointer2 to start of destination block
5. set counter =5
 6. Copy a byte from location pointed by pointer1 to location pointed by pointer2
7. Increment pointer1 & pointer2 by 1( because data is byte size)
8. Decrement counter
9. If counter is not zero then go to 5 , else go to 10
10. display both strings after transfer.
11. end

Note:
For data of word size, the pointers need to be incremented by two &
For data of double word size, the pointers need to be incremented by four.

Experiment 7
Title overlapped block transfer using string instructions
Statement Write X86/64 ALP to perform overlapped block transfer using string specific
instructions. Block containing data can be defined in the data segment.

Theory :

For string operation , the default registers used are

➢ The SI or ESI (source index) register
➢ The DI or EDI (destination index) register
➢ The CX (count) register
➢ The AL or AX or EAX register and
➢ The direction flag (DF) in EFLAGS register

80386 has a group of instructions , which can support operations on strings.

MOVSB/ MOVSW/ MOVSD : This instruction copies the memory operand ( byte ,or
word or Double word) specified by DS:SI (or DS:ESI) to the memory location specified by
ES:DI (or ES:EDI). After that, SI and DI (or ESI and EDI) will be incremented ( if DF=0)
or decremented ( if DF=1) by 1,2, or 4 based on whether it is byte/ word/ double word.
direction flag can be cleared ( =0) by instruction : CLD
direction flag can be set (=1) by instruction STD
The amount by which ESI , EDI are incremented or decremented is decided by what is the
size of data .
If it is byte they are changed by 1 eg instruction MOVSB
If it is word they are changed by 2 eg instruction MOVSW
If it is Dword they are changed by 4 eg instruction MOVSD
STOSB/ STOSW/ STOSD (store string ): This instruction will write the contents of the
accumulator (AL, AX or EAX) to the memory location specified by ES:DI (ES:EDI for 32
bit operations). After that, SI and DI (or ESI and EDI) will be incremented or decremented
( by 1,2, or 4 based on whether it is byte/ word/ double word), depending on the state of the
direction flag.
LODSB / LODSW / LODSD ( load string) : This instruction will load the BYTE,
WORD, or DWORD at DS:SI (or DS:ESI) into the accumulator. After that, SI and DI (or
ESI and EDI) will be incremented or decremented by 1/2/4.
SCASB / SCASW / SCASD (Scan string ) : This instruction compares the value in the
accumulator (AL, AX or EAX) with the contents of the memory location specified by
ES:DI (or ES:EDI). The flags are set according to the results of the comparison . After that,
DI or EDI will be incremented or decremented by 1/2/4.
CMPSB/ CMPSW/ CMPSD ( compare strings) This instruction subtracts the memory
location specified by DS:SI (or DS:ESI) from the operand specified by ES:DI (or ES:EDI),
setting the flags and discarding the result,( same operation as that of CMP instruction ,
except that cmps is for strings)). After that, SI and DI (or ESI and EDI) will be incremented
or decremented by 1/2/4.
REP prefix
Above instructions can do operation on only one data elements of strings at a time. To
repeat the same operation on all elements of string , a REP prefix can be used . For this the
register CX / ECX is used as counter .The contents of the CX register (ECX for 32 bit
operation) will be decremented and the string instruction repeated until CX goes to 0.
REP MOVSB copy number of bytes pointed by DS:SI to ES:DI . After this ( SI, & DI
are incremented or decremented based on Direction flag), CX/ECX is decremented , & if
CX/ECX is not zero , next byte is copied
We can also combine some condition along with REP
REPE / REPZ Repeat while CX (ECS) is not 0 and ZF is set
REPNE / REPNZ Repeat while CX (ECX) is not 0 and ZF is clear

Algorithm
( case 1: source block is at lower address & destination block is at higher address )

Before transfer After transfer

1. initialize two blocks (strings) with 5 bytes , such that second block overlaps
the first
2. display both strings before transfer
3. set SI/ESI to end of source block & set DI/EDI to end of destination block
4. set counter =5
5. set direction flag i.e. set DF=1
6. move a byte from source block to destination block by Using string
instruction REP MOVSB
7. display both strings after transfer.
8. end

Note:
For data of word size, the pointers need to be incremented by two ( & use MOVSW)
For data of double word size, the pointers need to be incremented by four. ( & use
MOVSD)
 Experiment 8
Title Multiplication
Problem Write 8086 ALP to perform multiplication of two 8-bit numbers. Use
statement Successive Addition & shift & add method

Theory:
80386 has two instructions for multiplication :
1. MUL
It is for Unsigned multiplication (i.e. when both numbers are positive numbers)

Format : MUL R/M/X ; multiplicand can be register /memory/immediate

number

Eg MUL CL ; multiplies 8 bit AL register with 8 bit CL register & result is stored
in 16
;bit AX register

2. IMUL
It is for signed multiplication (multiplication of two numbers which can be positive or
negative )
Format : IMUL R/M/X ; multiplier can be register /memory/immediate
number
Eg
IMUL CL ; It multiplies AL* CL & result is stored in AX

For both MUL & IMUL, the following rules apply

If source ( multiplier) is byte , it will multiply AL ( multiplicand) & result is stored in AX

If source ( multiplier) is word , it will multiply AX ( multiplicand) & result is stored in
DX:AX
If source ( multiplier) is double word , it will multiply EAX( multiplicand) & result is
stored in EDX:EAX

Source (Multiplier) Accumulator Result (Product) [Double-length]

(Multiplicand)

8-bit AL AX
16-bit AX DX:AX
32-bit EAX EDX:EAX

Multiplication can be done by two methods without using MUL or IMUL instruction.

Assumption : both numbers are positive ( unsigned)

For signed Multiplication , we can’t use following methods , but we have to use Booth’s
algorithm

1. Successive addition method

A*B means adding A to itself B times

i.e. The multiplicand is added with itself, multiplier number of times
Eg 1101 * 0110 = 1101 + 1101 + 1101 +1101 +1101 +1101 = 1001110
i.e. ( 13) * ( 6) = 13 + 13 + 13 + 13 + 13 + 13 = (78)

Algorithm for Successive addition method

1. BL holds multiplier = 0000 0110

2. RCX is loaded with 0 , RCX is used to store partial products as well as the final
result.
3. RAX holds multiplicand= 0000 1101
4. RCX is added with RAX & result is stored in RCX i.e. RCX + RAX => RCX
5. Decrement BL
6. If BL is not zero then go to 4 else go to 7
7. Display the result which is in RCX after converting it to ASCII

2. Shift/Add Method

• Work out partial product for each bit of multiplier ( if multiplier bit is 0 , the partial
product is 0000 & if multiplier bit is 1 , the partial product is same as multiplicand)
• We need to store all the Partial products, then shift each partial product as shown
above before adding all of them .

Easier way is Shift/Add Method

In this we do running addition i.e. we don’t wait till all partial products are calculated , but
we go on adding partial products as soon as they are calculated .
i.e.
initially Result =0 , then
Result = Result +partial product 1 & shift left
Result = Result +partial product 2 & shift left
And so on
But still faster way is ,
when partial product is 0, it need NOT be added so
• Initially result =0 , add first partial product to it. Then shift result to left & add next
partial result and so on
• For each 1 in multiplier add and shift ;
• but for each 0 in multiplier , only a shift is required ( because in that case the partial
product is 0000)
Algorithm for Shift/Add Method

1. DL is loaded with 8 . DL is used as counter to repeat the shift& add 8 times as there
are 8 bits in multiplier.
2. RCX is used to store partial products as well as the final result.
3. RAX holds multiplicand= 0000 1001
4. BL holds multiplier = 0000 1101
5. BL is shifted to right by SHR instruction . so LSB bit goes into carry flag.
6. If carry flag is 1 then RAX is added to RCX & RAX is shifted to left
a. But if carry flag is 0 , then only RAX is shifted to left
7. Decrement DL
8. If DL is not zero , then go to 5 else go to 9
9. Display the result which is in RCX after converting it to ASCII

Algorithm for procedure main:-

1. Display the following menu for user:

1. Successive Addition
2. Shift & add method
3. Exit
Enter your choice::
2. Accept the choice from user.
3. If (choice =1), then call procedure SUCCADD else go to 4
4 If (choice =2), then call procedure SHIFTADD else go to 5
5. If (choice =3), then exit else go to 1 to display the menu again.

Experiment 9

Title File statistics

Problem Write X86 ALP to find, a) Number of Blank spaces b) Number of lines
statement c) Occurrence of a particular character. Accept the data from the text
file. The text file has to be accessed during Program_1 execution and
write FAR PROCEDURES in Program_2 for the rest of the processing.
Use of PUBLIC and EXTERN directives is mandatory.

In this we require following assembler directives because some variables/procedures defined

in one program p1.asm are required in second program p2.asm

Extrn- is used to tell the assembler that labels or names following this directive are in
some other program.

Public – is used to make a label or name available to other modules ( in those other
modules it is declared as extern)

eg

in one module P1.asm we define count variable &declare it as public as shown below

public count
count db 0

in another module P2.asm ,we declare that count is defined in some other module by

extrn count
we assemble P1.asm & P2.asm separately to create P1.o & P2.o object files
These object files can be linked together by linker using command

Ld -o program p1.o p2.o

This will link P1.o & P2.o to create an executable file by the name ‘program’

Global – it can be used in place of both extern & public

Algorithm

Create three files

abc.txt ; the file from which number of spaces, lines will be counted
P1.asm ; which opens file abc.txt , stores its contents in memory and calls P2.asm
P2.asm ; which counts number of spaces, lines from abc.txt which are now in
memory & displays them

Assumption :
1. Maximum Size of file abc.txt is 200.
2. the count of spaces, lines & occurrence of a characters are all less than 9, to simplify the
program.

Algorithm for P1.asm

1. Open file abc.txt
2. Read the file contents & store it in buffer (in memory)
3. Call procedure spaces ,which is in P2.asm
4. Call procedure lines ,which is in P2.asm
5. Call procedure occur_char, which is in P2.asm

Algorithm for P2.asm

Procedure spaces
1. Set pointer to buffer
2. Read data( character ) pointed by pointer
3. Compare it with ASCII code of space ( i.e. 20h)
4. If match, then increment counter of spaces
5. Increment pointer
6. If all characters not over then go to 2 else go to 7
7. Display count of spaces after converting to ASCII
8. Return to the calling program P1

Procedure lines
1. Set pointer to buffer
2. Read data( character ) pointed by pointer
3. Compare it with ASCII code of line feed ( i.e. 0Ah)
4. If match, then increment counter of lines
5. Increment pointer
6. If all characters not over then go to 2 else go to 7
7. Display count of lines after converting to ASCII
8. Return to the calling program P1

Procedure occr_char
1. Set pointer to buffer
 2. Read data( character ) pointed by pointer
3. Compare it with ASCII code of character whose occurrence is to be counted
4. If match, then increment counter of occurrence
5. Increment pointer
6. If all characters not over then go to 2 else go to 7
7. Display count of occurrence after converting to ASCII
8. Return to the calling program P1

Experiment 10
Title Password check
Problem Write an X86/64 ALP password program that operates as follows:
statement a. Do not display what is actually typed instead display asterisk (“*”).
If the password is correct display, “access is granted” else display
“Access not Granted”

Theory
Password is used for authentication ( i.e. only persons who have been assigned credentials
are allowed to use the system or application after entering correct password)
The password entered by user should not be displayed ( echoed ) on the screen.
But the normal syscall function 0 ( rax=0) echoes the typed in keys.
i.e.
mov rax,0
mov rdi,0
mov rsi,starting memory address to store entered keys
mov rdx,number of keys to read
syscall

How to turn off echo

The struct termios structure is a general terminal interface which provides an interface to
asynchronous communications devices such as keyboard.
The flag c_lflag of the struct termios structure, control higher-level aspects of input
processing such as echoing and the choice of canonical or non canonical input.

tcflag_t ECHO
If this bit is set, echoing of input characters back to the terminal is enabled.
If this bit is cleared, echoing is disabled.

tcflag_t ICANON
If this bit is set, enables canonical input processing mode. Otherwise, input is processed in
non canonical mode.
In canonical input processing mode, No input can be read until <enter> key is pressed.
In noncanonical input mode, the special editing characters such as ERASE ( backspace key
and KILL ( ctrl+C )are ignored and program has to check for <enter > key ( ASCII code
0AH).

Algorithm
Disable echo & canonical mode.
Accept password entered by user while displaying * on screen
Compare entered password with stored password
If match then print “access granted” else print “access denied”
Enable echo & canonical mode.