PIC Instruction Set
PIC Instruction Set
Instruction Set
Outline
Instruction
set
Instruction description
Assembler directives
Instruction Set
PIC16Cxx
@
PIC16Fxx: 14bit word
(opcode)
Byte-oriented,
bit-oriented &
literal and
control
Instruction Set
cont
Instruction
Descriptions
ADDLW K
Add
ADDLW K
Instruction:
ADDLW 15H
Before
After
W = 10H
W = 25H
cont
ADDWF f, d
Add
ADDWF f, d
Instruction:
MOVLW
ADDWF
cont
17H
5H, 0
Before
After
W = 0H
5H = 0H
W = 17H
5H = 0H
MOVF
f, d
Instruction: MOVF
Before
W = 09AH
FSR = 0H
FSR, 0
After
MOVLW
Instruction: MOVLW
Before
W = 09AH
After
W = 5AH
5AH
MOVWF f
Move data from WREG register to f register
(W) (f)
Not affect bit of STATUS register
Instruction: MOVWF
Before
PORTB = 00H
W = 09AH
PORTB
After
PORTB = 09AH
W = 09AH
Review
1.
2.
3.
4.
Review
5. What is the result of the following code and
where is it kept?
MOVLW
ADDLW
6.
15H
13H
MOVLW
MOVLW
MOVLW
MOVLW
500
(b) MOVLW 50
00
(d) MOVLW 255H
25H
(f) MOVLW F5H
mybyte, 50H
Review
7.
ADDLW
ADDLW
ADDLW
ADDLW
300H
$500
12H
25H
Review
10. The instruction MOVLW 44H is a ____-byte
instruction.
11. True or false. All the instructions in the
PIC16 are 2-cycle instructions.
12. Give the value in WREG for the following:
MYCOUNT
MOVLW
EQU
15
MYCOUNT
Review
13. Give the value in fileReg 0x20 for the following:
MYCOUNT
MYREG
MOVLW
MOVWF
EQU
0x95
EQU
0x20
MYCOUNT
MYREG
EQU
D12
EQU
0x63
EQU
0x10
MYDATA
FACTOR
MYREG
Review
15. Find the C, Z and DC flag bits for the
following code:
MOVLW
ADDLW
9FH
61H
82H
22H
ANDLW k
Logical
Instruction:
Before
W = A3H
ANDLW
5FH
After
W = 03H
ANDWF f, d
Instruction:
ANDWF
Before
W = 17H
FSR = 0C2H
FSR, 1
After
W = 17H
FSR = 02H
BCF
f, b
Instruction:
BCF STATUS, 5
Before
After
BSF
f, b
Instruction:
BSF INTCON, 7
Before
After
INTCON = 0BH
INTCON = 08BH
BTFSS
f, b
I GOTO
J
Before
PC = address H
LOOP
After
PC = Add. J if STATUS<2> = 1,
PC = Add. I if STATUS<2> = 0
BTFSC
f, b
I GOTO
J
LOOP
Before
After
PC = address H
PC = Add. J if PORTA<3> = 0,
PC = Add. I if PORTA<3> = 1
Review
Assume RA3 is an input, represents condition of a door
alarm. If it goes LOW, it means that the door is opened.
Create a program to monitor the bit continuously.
Whenever it goes LOW, send a HIGH pulse to port RB5
and turn on buzzer
HERE
OFF
BSF
BSF
BCF
BCF
BTFSC
GOTO
BSF
GOTO
BCF
GOTO
03H, 5
85H, 3
86H, 5
03H, 5
05H, 3
OFF
6H, 5
HERE
6H, 5
HERE
Vcc
PIC
RA3
RB5
CALL
Call subroutine
(PC) + 1 TOS (top of stack)
k PC<10:0>
(PCLATCH<4:3>) PC<12:11>
2-cycle instruction
Not affect on STATUS register
Before
After
PC = add. SO
PC = add. THEN;
TOS = add. SO+1
CLRF
After
PORTA = 00H
Z=1
CLRW
Clear the content WREG register
00h (W)
1Z
Instruction: CLRW
Before
W = 5AH
After
W = 00H
Z=1
COMP
f, d
Instruction: COMP
Before
ONE = 13H
W = 02H
ONE, 0
After
ONE = 13H
W = 0ECH
DECF
f, d
Decrease f register
(f) 1 (d)
Instruction: DECF
Before
CNT = 01H
Z=0
CNT, 1
After
CNT = 00H
Z=1
DECFSZ
f, d
Instruction:
HERE
DECFSZ CNT, 1
GOTO HERE
CONT
..
Before
After
PC = add. HERE
CNT = CNT - 1
PC = add. CONT if CNT = 0;
PC = add. HERE + 1 if CNT 0
GOTO
Unconditional branch
k PC<10:0>
(PCLATCH<4:3>) PC<12:11>
2-cycle instruction
Instruction: HERE
THERE
GOTO THERE
Before
After
PC = add. HERE
PC = add. THERE
Review
Toggle all the bits of the Port B by sending to it the values 55H and AAH continuously.
Put a time delay in between each issuing of data to Port B.
MYREG
EQU
0x08
ORG
0
BACK
MOVLW
0x55
MOVWF
PORTB
CALL
DELAY
MOVLW
0xAA
MOVWF
PORTB
CALL
DELAY
GOTO
BACK
;this is the delay subroutine
ORG
300H
DELAY
MOVLW
0xFF
MOVWF
MYREG
AGAIN
NOP
NOP
DECFSZ
MYREG, F
GOTO
AGAIN
RETURN
END
INCF f, d
After
SATU = 00H
Z=1
INCFSZ
f, d
Increase the content of f register and skip the next instruction if the
result is 0; otherwise execute the next instruction
(f) + 1 (d), skip if result = 0
2-cycle instruction
Instruction: HERE
CONT
INCFSZ CNT, 1
GOTO
loop
..
Before
After
PC = add. HERE
CNT = CNT + 1
PC = add. CONT if CNT = 0;
else add. HERE + 1
Review
The difference between INCF f, W & INCF f, F
MOVLW
MOVWF
INCF
INCF
INCF
INCF
INCF
INCF
INCF
INCF
O
Ox20
0x20, W
0x20, W
0x20, W
0x20, F
0x20, F
0x20
0x20
0x20, W
;WREG = 0
;0x20 = (0), WREG = 1
;0x20 = (0), WREG = 1
;0x20 = (0), WREG = 1
;0x20 = (1), WREG = 1
;0x20 = (2), WREG = 1
;0x20 = (3), WREG = 1
;0x20 = (4), WREG = 1
;0x20 = (4), WREG = 5
IORLW
Instruction: IORLW
Before
W = 09AH
Z=?
35H
After
W = 0BFH
Z=0
IORWF
f, d
Instruction: IORWF
Before
RESULT = 13H
W = 91H
RESULT, 0
After
RESULT = 13H
W = 93H
Z=0
Review
Find the contents of register WREG after
execution of the following code:
MOVLW
IORLW
XORLW
0
0x99
0xFF
NOP
No operation
Instruction: NOP
RETFIE
Return from interrupt
TOS PC
1 GIE (Global Interrupt Enable)
Not affect bit of STATUS register
Instruction: RETFIE
Before
After
PC = TOS
GIE = 1
RETLW
Instruction: RETLW
Before
W = 09AH
088H
After
W = 088H
RETURN
Return from subroutine
POP the TOS and load into the PC
2-cycle instruction
Instruction: RETURN
Before
After
PC = TOS
RLF f, d
Instruction: RLF
REG, 1
Before
After
RRF f, d
Instruction: RRF
REG, 1
Before
After
Review
Find the contents of file register MYREG after
execution of the following code:
MYREG EQU
BCF
MOVLW
MOVWF
RRF
RRF
RRF
0x20
STATUS, C
0x26
MYREG
MYREG, F
MYREG, F
MYREG, F
;C=0
;WREG=0010 0110
;MYREG=0001 0011 C=0
;MYREG=0000 1001 C=1
;MYREG=1000 0100 C=1
Review
Find the contents of file register MYREG after
execution of the following code:
MREG
EQU
BSF
MOVLW
MOVWF
RLF
RLF
RLF
RLF
0x20
STATUS, C
0x15
MYREG
MYREG, F
MYREG, F
MYREG, F
MYREG, F
;C=1
;WREG=0001 0101
;MYREG=0010 1011
;MYREG=0101 0110
;MYREG=1010 1100
;MYREG=0101 1000
C=0
C=0
C=0
C=1
SLEEP
00h WDT
0 WDT prescalar
1 TO
0 PD
Affect TO & PD bits of STATUS register
Instruction: SLEEP
SUBLW
Instruction: SUBLW
02H
Before
After
W = 01H
C=?
Z=?
W = 01H
C=1
Z=0
SUBWF f, d
Instruction: SUBWF
02H, 0
Before
After
W = 01H
F = 05H
C=?
Z=?
W = 04H
F = 05H
C=1
Z=0
Review
Show the steps involved in the following.
MOVLW
SUBLW
K
= 3F
- WREG = 23
1C
0x23
0x3F
0011 1111
0010 0011
0011 1111
+ 1101 1101 (2s complement)
1 0001 1100
C = 1, Z = 0 (result is +ve)
SWAPF f, d
Exchange the upper & lower nibbles of f register
(f<3:0) (d<7:4>), (f<7:4) (d<3:0>)
Not affect STATUS register
Instruction: SWAPF
Before
ON = 0F4H
W = 09AH
ON, 1
After
ON = 04FH
W = 09AH
Review
Find the contents of the MYREG register in the
following code.
MYREG
EQU
MOVLW
MOVWF
SWAPF
0x20
0x72
MYREG
MYREG, F
;WREG = 72H
;MYREG = 72H
;MYREG = 27H
XORLW k
Exclusive OR (XOR) the content of WREG
register with k literal
(W) XOR k (W)
Store the result in WREG register
Affect bit Z of STATUS register
Instruction: XORLW
Before
W = 0B5H
0AFH
After
W = 01AH
XORWF f, d
Exclusive OR (XOR) the content of WREG
register with f register
(W) XOR (f) (d)
Affect bit Z of STATUS register
Instruction: XORWF
Before
REG = 0AFH
W = 0B5H
REG, 1
After
REG = 01AH
W = 0B5H
Review
Show the results of the following:
MOVLW
XORLW
0x54
0x78
54H = 0 1 0 1 0 1 0 0
78H = 0 1 1 1 1 0 0 0
2CH = 0 0 1 0 1 1 0 0
54H XOR 78H = 2CH, Z = 0
Assembler Directives
Also known as pseudo-instructions
Give directions to assembler
EQU, ORG, END
EQU directive:
EQU
COUNT
0x25
Assembler Directives
Using EQU for fixed data assignment:
;in hexadecimal
DATA1
EQU
DATA2
EQU
DATA3
EQU
DATA4
EQU
DATA5
EQU
39
0x39
39H
H39
h39
;in binary
DATA6
DATA7
B00110101
b00110101
EQU
EQU
;in decimal
DATA8
EQU
DATA9
EQU
D28
d28
;in ASCII
DATA10
DATA11
DATA12
A2
a2
2
EQU
EQU
EQU
Assembler Directives
Using EQU for SFR address assignment:
COUNTER
PORTB
MOVLW
MOVWF
INCF
INCF
INCF
EQU
0x00
EQU
0x06
COUNTER
PORTB
PORTB, F
PORTB, F
PORTB, F
Assembler Directives
Using EQU for RAM address assignment:
MYREG
MOVLW
MOVWF
MOVLW
ADDWF
ADDWF
ADDWF
EQU
0x12
0
MYREG
22H
MYREG, F
MYREG, F
MYREG, F
Assembler Directives
cont
SET directive:
END directive:
Assembler Directives
cont
LIST directive:
#include directive:
Assembler Directives
cont
_config directive:
OSC=HS
WDT=OFF
radix directive:
DEC