ASSEMBLY LANGUAGE PROGRAMMING

FOR
IBM 370
Day 2

(Ref: Michael D. Kudlick)

1
 Agenda

Agenda
 Day1 – Fundamental Concepts – Assembly Language
Basics

 Day2 – Instruction Types & Sample Programs

2
Day2
Topics

 Topic 1: Summary of Session 1

 Topic 2: Standard Programming conventions
 Topic 3: Save Area
 Topic 4: Sample Program to add 2 numbers
 Topic 5: Sample Program to use memory addressing and
indexing
 Topic 6: Explicit Format Vs Implicit Format
 Topic 7: Instruction Formats

3
Summary of Session 1
1. Instruction – converted to m/c lang & executed at run time
2. Directives – will not be converted to m/c lang & used by assembler
3. Opcode-Operand format – opcode is instr or directives
4. & operand is data or addr of data
5. B-D format of addressing - 12 bits D and 4 bits reg name
6. How assembler gets base address, base register & displacement from
USING statement
7. How Assembler converts name fields to memory address in D(,B) format.
8. How program gets base address & calculates effective address from BALR
instruction
9. Relocation factor – program to use address assigned after loaded instead
of using address assigned by assembler
10. 24 bit memory addressing (for 16 MB memory) with 16 bit address
representation using B-D format
11. 16 registers and register usage conventions
12. How Assembler converts name fields to memory addresses

4
 Standard Programming conventions
 There are conventional programming requirements for writing the
program in IBM 370.
No. Requirement Program statements Comments
PGMNAME1 CSECT Tells the Program name.
STM Store regs. 14 thru 12 in save area.
The first statements 14,12,12(13) Establish base address in reg. 12.
(other than comments) for BALR 12,0
1. Tells base address / reg. to assmblr.
the program should be USING *,12 Store previous pgm / OS save area.
these:
ST 13,SAVE+4 Load current program’s save area
LA 13,SAVE address.
LABEL001 L 13,SAVE+4
The last executable Restore prev. pgm / OS save area.
LM Restore prev. pgm / OS registers.
2. statements of the program 14,12,12(13)
should be these: BR 14
Return to prev. pgm or OS.

The last statements of the SAVE DS 18F Declare Save area.

3.
program should be these: END Last statement – program end.

5
 Complete convention
 This is complete convention which includes storing current
program’s SAVE area address in previous program’s SAVE
area in SAVE+8.

No. Requirement Program statements Comments

PGMNAME1 CSECT
STM 14,12,12(13) Tells the Program name.
The first statements Store regs. 14 thru 12 in save area.
BALR 12,0
(other than USING *,12 Establish base address in reg. 12.
1. comments) for the ST 13,SAVE+4 Tells base address / reg. to assmblr.
program with LR 2,13 Store previous pgm / OS save area.
complete convention: LA 13,SAVE
Load current program’s save area address.
ST 13,8(2)

6
 SAVE AREA
1. Save the previous program registers 14 thru 12 in previous program SAVE area in SAVE +
12.
2. Save the Previous program SAVE area address in current program SAVE area in SAVE + 4.
3. Save the Current program SAVE area address in previous program SAVE area in SAVE + 8.

OS Save area Current program’s Save area (P) Next program’s Save area (Q)

1st word SAVE Used by PL1 programs Used by PL1 programs saved by Used by PL1 programs

2 SAVE + 4 curr. pgm P prev. pgm(P) save area addr.

prev pgm(OS) save area addr
3 SAVE + 8 next pgm(P) save area addr
next pgm (Q) save area addr.
4 SAVE + 12 store register 14 of OS
store register 14 of curr pgm P saved by curr. pgm (Q)
5 SAVE + 16 store register 15 of OS
store register 15 of curr pgm P
6 SAVE + 20 store register 0 of OS
store register 0 of curr pgm P
7 SAVE + 24 store register 1 of OS
store register 1 of curr pgm P
8 SAVE + 28 store register 2 of OS
store register 2 of curr pgm P
9 SAVE + 32 store register 3 of OS
store register 3 of curr pgm P
10 SAVE + 36 store register 4 of OS
store register 4 of curr pgm P
11 SAVE + 40 store register 5 of OS saved
store register 5 of curr pgm P
12 SAVE + 44 store register 6 of OS by
store register 6 of curr pgm P
13 SAVE + 48 store register 7 of OS next saved by
pgm. store register 7 of curr pgm P next pgm.
14 SAVE + 52 store register 8 of OS
(P) (Q)
store register 8 of curr pgm P
15 SAVE + 56 store register 9 of OS
store register 9 of curr pgm P
16 SAVE + 60 store register 10 of OS
store register 10 of curr pgm P
17 SAVE + 64 store register 11 of OS
store register 11 of curr pgm P
18 SAVE + 68 store register 12 of OS
store register 12 of curr pgm P
7
Sample Program to use name-field
symbols - adds 2 numbers
PROGRAM1 CSECT CONVENTIONAL REQUIREMENT 1
 STM 14,12,12(13)
BALR 12,0
USING *,12
ST 13,SAVE+4
LA 13,SAVE
ADD L 3,FLD1 LOAD FIRST NUMBER
A 3,FLD2 ADD SECOND NUMBER
ST 3,FLD3 STORE THE RESULT
WTO ‘THE RESULT SUM IS ‘ FLD3 DISPLAY RESULT
EXIT L 13,SAVE+4 CONVENTIONAL REQUIREMENT 2
LM 14,12,12(13)
BR 14
FLD1 DC F‘100’ FIRST NUMBER
FLD2 DC F‘300’ SECOND NUMBER
FLD3 DS F RESULT FIELD
SAVE DS 18F CONVENTIONAL REQUIREMENT 3
END PROGRAM END

8
Sample Program to use memory
addressing & indexing
PROGRAM1 CSECT CONVENTIONAL REQUIREMENT 1
STM 14,12,12(13)
BALR 12,0
USING *,12
ST 13,SAVE+4
LA 13,SAVE
GETVAL LA 5,ARRAY01 LOAD ADDRESS OF ARRAY
L 7,COUNT1 LOAD ARRAY COUNT
L 2,=F’0’ INITIALIZE INDEXING REG TO 0
L 8,=F’0’ INITIALIZE REG 8 FOR STORING
ADDLOOP A 8,0(2,5) ADD DATA FROM NEXT MEM LOCATION
LA 2,4(2) INC INDEX REG BY 4 (INC QTY)
BCT 7,ADDLOOP DCRMNT COUNT AND BRANCH IF NOT 0
STORERES ST 8,SUM1 STORE THE RESULT IN SUM1 FIELD
WTO ‘THE SUM OF ARRAY OF NOS. IS ‘ SUM1 DISPLAY THE SUM
EXIT L 13,SAVE+4 CONVENTIONAL REQUIREMENT 2
LM 14,12,12(13)
BR 14
ARRAY01 DC F‘10’ FIRST ARRAY ELEMENT
DC F’20’ SECOND
DC F’30’ THIRD
DC F’40’ FOURTH
DC F’50’ FIFTH
COUNT1 DC F‘5’ COUNT OF ARRAY
SUM1 DS F RESULT FIELD
SAVE DS 18F CONVENTIONAL REQUIREMENT 3
END PROGRAM END
9
©
 Explicit format Vs Implicit format
No. Explicit Format Implicit Format
The operands need to be converted to base-
1. The operands can be kept as it is.
displacement form for implicit formats.
Base-displacement form and register addresses are
2. Name-field symbol is used to represent address.
used to represent address.
Simpler to use, less error prone, greatly facilitate
3. Not ease of use.
writing and modifying the program.
In the RX explicit base-displacement form there are
3 possibilities X2 and B2 specified, X2 omitted and
B2 omitted. X2 omitted or B2 omitted has the
same effect at run time. Index register can be used
for incrementing the subsequent addresses in
looping to operate multiple data. Explicit format RX In the RX implicit name-field symbol form there are
 R1,D2(X2,B2). 2 possibilities length specified and length not
4. specified and assumed from first name-field.
Effective address = content of base register +
displacement + Implicit format RX  R1,S2(X2)
content of index register
= base address +
displacement +
index

10
 Explicit format Vs Implicit format
(continued...)
No. Explicit Format Implicit Format
 The assembler is required to generate the base-
The effective address is calculated during the
run time from base-displacement form of displacement form of address for name-field symbol, say
address to operate the data present in that Z in add example shown below. The assembler gets base
address. Explicit format RX  R1,D2(,B2). address and base register from ‘USING’ directive. Thus
displacement can be calculated and the format D2(,B2)
5. Effective address = content of base can be achieved. Implicit format RX  R1,S2.
register + displacement = address of name-field symbol Z –
displacement content of base register +
= base address + = address of name-field symbol Z –
displacement base address
In the explicit formats length has to be
In the implicit format length will be assumed by
mentioned explicitly for L and L1, L2 in SS1
6. assembler to number of bytes of first name-field symbol if
 D1(L,B1),D2(B2) and SS2 
it is not mentioned. Implicit format SS1  S1,S2.
D1(L1,B1),D2(L2,B2) respectively.
A 3,4(10,11) – RX X2 & B2 Specified A 3,Z - RX name-field symbol
A 3,4(,11) – RX X2 omitted A 3,Z(6) - RX name-field symbol with index reg. 6
7. A 3,4(11) – RX B2 omitted CLC X(5),Z - SS1 length 5 specified
A 3,4 – RX X2 & B2 omitted CLC X,Z - SS1 length of first symbol taken,
CLC 85(5,12),200(12) – SS1 length is 5 hence length of X

11
Instruction Formats
Instruction Instruction
No. Instruction Formats
Type Length
Assembly Language
Instruction Format
op R1,R2

Assembly Language
Instruction example
AR 3,4
1. RR – EXPLICIT
Machine Language
converted
1A 3 4 8 + 4 +4
= 16 bits
Machine Language
op R1 R2 = 2 bytes
Instruction Format
Assembly Language
RX – EXPLICIT Instruction Format
op R1,D2(X2,B2)
(with both X2
& B2) Assembly Language
Instruction example
A 3,4(10,11)
2a. Operand 2
Effective Machine Language 8 + 4 + 4 +4
5A 3 A B 004
address = R10 converted + 12
content + R11 = 32 bits
Machine Language op R1 X2 B2 D2
content + 4
Instruction Format = 4 bytes

12
Instruction Formats (continued...)
Instruction Instruction
No. Instruction Formats
Type Length
Assembly Language
RX – EXPLICIT op R1,D2(,B2)
Instruction Format
(X2 omitted) –
no indexing - Assembly Language
Instruction example
A 3,4(,11)
2b. Operand 2
Effective Machine Language 8 + 4 + 4 +4
address = R11 converted
5A 3 0 B 004
+ 12
content + 4 = 32 bits
Machine Language
Instruction Format
op R1 X2 B2 D2 = 4 bytes
Assembly Language
Instruction Format
op R1,D2(X2)
RX – EXPLICIT
(B2 omitted) Assembly Language
Instruction example
A 3,4(11)
2c. Operand 2
Effective Machine Language 8 + 4 + 4 +4
5A 3 B 0 004
address = R11 converted + 12
content + 4 = 32 bits
Machine Language op R1 X2 B2 D2
Instruction Format = 4 bytes

13
 Instruction Formats (continued...)
Instruction Sample Instruction
No. Instruction Formats
Type Values Length
Assembly Language
Instruction Format
op R1,D2
RX – EXPLICIT
(both X2 & B2 Assembly Language
Instruction example
A 3,4
omitted)
2d.
Operand 2 Machine Language 8 + 4 + 4 +4
converted
5A 3 0 0 004
Effective + 12
address = 4 = 32 bits
Machine Language
op R1 X2 B2 D2 = 4 bytes
Instruction Format
Assembly Language
Instruction Format
op R1,S2(X2)
RX – IMPLICIT
Assembly Language A 3,Z(5) replaced by Z=80A, base
Operand 2 register is 12 thus
Instruction example A 3,2052(5,12)
2e. Effective B2=C, base
address = Machine Language address=6, index 8 + 4 + 4 +4
Address of Z + 5A 3 5 C 804 register X2=5
converted + 12
R5 content (given), index=20,
Machine Language displacement=80A- = 32 bits
op R1 X2 B2 D2
Instruction Format 6=X’804’=2052 = 4 bytes

14
 Instruction Formats (continued...)
Instruction Sample Instruction
No. Instruction Formats
Type Values Length
Assembly Language
Instruction Format
op R1,S2

RX – IMPLICIT Assembly Language A 3,Z replaced by

Operand 2 Instruction example Z=80A, base
A 3,2052(,12) register is 12 thus
2f. Effective
Machine Language B2=C, base 8 + 4 + 4 +4
address = 5A 3 0 C 804
converted address=6,
Address of Z + 12
displacement=80A-
Machine Language 6=X’804’=2052 = 32 bits
op R1 X2 B2 D2
Instruction Format = 4 bytes
Assembly Language
Instruction Format
op R1,R2,D3(B3)
RS – EXPLICIT Assembly Language
Operand 3 Instruction example
STM 14,12,12(13)
3a. Effective
Machine Language 90 E C D 00C 8 + 4 + 4 +4
address = R13
converted + 12
content + 12
Machine Language = 32 bits
op R1 R2 B3 D3
Instruction Format = 4 bytes

15
 Instruction Formats (continued...)
Instruction Sample Instruction
No. Type Instruction Formats
Values Length
Assembly Language
Instruction Format
op R1,R2,S3

RS – IMPLICIT Assembly Language STM 14,10,Z replaced by Z=80A, base

Operand 3 Instruction example register is 12
STM 14,10,2052(12) thus B3=C,
3b. Effective
Machine Language base 8 + 4 + 4 +4
address = 90 E A C 804
converted address=6,
Address of Z + 12
displacement=
Machine Language 80A-6=X’804’ = 32 bits
op R1 R2 B3 D3
Instruction Format =2052 = 4 bytes
Assembly Language
Instruction Format
op D1(B1),I2
SI – EXPLICIT
- 1 byte Assembly Language
Immediate Instruction example
CLI 12(13),X’40’
4a. data - Operand
Machine Language 95 40 D 00C
1 Effective 8 + 8 + 4 +12
converted
address = R13 = 32 bits
content + 12 Machine Language op I2 B1 D1 = 4 bytes
Instruction Format

16
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 Instruction Formats (continued...)
Instruction Sample Instruction
No. Type Instruction Formats
Values Length
Assembly Language
Instruction Format
op S1,I2
SI – IMPLICIT
- 1 byte Assembly Language CLI Z,X’40’ replaced by Z=80A, base
Immediate Instruction example register is 12
CLI 2052(12) ,X’40’ thus B3=C,
4b. data - Operand
Machine Language base
1 Effective 95 40 C 804 8 + 8 + 4 +12
converted address=6,
address =
displacement= = 32 bits
Address of Z Machine Language 80A-
op R1 R2 B3 D3 = 4 bytes
Instruction Format 6=X’804’=2052

Assembly Language
Instruction Format
op D1(B1)
S – EXPLICIT Assembly Language
Operand 1 Instruction example
TS 12(13)
5a. Effective
Machine Language 93 unused D 00C
address = R13 8 + 8 + 4 +12
converted
content + 12 = 32 bits
Machine Language op unused B1 D1 = 4 bytes
Instruction Format

17
 Instruction Formats (continued...)
[Note: Length field L is one less in machine language than in assembly language in
SS1 type]

Instruction Sample Instruction

No. Instruction Formats
Type Values Length
Assembly Language
Instruction Format
op S1

S – IMPLICIT Assembly Language TS Z replaced by Z=80A, base

Operand 1 Instruction example register is 12
TS 2052(12) thus B1=C,
5b. Effective
Machine Language base
address = 93 unused C 804 8 + 8 + 4 +12
converted address=6,
Address of Z
displacement= = 32 bits
Machine Language op unused B1 D1 80A-
= 4 bytes
Instruction Format 6=X’804’=2052

SS1 – Assembly Language

Instruction Format
op D1(L,B1),D2(B2)
EXPLICIT
Operand 1 Assembly Language
Effective Instruction example
CLC 12(8,3),15(4)
6a. address = R3
Machine Language D5 07 3 00C 4 00F 8 + 8 + 4 +12
content + 12 &
converted + 4 + 12
operand 2 EA
= R4 content Machine Language = 48 bits
op L B1 D1 B2 D2
+ 15 Instruction Format = 6 bytes

18
©
 Instruction Formats (continued...)
[Note: Length field L is one less in machine language than in assembly language in
SS1 type]

Instruction Sample Instruction

No. Type Instruction Formats
Values Length
Assembly Language X=700, length of
SS1 – Instruction Format
op S1,S2 X=8, Z=80A,
base register is
IMPLICIT
Assembly Language CLC X,Z replaced by 12 thus
Operand 1 B1=B2=C, base
Instruction example CLC 1786(8,12),2052(12) address=6,
6b. Effective
address = displacement D1
Machine Language D5 07 C 6FA C 804 =700-6=X’6FA’ 8 + 8 + 4 +12
Address of X & converted =1786 and + 4 + 12
operand 2 EA displacement D2
= Address of Z Machine Language = 48 bits
op L B1 D1 B2 D2 = 80A-6=X’804’
Instruction Format =2052 = 6 bytes
Assembly Language
Instruction Format
op D1(L,B1),S2
SS1 – MIXED
Operand 1 Assembly Language CLC 12(8,3),Z replaced Z=80A, base
Effective Instruction example register is 12
CLC 12(8,3),2052(12)
6c. address = R3 thus B2=C,
Machine Language base 8 + 8 + 4 +12
content + 12 & D5 07 3 00C C 804
converted address=6,
operand 2 EA + 4 + 12
displacement=
= Address of Z = 48 bits
Machine Language op L B1 D1 B2 D2 80A-
Instruction Format 6=X’804’=2052 = 6 bytes

19
 Instruction Formats (continued...)
[Note: Length field L is one less in machine language than in assembly language in
SS1 type]

Instruction Sample Instruction

No. Type Instruction Formats
Values Length
Assembly Language
SS1 – MIXED Instruction Format
op S1(L),D2(B2)
Operand 1 X=700, base
Assembly Language CLC X(8),15(4) replaced register is 12
Effective
Instruction example thus B1=C, base
address = CLC 1786(8,12),15(4)
6d. address=6,
Address of X & Machine Language displacement D1 8 + 8 + 4 +12
operand 2 EA D5 07 C 6FA 4 00F =700-6=X’6FA’
converted =1786
+ 4 + 12
= R4 content
+ 15 Machine Language = 48 bits
op L B1 D1 B2 D2
Instruction Format = 6 bytes
Assembly Language
Instruction Format
op S1(L),S2 X=700, Z=80A,
base register is
SS1 – MIXED
12 thus
Operand 1 Assembly Language CLC X(8),Z replaced by B1=B2=C, base
Effective Instruction example CLC 1786(8,12),2052(12) address=6,
6e. address = displacement D1
=700-6=X’6FA’
Address of X & Machine Language D5 07 C 6FA C 804 =1786 and
8 + 8 + 4 +12
operand 2 EA converted displacement D2
+ 4 + 12
= Address of Z = 80A-6=X’804’ = 48 bits
Machine Language op L B1 D1 B2 D2 =2052
Instruction Format = 6 bytes

20
 Instruction Formats (continued...)
[Note: Length fields L1 & L2 are one less in machine language than in assembly
language in SS2 type]

No. Instruction Instruction Formats

Sample Instruction
Type Values Length
Assembly Language
SS1 – MIXED Instruction Format
op S1,D2(B2)
X=700, length of
Operand 1
Assembly Language CLC X,15(4) replaced X=8, base
Effective register is 12
Instruction example CLC 1786(8,12),15(4) thus B1=C, base
6f. address =
Address of X & address=6,
Machine Language D5 07 C 6FA 4 00F displacement D1 8 + 8 + 4 +12
operand 2 EA converted =700-6=X’6FA’ + 4 + 12
= R4 content =1786
+ 15 Machine Language = 48 bits
op L B1 D1 B2 D2
Instruction Format = 6 bytes

SS2 – Assembly Language

Instruction Format
op D1(L1,B1),D2(L2,B2)
EXPLICIT
Operand 1 Assembly Language
Effective Instruction example
CP 12(8,3),15(10,4)
7a. address = R3
Machine Language 8+4+4+4
content + 12 & F9 7 9 3 00C 4 00F
converted + 12 + 4 + 12
operand 2 EA
= R4 content Machine Language = 48 bits
op L1 L2 B1 D1 B2 D2
+ 15 Instruction Format = 6 bytes

21
 Instruction Formats (continued...)
[Note: Length fields L1 & L2 are one less in machine language than in assembly
language in SS2 type]

Instruction Sample Instruction

No. Type Instruction Formats
Values Length
Assembly Language X=700, length of
op S1,S2 X=8 & len Z=10,
SS2 – Instruction Format
Z=80A, base
IMPLICIT register is 12
Operand 1 Assembly Language CP X,Z replaced by
thus B1=B2=C,
Effective Instruction example CP 1786(8,12),2052(10,12) base address=6,
7b. displacement D1
address = Machine Language =700-6=X’6FA’ 8+4+4+4
Address of X & converted F9 7 9 C 6FA C 804 =1786 and + 12 + 4 + 12
operand 2 EA displacement D2
= Address of Z Machine Language = 48 bits
op L1 L2 B1 D1 B2 D2 = 80A-6=X’804’
Instruction Format =2052 = 6 bytes
Assembly Language
Instruction Format
op D1(L1,B1),S2(L2)
SS2 – MIXED
Z=80A, base
Operand 1 Assembly Language CP 12(8,3),Z(10) replaced register is 12
Effective Instruction example CP 12(8,3),2052(10,12) thus B2=C, base
7c. address = R3 address=6,
Machine Language displacement D2 8+4+4+4
content + 12 & F9 7 9 3 00C C 804 = 80A-6=X’804’
operand 2 EA converted =2052
+ 12 + 4 + 12
= Address of Z Machine Language = 48 bits
op L1 L2 B1 D1 B2 D2
Instruction Format = 6 bytes

22
 Instruction Formats (continued...)
[Note: Length fields L1 & L2 are one less in machine language than in assembly
language in SS2 type]

Instruction Sample Instruction

No. Type Instruction Formats
Values Length
Assembly Language
Instruction Format
op D1(L1,B1),S2
SS2 – MIXED Z=80A, length of
Operand 1 Assembly Language CP 12(8,3),Z replaced Z=10, base
register is 12
Effective Instruction example CP 12(8,3),2052(10,12) thus B2=C, base
7d. address = R3 address=6,
content + 12 & Machine Language 8+4+4+4
F9 7 9 3 00C C 804 displacement D2
operand 2 EA converted = 80A-6=X’804’ + 12 + 4 + 12
= Address of Z =2052
Machine Language = 48 bits
op L1 L2 B1 D1 B2 D2
Instruction Format = 6 bytes
Assembly Language X=700, Z=80A,
Instruction Format
op S1(L1),S2(L2)
SS2 – MIXED base register is
12 thus
Operand 1 Assembly Language CP X(8),Z(10) replaced B1=B2=C, base
Effective Instruction example CP 1786(8,12),2052(10,12) address=6,
7e. address = displacement D1
Machine Language =700-6=X’6FA’ 8+4+4+4
Address of X & F9 7 9 C 6FA C 804 =1786 and
operand 2 EA converted + 12 + 4 + 12
displacement D2
= Address of Z Machine Language = 80A-6=X’804’ = 48 bits
op L1 L2 B1 D1 B2 D2 =2052
Instruction Format = 6 bytes

23
 Instruction Formats (continued...)
[Note: Length fields L1 & L2 are one less in machine language than in assembly
language in SS2 type]

Instruction Sample Instruction

No. Type Instruction Formats
Values Length
Assembly Language X=700, Z=80A,
Instruction Format
op S1(L1),S2 length of Z=10,
SS2 – MIXED base register is
Operand 1 CP X(8),Z replaced by 12 thus
Assembly Language
B1=B2=C, base
Effective Instruction example CP 1786(8,12),2052(10,12) address=6,
7f. address = displacement D1
Address of X & Machine Language =700-6=X’6FA’ 8+4+4+4
F9 7 9 C 6FA C 804
operand 2 EA converted =1786 and + 12 + 4 + 12
= Address of Z displacement D2
Machine Language = 48 bits
op L1 L2 B1 D1 B2 D2 = 80A-6=X’804’
Instruction Format =2052 = 6 bytes
Assembly Language X=700, length of
Instruction Format
op S1,S2(L2) X=8, Z=80A,
SS2 – MIXED base register is
Operand 1 CP X,Z(10) replaced by 12 thus
Assembly Language
B1=B2=C, base
Effective Instruction example CP 1786(8,12),2052(10,12) address=6,
7g. address = displacement D1
Address of X & Machine Language F9 7 9 C 6FA C 804 =700-6=X’6FA’ 8+4+4+4
operand 2 EA converted =1786 and + 12 + 4 + 12
= Address of Z displacement D2
Machine Language = 48 bits
op L1 L2 B1 D1 B2 D2 = 80A-6=X’804’
Instruction Format =2052 = 6 bytes

24
 Instruction Formats (continued...)
[Note: Length fields L1 & L2 are one less in machine language than in assembly
language in SS2 type]

Instruction Sample Instruction

No. Type Instruction Formats
Values Length
Assembly Language
SS2 – MIXED Instruction Format
op S1(L1),D2(L2,B2)
Operand 1 X=700, base
Assembly Language CP X(8),15(10,4) replaced register is 12
Effective
Instruction example CP 1786(8,12),15(10,4) thus B1=C, base
7h. address = address=6,
Address of X & Machine Language displacement D1 8+4+4+4
operand 2 EA converted
F9 7 9 C 6FA 4 00F =700-6=X’6FA’
=1786
+ 12 + 4 + 12
= R4 content
+ 15 Machine Language = 48 bits
op L1 L2 B1 D1 B2 D2
Instruction Format = 6 bytes
Assembly Language
SS2 – MIXED Instruction Format
op S1,D2(L2,B2)
X=700, length of
Operand 1
Assembly Language CP X,15(10,4) replaced X=8, base
Effective register is 12
Instruction example CP 1786(8,12),15(10,4) thus B1=C, base
7i. address =
Address of X & address=6,
Machine Language F9 7 9 C 6FA 4 00F displacement D1 8+4+4+4
operand 2 EA converted =700-6=X’6FA’ + 12 + 4 + 12
= R4 content =1786
+ 15 Machine Language = 48 bits
op L1 L2 B1 D1 B2 D2
Instruction Format = 6 bytes

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THANK YOU!
Questions?
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