Signal Integrity Analysis

of Gigabit Interconnects

Olie Kreidler
Tektronix, Inc.

1 Tektronix Confidential
Signal Integrity (SI): Digital Becomes
Analog
 “At high frequencies … crosstalk and signal reflections can be
perceived as logic triggers, and can be responsible for
erroneous signal patterns”
– EE Times, April 17, 1998, Special Section on Interconnects

2 Tektronix Confidential
Industry Trends and Issues
 On-going trends and issues
– Trends: faster rise times, clock frequencies, increasing interconnect
complexity
– Requirement: increasing need for signal integrity analysis and SPICE /
IBIS interconnect modeling
 New trends and requirements
– Trends:
 S-parameters and eye diagrams are becoming part of compliance testing for
passive PHY
 All standards currently are differential and serial
– Requirements
 Eye diagram and S-parameter compliance testing must be performed in
differential mode
 Frequency dependent losses need to be modeled

3 Tektronix Confidential
Outline
 Interconnect Measurement Accuracy Issues
 TDR/T and VNA Measurement Basics
App Note: “TDR and VNA Measurement Primer”
– Impedance Measurements and IConnect® True Impedance Profile
– Time Domain S-parameter Measurements
– Eye Diagram Measurements
– TDR Probing and Fixturing

4 Tektronix Confidential
 High-Speed Serial Data Link Analysis

The Measurement Challenge - A Closed

Eye

An “Open Eye” at a “Closed Eye” at

the Transmitter the Receiver

How to measure this

eye?

Tx + + path + + + + path + + Rcv Rcv

EQUALIZER
- - - - - - - -
path

The risetime of the channel is relatively slow compared to the very fast 1’st channel. i.e. modern channel’s risetime is
quite longer than the UI, thus the eye blures and ‘ISI’-s itself.

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 High-Speed Serial Data Link Analysis

The Serial Data’s Solution to a Closed

Eye
An “Open Eye” at a “Closed Eye” at
the Transmitter the Receiver

Equalize it!

Tx + + + Rx +
+ + path + + path + Rcv Rcv

EQUALIZER
EQ.
- - - - - - - -- -
path

Equalization is the answer for the digital receiver. The eye opens at the input of the receiver, the receiver can decode
the signal.

6 2007/06/10 Confidential V1.1

 High-Speed Serial Data Link Analysis
What should the Measurement do? - simple:
do what your Tx/Rx does: implement equalization!
An “Open Eye” at a “Closed Eye” at
the Transmitter the Receiver

Equalize
it!

Tx + + + Rx +
+ + path + + path + Rcv Rcv

EQUALIZER
EQ.
- - - - - - - -- -
path

Equalization is the answer to the eSerial receiver, so

SW-implemented Equalization on the scope is also the answer
to T&M.
-opens the eye for display (the scope-‘receiver’)
-Lets the user view ‘the inside’ of the Receiver
This is now in your
scope

7 2007/06/10 Confidential V1.1

Tek Solution
DSA8200 with the TDR Module
 80E04 reflected rise time:
– 35 ps
 80E10 reflected rise time
– 12ps / 15ps
 8 acquisition channels
– 8-port TDR
– 4-port True Differential TDR
 Continuously stabilized rho and
impedance waveforms
 All standard measurements available on
rho and impedance waveforms

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 TDR Overview - Typical System
Reflection

Incident
Sampler
Reflections

Incident Step Incident Step

Probe
50  50 
t = 0 Impedance
reference
Test device
Step Generator
TDR Waveform Characteristics
 TDR systems observe the superposition of incident
and reflected signals at source
 Time separation t1-t0 assures ability to discern
difference

Vreflected

Vincident

t0 t1 Time
TDR Rho Units Definition

Vreflected
 and   0 at Z  Z 0
Vincident
Amplitude
+1

0
Vreflected
Characteristic (Z = Z0)

Vincident
-1

t0 t1 Time
 KCL Applied at  Discontinuity
 Transmission lines support propagation with specific
characteristic impedance Z
 Reflected and forward propagating signals will be such that i
= 0 is satisfied at discontinuity
 Can easily solve for Z knowing , Z0, and KCL for lumped
circuits
Forward
Incident
Z
0
Step (Z = Z0)
Source

Discontinui
Reflected ty
Solution for Z Units

1  
Z  Z 0  
 Where
1  
– Z0 is the known reference impedance
– the sampling oscilloscopedirectly measures 
– Z is the calculated test device impedance
 Note textbooks usually show reversed expression

 Z  Z0 
   
 Z  Z0 
TDR Waveforms - Simple Cases

Waveforms with Open, Short and 50 terminations

Amplitude
+1 Open (Z =)

reflected =+1

0 (Z = 50)

incident=+1 reflected =-1

-1 Short (Z = 0)

t0 t1 Time
 TDS Measurement Basics
TDR Block Diagram
V V r e fle c te d
R in c id e n t

Panel
s o u rc e
C a b le : Z 0 , td D U T: Z DU T

TDR Oscilloscope Front

V R s o u rc e = 5 0 
Z0 = 50  Z te r m in a tio n
t h e n V in c id e n t = ½ V

O p e n c ir c u it
V Z > Z
V •Z lo a d / (Z lo a d + Z 0) lo a d 0

M a tc h e d lo a d
½ V ½ V

Z < Z
S h o r t c ir c u it lo a d 0
0 0

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TDR Measurements Basics
Inductance and Capacitance Analysis

S h u n t C d is c o n tin u ity
½ V Z Z
0 0

0
S e r ie s L d is c o n tin u i ty
½ V
Z 0 Z 0

L - C d is c o n tin u ity
½ V
Z 0 Z 0

C - L -C d is c o n tin u ity
½ V
Z 0 Z 0

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Measurement Tools: Z-line
Z-line-Based Measurements

t t
1 2 1 2 1
L   Z ( t )dt C  dt
2 t1 2 t1 Z ( t )

t1
t2

t1
t2

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TDR Measurements Basics
TDR Rise Time and Resolution
 Accepted rule of thumb for resolving two discontinuities

t s e p a ra te T o r e s o lv e a 1 a n d a 2 a s
s e p a r a te d is c o n tin u itie s :
a1 a2 t s e p a r a te > t T D R _ r is e tim e / 2

 80E04 TDR rise time: 30-40ps at the end of the cable, probe, fixture
– Base 1/2trise resolution: 15-20ps
– 0.1”-0.12” in FR4
 80E10 TDR rise time: 12-16ps at the end of the cable, probe, fixture
– Base 1/2trise resolution: 6-8ps
– 0.04”-0.048” in FR4

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TDR Measurements Basics
TDR Rise Time and Resolution
 More real case: resolving a single discontinuity

t s in g le
a 1 is n o t r e s o lv e d if
a1 t s in g le < < t T D R _ r is e tim e

 Going beyond the TDR resolution and risetime: relative

techniques
– Signal integrity modeling – JEDEC standard
– Failure analysis – golden device comparisons

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TDR Measurements Basics
TDR Rise Time and Resolution
 If 30-40 ps (or 12 ps) fast TDR  How in the world a 80 ps
rise time does not resolve it …. signal rise time
will????????????

 Conclusion: for SI analysis, use the actual DUT rise time!

(filter down the rise time, if necessary)

20 Tektronix Confidential
TDR Measurements Basics
Differential TDR
 Differential serial link analysis
 Virtual ground plane
 Even and odd mode measurements
R s o u rc e
C a b le : Z 0 , td
TDR Oscilloscope Front Panel

V
V ir tu a l g r o u n d D U T: Z DU T
V
V V in c id e n t
r e fle c te d

C a b le : Z 0 , td
R s o u rc e

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TDR Measurements Basics
Good Measurement Practices
 Perform calibration routines regularly
 Minimum warm-up time 20 minutes
 Maintain constant temperature in the lab and check the
instrument  t°
 Zoom in on the DUT – but include all the DUT signature
transitions (more to follow)
 Use torque wrenches when mating SMA or other RF connectors

22 Tektronix Confidential
Time and Frequency Domains
VNA Block Diagram

R source
Cable: Z 0
, td
V V

Port 1
VNA Front Panel

incident1 transmitted2

Port 2
V Calib ration
procedures: DUT
- SOLT V reflected1
- TRL
- LRRM

 VNA: Vector Network Analyzer

 Similar diagram can be drawn for reverse measurements (port
2 to port 1)
 Differential VNA: 4-port measurements

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Time and Frequency Domains
Equations for TDR vs. VNA

Vreflected Z load  Z 0 1 
TDR   Z DUT  Z0 
Vincident Z load  Z 0 1 

Vreflected 1 Z input ( DUT )  Z 0 1  S11

VNA S11   Z input ( DUT )  Z0 
Vincident 1 Z input ( DUT )  Z 0 1  S11

S11 ( f )  Duration Limited FFT (  ( t ))

S 21 ( f )  Duration Limited FFT ( ( t ))
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Time and Frequency Domains
TDR vs. VNA

 TDNA (Time Domain Network Analysis)

– Based on TDR/T measurements:
– Transient
– Broadband
– More intuitive for a digital designer
– Dynamic range: about 50-60dB
– Less expensive
 FDNA (Frequency Domain Network Analysis)
– Based on VNA measurements:
– Steady-state measurements
– Narrow-band
– More intuitive for microwave/RF designer
– More expensive
– Higher dynamic range (up to 110 dB)

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Time and Frequency Domains
Time or Frequency Domain?
 SI measurements do not require high dynamic range

V H IG H
-4 0 d B e q u a ls
1 % in tim e
d o m a in
V LOW

1 % (-4 0 d B ) X ta lk

 Compliance testing does not require high DR

– About –10 dB for insertion loss
– -25 to –35 dB for return loss
– Higher for frequency domain crosstalk

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Impedance Accuracy
TDR Basic Equations

V =
Vreflected Z load  Z 0 2 td m e a s u re d

  V in c id e n t + V r e fle c te d

Vincident Z load  Z 0
V in c id e n t

Z  Z0
Vreflected  Vincident  DUT 0
Z DUT  Z 0

1  V incident  V reflected V measured

Z DUT  Z0   Z0   Z0 
1  V incident  V reflected 2  V incident  V measured

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Impedance Accuracy
TDR Multiple Reflection Effects
 Issue: impedance accuracy suffers due to signal re-reflection
inside the DUT
Z0 Z1 Z2 Z3 Z4

Vtransmitted1

Vreflected1 Vreflected2

t0

Time Direction of propagation

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Impedance Accuracy
IConnect Computation of the True Impedance Profile

V reflected 1   1V incident 1
V reflected 2  t 12  2V incident 1   1V incident 2
V reflected 3  ( t 12 t 22  32  t 12  22  1 )V incident 1  t 12  2V incident 2   1V incident 3

Vreflected 1   k1 0 0  0  Vincident 1 
V    V 
 reflected 2   k 2 k1 0 0 0   incident 2 
Vreflected 3    k3 k2 k1 0  Vincident 3 
    
     0   
Vreflected n   k k n 1 kn 2  k1  Vincident n 
   n

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Impedance Accuracy
Board Trace IConnect® Z-line

Multiple reflections in
TDR waveform

Scope reads here about

44 Ohm instead of 50 Ohm

30 Tektronix Confidential
Impedance Accuracy
Board Trace IConnect® Z-line

Accurate impedance
profile in IConnect®

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Impedance Accuracy
Package Trace IConnect® Z-line

Raw TDR: confusing

multiple reflections

Impedance profile
in IConnect®:
Exact failure location,
improved resolution

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Impedance Accuracy
IConnect® Software Z-line Algorithm
 TDR measurements suffer from multiple reflections
– No limited to TDR, also in TD in VNA
 IConnect removes multiple reflections
– Ensures accurate impedance measurements in multi-impedance DUT
– Direct and accurate readout of Z, td, L, C
– Different and more accurate than Z readout in the scope
 Attention!:
– Data noise may interfere with accuracy
 Use scope averaging
 Use software noise filtering
– Line loss is extracted separately

33 Tektronix Confidential
Frequency Dependent S-parameters
Why S-parameters
 Compliance testing
– Insertion loss (around 6-10 dB)
– Return loss (around 20-30 dB)
– Frequency domain crosstalk
 Link performance evaluation and simulation
– Simulate S-parameters directly

34 Tektronix Confidential
Frequency Dependent S-parameters
Equations for TDR vs. VNA

Vreflected Z load  Z 0 1 
TDR   Z DUT  Z0 
Vincident Z load  Z 0 1 

Vreflected 1 Z input ( DUT )  Z 0 1  S11

VNA S11   Z input ( DUT )  Z0 
Vincident 1 Z input ( DUT )  Z 0 1  S11

S11 ( f )  Duration Limited FFT (  ( t ))

S 21 ( f )  Duration Limited FFT ( ( t ))

35 Tektronix Confidential
Frequency Dependent S-parameters
Single-ended TDR

T D R s tim u lu s o n c h a n n e l 1 , T D R s tim u lu s o n c h a n n e l 2 ,
re s p o n s e o n c h a n n e l 1 re s p o n s e o n c h a n n e l 1

 S11  TDR11 S12  TDT12 

 S  TDT 
S 22  TDR22 
 21 21

T D R s tim u lu s o n c h a n n e l 1 , T D R s tim u lu s o n c h a n n e l 2 ,
re s p o n s e o n c h a n n e l 2 re s p o n s e o n c h a n n e l 2

36 Tektronix Confidential
Frequency Dependent S-parameters
Correct Data Acquisition

DUT waveform
to settle to
steady DC level

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Frequency Dependent S-parameters
Return Loss = TDR
Measure TDR, compute S11 (return loss) in IConnect

What is
wrong with
this RL
picture?

38 Tektronix Confidential
Frequency Dependent S-parameters
Insertion Loss = TDT
Measure TDT, compute S21 (insertion loss) in IConnect

Test case
for loss
extraction

39 Tektronix Confidential
Frequency Dependent S-parameters
Differential and Mixed S-parameters
C o m m o n m o d e T D R s tim u lu s ,
D iffe r e n tia l T D R s tim u lu s , d iffe r e n tia l r e s p o n s e
d iffe r e n tia l r e s p o n s e (u s e fu l in tim e d o m a in fo r E M I
(m o s t im p o r ta n t) tr o u b le s h o o tin g )

 S dd 11  TDRdd 11 S dd 12  TDTdd 12 S dc11  TDRdc11 S dc12  TDTdc 12 

S S dc 22  TDRdc 22 
 dd 21  TDTdd 21 S dd 22  TDRdd 22 S dc 21  TDRdc 21
 S cd 11  TDRcd 11 S cd 12  TDTcd 12 S cc11  TDRcc11 S cc12  TDTcc12 
 
 S cd 21  TDTcd 21 S cd 22  TDTcd 22 S cc 21  TDTcc 21 S cc 22  TDRcc 22 

D iffe r e n tia l T D R s tim u lu s ,

C o m m o n m o d e T D R s tim u lu s ,
c o m m o n m o d e re s p o n s e
c o m m o n m o d e re s p o n s e
(u s e fu l in tim e d o m a in fo r
(le s s im p o r ta n t)
E M I tr o u b le s h o o tin g )
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Frequency Dependent S-parameters
Differential TDR = S11diff

Several InfiniBand
traces of different
length.

Differential return
loss.

41 Tektronix Confidential
 Demo of TDR and S parameter
measurements

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 Additional Material

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Frequency Dependent S-parameters
Power Plane Resonance

Observe plane
impedance
profile (Z-line)

Resonances
between planes

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Frequency Dependent S-parameters
Electrical Compliance Testing
 Need fixture to interface to interconnects for compliance testing

DUT Connection
Traces
Reference thru
Traces

Infiniband
Connector

46 Tektronix Confidential
Frequency Dependent S-parameters
VNA Fixture De-embedding
 For VNA requires additional standard to de-embed properly
 Insertion loss: fixture insertion loss must be subtracted from
DUT insertion loss
 Return loss: no way to de-embed without additional standards!
– Fixture return loss ends up being lumped with the DUT return loss
– Can be a problem even with quality fixtures

47 Tektronix Confidential
Frequency Dependent S-parameters
VNA Real Fixture Limitation Example

Spec:
-10 dB
at 1.25 GHz

With fixture, the cable

assembly is failing the spec!
Fixture is failing the assembly
with VNA measurements

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Frequency Dependent S-parameters
TD-VNA Fixture De-embedding
 Simplicity of calibration allows simple fixture de-embedding

Spec:
-10 dB
at 1.25 GHz

Fixture de-embedded
with TDNA, the
assembly is passing

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Frequency Dependent S-parameters
Correlation with Network Analyzer

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Frequency Dependent S-parameters
Correlation with Network Analyzer
0
FREQ, Ghz

2.0
0.5
1.0
1.5

2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
7.5
8.0
8.5
9.0
9.5
-5

-10 VNA SDD11, dB

-15 IConnect®
S11.wfm(dBMag). No
TDR calibration

-20

-25

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Frequency Dependent S-parameters
Correlation with Network Analyzer

Insertion Loss VNA TDA Comparison

Data courtesy Kieran Kelly, Samtec,Inc.

-2

-4
IL (dB)

VNA
-6
TDA

-8

-10

-12
000.0E+ 1.0E+9 2.0E+9 3.0E+9 4.0E+9 5.0E+9 6.0E+9 7.0E+9 8.0E+9 9.0E+9 10.0E+9
0
Frequency (Hz)

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Frequency Dependent S-parameters
Correlation with Network Analyzer: 65 GHz
The TD-VNA bandwidth is
0
 -5

directly related to TDR/T rise

S21 magnatude (dB)

-10
-15
time -20
-25
 These data were measured -30
VNA S21
using the PSPL Model 4022 and
-35
-40 4022 S21

a 70 GHz sampler -45

-50
0 10 20 30 40 50 60
 S-parameters correlate to frequency (GHz)

65 GHz
0

-10

 Courtesy: Kipp Schoen,

S11 m agnatude (dB)

-20

Picosecond Pulse Labs

-30

VNA
-40
4022
-50

-60
0 10 20 30 40 50 60
frequency (GHz)

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Frequency Dependent S-parameters
Calibrated Results: SOLT

Dashed line – Tektronix 11801 with SOLT cal

Solid line – Agilent 8510 VNA

 Excellent correlation between TDNA and FDNA data

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Frequency Dependent S-parameters
Noise Floor and Dynamic Range

 To reduce noise floor:

– Increase number of averages Navg
– Increase number of points Npoints
– Decrease acquisition window length (increase effective incident power)

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Frequency Dependent S-parameters
TD-VNA Incident Effective Power
 The TD-VNA 0

bandwidth
directly related -20 4022 10 ps
4022 10ps

to the risetime TDR

54754A25
25psps

of the TDR and -40

magnatude (dB)
TDT signals -60

-80

-100

-120

-140
0 20 40 60 80 100

frequency (GHz)

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Frequency Dependent S-parameters
TD-VNA Dynamic Range (with PSPL Module)

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Frequency Dependent S-parameters
IConnect Produces S-parameters
 Differential, mixed mode and single ended
 Insertion, return loss and frequency domain crosstalk
 Performance with base DSA8200: 50-60 dB dynamic range (vs.
100 dB for VNA), 12 GHz bandwidth
 Performance with 80E10 up to 50GHz bandwidth
 Cost ½ of a comparable VNA solution
 Intuitive, easy to use and more than adequate dynamic range
for digital designers

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TDT and IConnect Eye Diagram
Efficient S-parameters Testing in IConnect
 Easy, quick, efficient S-parameter measurements and electrical
compliance testing
– Insertion, return loss, frequency dependent crosstalk
– Excellent correlation with traditional VNA techniques
– Cost-effective and quick
 Minimal calibration required
– Only reference at the end of the fixture
– Easy fixture de-embedding

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TDT and IConnect Eye Diagram
Why Eye Diagram in IConnect?
 Eye Diagram for Interconnects
– Specification mask testing
– Not just communication standards, also for new serial link standards
 IConnect benefit: no pattern generator required for
interconnect eye diagram analysis
– De-embed deterministic / interconnect jitter
– No active component jitter

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TDT and IConnect Eye Diagram
Eye Diagram Degradation in Interconnects
 Interconnect losses
 Pattern-dependent, crosstalk induced jitter
 Method to improve the eye
– Equalization, pre-emphasis and de-emphasis
– Other signal conditioning techniques
 Only deterministic jitter exists in interconnects, no random
component!

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TDT and IConnect Eye Diagram
Eye Diagram Options

 TDT easily gives the eye

diagram degradation
– Deterministic jitter only

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TDT and IConnect Eye Diagram
New Eye Mask and Jitter Measurements

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TDT and IConnect Eye Diagram
Why is TDT Based Eye Better?
 Easy to de-embed fixture
– The same improvement as for S-parameter
measurements!
 No jitter from the pattern generator

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TDT and IConnect Eye Diagram
Predicted and Measured Eye Diagrams

Pattern Generator Based

IConnect IConnect
K28.5 PRBS 210-1

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TDT and IConnect Eye Diagram
Predicted and Measured Eye Diagrams

2^10-1 pattern 2^10-1 IConnect eye from

generator measurement TDT measurement

Data Courtesy FCI Electronics

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TDT and IConnect Eye Diagram
Predicted and Measured Eye Diagrams

1.5Gb/s
(Gen 1)

Simulated Measured

3.0Gb/s
(Gen 2)

Simulated Measured

Serial ATA data

courtesy Molex, Inc.
6.0Gb/s
(Gen 3)

Simulated Measured

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TDT and IConnect Eye Diagram
Efficient Eye Diagram Testing in IConnect
 Easy, quick, efficient eye diagram measurements and
compliance testing
– Excellent correlation with traditional pattern generator techniques
– Cost-effective and quick
 Minimal calibration required
– Only reference at the end of the fixture
– Easy fixture de-embedding

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Outline
 Interconnect Measurement Accuracy Issues
 TDR/T Probing and Fixturing
App Note: “TDR Measurement Primer”
App Note: “TDR Techniques for Characterization and Modeling of
Electronic Packaging”
Quick Guide:“Interconnect Probing Quick Guide”
 Interconnect SPICE / IBIS Modeling and Model Validation

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Probing and Fixturing
TDR Measurement Setup

TDR probe with signal

and ground connection

TDR oscilloscope

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Probing and Fixturing
Probing and Fixturing Issues
 Probing is the weakest link!
 Start with a probe
– 50 Ohm for TDR measurements
– must be rugged and inexpensive
– ensure stable repeatable contact
– large pitch* means small bandwidth
– variable pitch means poor repeatability
– ensure sufficient compliance

* Pitch: center-to-center signal to ground pad spacing

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 Probing and Fixturing
Package and Connector Probing
 Use a high-quality probe (and positioner)
 Need an interface adapter or fixture to probe
 Fixturing requirements
– Reproduce the real application environment
– Ensure easy fixture de-embedding (reference short and open structures
may be needed)

H ig h -
Speed P C B p r o v id e s g r o u n d
P C B p r o v id e s C o n n e c to r c o n n e c tio n s
S ig n a l- S ig n a l-
g ro u n d P C B tra c e to
R e fe re n c e G ro u n d G ro u n d
c o n n e c tio n s c o n n e c to r le a d
s h o rt a n d o p e n P ro b e P ro b e
F ix tu r e F ix tu r e
g ro u n d g ro u n d
p la n e p la n e
V ia s to
package P ackage V ia t o g r o u n d f o r r e f e r e n c e m e a s u r e m e n t s
le a d s
72 Tektronix Confidential
Probing and Fixturing
Board Probing
 Ensure good contact to a via
– Difficult for a microwave probe
– Use TDA’s QuickTDR™ probe
– Probes also available from TDR
manufacturers
 Ensure ground contacts near your
signals
 Variable pitch: a sad necessity
– Available from from TDR manufacturers and probe manufacturers
(Cascade Microtech, ICM)
– Measurements suffer from poor repeatability and decrease the
instrument usable bandwidth

73 Tektronix Confidential
Probing and Fixturing
Probing vs. Fixturing

Probing advantages: Fixturing advantages:

 Maximum flexibility for multiple
 Evaluate the DUT in its intended
device measurements environment of use (example:
package on a board)
 No fixture de-embedding required  Great flexibility for specific DUT
But: But:
 Requires DUT to have easily  Difficult to change after the fixture
accessible contact areas has been designed
 Positioning system may be  Must de-embed fixturing from
expensive measurements

 These approaches are complementary!

 Fixturing is thinking ahead about how you will probe!

74 Tektronix Confidential
Outline
 Interconnect Measurement Accuracy Issues
– Impedance, S-parameters and eye diagram measurements and compliance
testing
 Interconnect SPICE / IBIS Modeling and Model Validation
– Z-line, lossy line, and automatic behavioral modeling

75 Tektronix Confidential
Outline
 Interconnect Measurement Accuracy Issues
 Interconnect SPICE / IBIS Modeling and Model Validation
 Measurement Based Interconnect Analysis
– Behavioral Modeling: MeasureXtractor™
– Topological Modeling:
 TDT and Lossy Line Modeling
 Impedance Profile (Z-line) Transmission Line Modeling
 L and C JEDEC computation
– Examples:
 Power Plane Analysis
 Backplanes and cable assemblies

76 Tektronix Confidential
Measurement-Based Link Design
How to Analyze System Signal Integrity?

C o n n e c to r
Tx B o a rd C o n n e c to r
( s im p lif ie d
C a b le m o d e l)
A s s e m b ly
C o n n e c to r

D a u g h te rc a rd
C o n n e c to r
B a c k p la n e Rx

 Is this similar to your application?

 App Note: “Signal Integrity Modeling of Gigabit Backplanes,
Cables and Connectors Using TDR”

77 Tektronix Confidential
Measurement-Based Link Design
Interconnect Measurement Based Design

C o n n e c to r
B o a rd C o n n e c to r
( s im p lif ie d
C a b le m o d e l)
A s s e m b ly
C o n n e c to r

D a u g h te rc a rd
 Linearize the link input and C o n n e c to r

termination for initial B a c k p la n e

R e c e iv e r
analysis s im p lif ie d

78 Tektronix Confidential
Measurement-Based Link Design
Measurement Based Design Details
 Impedance measurement => reflections
 TDR/T or S-parameters => losses, jitter, eye diagram
degradation
– System losses is a result of losses in components
– Eye diagram is a result of losses and crosstalk in components

79 Tektronix Confidential
IConnect Modeling Methodology
Goals and Model Validity
 Goal: accurately predict interconnect performance via
simulations
– Need an accurate SPICE /IBIS models
 Model required range of validity is defined by the fast corner
rise time of the driver
– Equivalent bandwidth estimated as:
fbw=0.35 / trise or harmonics of clock
 It may be desired to extend the required range of model
validity beyond trise and fbw
– Have a confidence guard band

80 Tektronix Confidential
IConnect Modeling Methodology
Modeling Technique: Behavioral
 Behavioral Modeling: MeasureXtractor™
– A universal, fully automatic, exact
modeling technique
– Can use time or frequency domain data
– Matches exactly both time and frequency response
– Perfect for…
 Connector, package or socket modeling
 Model for a characterization fixture for a connector, a package or a cable
 Model for a daughtercard board
 When behavioral model is acceptable
– Can create large model for a large interconnect such as a backplane or
cable assembly

81 Tektronix Confidential
IConnect Modeling Methodology
Modeling Technique: Topological
 Lossy line and coupled lossy line modeling
– When need to predict losses and crosstalk
 Large lossy backplanes and motherboards
 Cables and cable assemblies

 Impedance profile (Z-line) models

– When losses are small
– Need to predict impedance reflections, crosstalk only
 Small daughtercards, boards
 Electrically long connectors, packages

82 Tektronix Confidential
IConnect Modeling Methodology
Modeling Technique: Topological
 JEDEC technique for L and C computation
– Industry standard technique for electrically short interconnects
– Electrically short: trise >> tprop delay
– Packages, connectors, sockets

tprop delay
trise

83 Tektronix Confidential
IConnect Modeling Methodology
Behavioral or Topological?
Behavioral Topological
Measurement Requires two-port or four- Just TDR (reflection) is
Requirements port measurements sufficient
Topology Automatic, no user User-controlled (easy and
selection intervention intuitive from TDR
measurements)
Extraction Automatic, no user User-driven; more labor
intervention intensive than behavioral
Type of “Black-box,” no internal Intuitive, easy “what-if”
models changes allowed scenario analysis
Limitation for Large model for long Efficient model extraction
long interconnects (backplanes, processes exist for large
interconnects cable assemblies) interconnects

84 Tektronix Confidential
IConnect Modeling Methodology
Methodology: Gbit Ethernet Example

Launch, high-speed connector: Cable and Test cards:

Z-line modeling lossy line modeling

Any piece can be modeled in Lumped pieces can be modeled

MeasureXtractor™ with JEDEC technique
85 Tektronix Confidential
IConnect Modeling Methodology
Measurement Based Approach
 TDR/T or VNA Measurements

 Extracted interconnect, instrument

source models

SPICE  Direct link to simulators

 Automatic comparison of simulation

and measurement in IConnect
waveform viewer

86 Tektronix Confidential
Outline
 Interconnect Measurement Accuracy Issues
 Interconnect SPICE / IBIS Modeling and Model Validation
 Behavioral Modeling: MeasureXtractor™
– Topological Modeling:
 TDT and Lossy Line Modeling
 Impedance Profile (Z-line) Transmission Line Modeling
 L and C JEDEC computation
– Examples:
 Power Plane Analysis
 Backplanes and cable assemblies

87 Tektronix Confidential
Behavioral Modeling
MeasureXtractor™ Modeling
 A fully automatic algorithm for conversion of VNA S-parameter
or TDR/T data into SPICE or IBIS model
– Passivity of the model guaranteed
– Compact and efficient
– Fully automated
– Not an optimization
– Behavioral models

88 Tektronix Confidential
Behavioral Modeling
Lack of Passivity Produces Oscillations

Slide
courtesy: Instability is a very
bad thing!

TERASPEED
CONSULTING
GROUP

89 Tektronix Confidential
Behavioral Modeling
Sources of Passivity Issues
 Insufficient attention to measurements or calibration
– Interconnects do not amplify signals!
– Even if individual measurements are passive, combined system
measurements can have amplification properties
 Simulator extrapolation and interpolation based on model, not
original measurement
 Finite measurement acquisition window (in the limit, the data is
infinite!)

90 Tektronix Confidential
Behavioral Modeling
Example: Correlation of Measurement and Model

Exact correlation in time

and frequency domains

91 Tektronix Confidential
Behavioral Modeling
Example: Model Listing

…
.subckt DUT port1 gnd_ r14 port1 15 -1898.27 c33 34 gnd_ 7.10021e-016
r1 port1 2 -24977.9 r15 port1 16 -971048 r90 35 gnd_ 3622.1
r2 port1 3 23982.9 r16 port1 17 2103.52 c34 35 gnd_ -7.10021e-016
r3 port1 4 -12111 r17 port1 18 15884.8 r91 36 37 176812
r4 port1 5 3124.2
r5 port1 6 -2348.66
r18 port1 19 326913
r19 port1 20 6566.94
… r92 36 gnd_ 57641.7
c35 36 gnd_ 7.15572e-016
r6 port1 7 14099.3 r20 port1 21 1508.55 r93 37 gnd_ 3932.13
r7 port1 8 -4392.43
r8 port1 9 1444.76
r21 port1 22 -885.906
r22 port1 23 4789.5
… c36 37 gnd_ -7.15572e-016
r94 38 gnd_ -2488.86
r9 port1 10 1.1046e+007 r23 port1 24 2788.21 c37 38 gnd_ -3.07009e-015

…
r10 port1 11 -301858 r24 port1 25 -14075.7 r95 39 gnd_ 5982.67
r11 port1 12 3622.64 r25 port1 26 -18495.7 c38 39 gnd_ -2.49077e-014
r12 port1 13 -1221.14 r26 port1 27 -1786.85 .ends
r13 port1 14 6965.14 r27 port1 28 -27328.6
… …

92 Tektronix Confidential
Behavioral Modeling
MeasureXtractor™ Summary
 Converts S-parameters or TDR/T data into an exact-match
model
 Passivity is guaranteed
 If you can measure it, and want model it with little effort, use
MeasureXtractor™!

93 Tektronix Confidential
Outline
 Interconnect Measurement Accuracy Issues
 Interconnect SPICE / IBIS Modeling and Model Validation
 Topological Modeling:
 TDT and Lossy Line Modeling
App Note: “Practical Characterization of Lossy Transmission Lines Using TDR”
 Impedance Profile (Z-line) Transmission Line Modeling
 L and C JEDEC computation
– Examples:
 Power Plane Analysis
 Backplanes and cable assemblies

94 Tektronix Confidential
TDT and IConnect Lossy Lines
TDT and Lossy Line Modeling Is For:
 Long lossy transmission lines in backplanes and motherboards
 Long lossy cables

95 Tektronix Confidential
TDT and IConnect Lossy Lines
Loss Example: Time and Frequency Domain

96 Tektronix Confidential
TDT and IConnect Lossy Lines
Skin Effect vs. Dielectric Loss

Typical FR-4 50 Ohm Trace

97 Tektronix Confidential
TDT and IConnect Lossy Lines
Different Loss Modeling Approaches
 Lumped (behavioral)
– Defined for all frequencies
– Slow for long lines
 Distributed
– Based on parameters (Rskin, Gdielectric)
 Defined for all frequencies
 Not as general
– Based on RLGC data
 General for quasi-TEM
 Not defined for all frequencies

98 Tektronix Confidential
TDT and IConnect Lossy Lines
Causality in TEM Models
 From basic physics, the real and imaginary parts of the
dielectric constant are tightly related to ensure causality.
 The same is true of the permeability constant, 
 In TEM modeling, this means that R and L are related, and G
and C are related
 Models based on RLGC data (or S-parameters) should address
this issue !!!

99 Tektronix Confidential
TDT and IConnect Lossy Lines
Our Model Extraction Approach
 Assume standard simulator equations:
Z  Rdc  Rac f  jL
Y  Gdc  Gac f  jC 
 Two extraction methods:
– Open circuit reflection (TDR, one port)
– Matched circuit transmission (TDR, TDT, two-port)
 Extract loss parameters: Rdc, Rac, Gdc, Gac, L, C
 Write resulting model in various formats
– Lumped
– Distributed with parameters
– Distributed with RLGC data

100 Tektronix Confidential

TDT and IConnect Lossy Lines
Example: Extraction Results (Transmission)

Extracted skin effect and

dielectric loss parameters

Simulated and measured

transmission

101 Tektronix Confidential

TDT and IConnect Lossy Lines
Symmetrical Lossy Coupled Line Model

T D R s o u rc e 1

B o a r d li n e s

T D R s o u rc e 2

 Assumptions:
– The lines are symmetrical
– TDR steps are symmetrical
– TDR steps arrive at the lines at the same time at the beginning of both
lines

102 Tektronix Confidential

IConnect Differential TDR Techniques
Even/Odd vs. Common/Differential

Lself  Lm Lself  Lm
Z odd  Z even 
C tot  C m C tot  C m

t odd  l L self  Lm  C tot  C m  t even  l L self  Lm  C tot  C m 

Z differential  2  Z odd Z even

Z common 
2
t differential  t odd t common  t even

103 Tektronix Confidential

IConnect Differential TDR Techniques
Even and Odd Impedance Profile Example

Zeven>Zself>Zodd
teven>tself>todd

 Note:
- Odd mode = differential measurement (two TDR sources of opposite polarity)
- Even mode = common mode measurement (two TDR sources of the same polarity)

104 Tektronix Confidential

TDT and IConnect Lossy Lines
Example: Extraction Results (Reflection, Coupled)

Both self and

mutual parameters
are extracted

105 Tektronix Confidential

Outline
 Interconnect Measurement Accuracy Issues
 Interconnect SPICE / IBIS Modeling and Model Validation
 Topological Modeling:
 Impedance Profile (Z-line) Transmission Line Modeling
App Note: “PCB Interconnect Characterization from TDR Measurements”
App Note: “Characterization of Differential Interconnect from TDR Measurements”
 L and C JEDEC computation
– Examples:
 Power Plane Analysis
 Backplanes and cable assemblies

106 Tektronix Confidential

IConnect Single-ended TDR Techniques
Single Transmission Line Modeling Is For:
 Short (lossless) transmission lines
 Electrically long packages (longer than Trise)
 Electrically long connectors (longer than Trise)

107 Tektronix Confidential

IConnect Single-ended TDR Techniques
Transmission Line Z and td
 Directly available from impedance profile
 Eliminate confusion about:
– Exact impedance value
– Exact electrical length of the lines

Z01

Z02

td

108 Tektronix Confidential

IConnect Single-ended TDR Techniques
Via L and C

t t
1 2 1 2 1
L   Z ( t )dt C  dt
2 t1 2 t1 Z ( t )

t1
t2

t1
t2

109 Tektronix Confidential

IConnect Single-ended TDR Techniques
IConnect® Modeling Process

Simulate,
compare
Extract and verify
Process model
Measure data
and acquire

110 Tektronix Confidential

IConnect Single-ended TDR Techniques
Modeling in IConnect Software

* Name: Automatically Generated

.subckt Single port1 port2 gnd_
****** Partition #1
c1 port1 gnd_ 456f
l1 port1 1 1.05n
****** Partition #2
t1 1 gnd_ 2 gnd_ Z0=50.8 TD=125p
…………..
****** Partition #4
t3 3 gnd_ port2 gnd_ Z0=48.2
TD=190p
.ends

111 Tektronix Confidential

IConnect Single-ended TDR Techniques
Prepare to Simulate and Validate

112 Tektronix Confidential

IConnect Single-ended TDR Techniques
Simulation and Validation Results

113 Tektronix Confidential

IConnect Single-ended TDR Techniques
Using Rise Time Filtering to Achieve Simple Models

114 Tektronix Confidential

IConnect Differential TDR Techniques
Coupled Transmission Line Modeling Is For:
 Differential transmission lines
 Differential connectors and packages that are electrically long
(longer than Trise)
 Crosstalk prediction (differential and single ended, forward,
backward)
 Crosstalk induced jitter prediction

115 Tektronix Confidential

IConnect Differential TDR Techniques
Differential Line Modeling
 Short interconnect
– Use lumped-coupled model

 Long interconnect
– Split lines in multiple segments

 Longer yet interconnect

– Symmetric distributed coupled line model
– For longer lines, use lossy approach instead
Z odd , to d d

Z odd , to d d

-Z odd / 2 , to d d

Z e v e n/ 2 , te v en

116 Tektronix Confidential

IConnect Differential TDR Techniques
IConnect Differential Line Modeling

117 Tektronix Confidential

IConnect Differential TDR Techniques
Composite Model Generation

* Name: Automatically Generated

.subckt Symmetric 1 2 3 4 5
****** Partition #1
t1 1 5 6 5 Z0=49.7 TD=92.3p
t2 3 5 7 5 Z0=49.7 TD=92.3p
****** Partition #2
l1 6 8 19n
c1 8 5 6.44p
l2 7 9 19n
c2 9 5 6.44p
c3 8 9 716f
k1 l1 l2 207m
.ends

118 Tektronix Confidential

IConnect Differential TDR Techniques
Model Validation in IConnect

119 Tektronix Confidential

IConnect Differential TDR Techniques
Coupled LC Computation in IConnect

120 Tektronix Confidential

Outline
 Interconnect Measurement Accuracy Issues
 Interconnect SPICE / IBIS Modeling and Model Validation
 Topological Modeling:
 L and C JEDEC computation
App Note: “TDR Techniques for Characterization and Modeling of Electronic Packaging”
– Examples:
 Power Plane Analysis
 Backplanes and cable assemblies

121 Tektronix Confidential

IConnect Short Interconnect Modeling
When is Interconnect Lumped?

tprop delay
trise

Practical rule of “short” or “lumped” (RLC)

interconnect

trise > tprop delay• (2 or 3)

122 Tektronix Confidential

IConnect Short Interconnect Modeling
Short Interconnect Modeling is Used For:
 IC packages
 Connectors
 Sockets
 Vias on the board

 Use only when short compared to Trise !!!

123 Tektronix Confidential

IConnect Short Interconnect Modeling
Single Parasitic Inductance

R V in c id e n t

Panel
s o u rc e L
C a b le : Z 0 , td
TDR Oscilloscope Front

V V r e f le c t e d

V t 

 V  Vref short dt

TD R
1 2 Z0
V
L L   Z ( t )dt  TDR
re f s h o rt 2 t1 V t1

124 Tektronix Confidential

 IConnect Short Interconnect Modeling
Single-Ended TDR:
Package Lead Inductance L Measurements

W V in d u c e d
TDR
P ackage
T D R in to t h e u n d e r te s t L L
W

s
p a c k a g e le a d m u tu a l

ad
s h o rt

le
S h o r t le a d
e V
ag
e n d s to b a c k g r o u n d n o is e
ck

M e a s u r e r e f le c t io n
g ro u n d
Pa

M e a s u re n e a r-e n d 
Z
c r o s s t a lk in a d ja c e n t Lself  0   (WTDR  W short )dt
le a d 2 V 0
 TDR waveform: 
Z
– TDR into package lead. Lmutual  0   (Winduced  Wbackground )dt
 Short all the leads to ground on the 2 V 0
inside of the package.
 Short the leads that are not being
measured to ground on the outside of
the package.
 Induced waveform:
 Measure near end crosstalk with far end
of the victim shorted
 Short waveform:
– TDR into the “short”; connect the probe  Background waveform:
signal contact to ground on a conductive  Corrects for the noise and scope DC
(metal) pad offset

125 Tektronix Confidential

IConnect Short Interconnect Modeling
Single Parasitic Capacitance

R V in c id e n t

Panel
s o u rc e
C a b le : Z 0 , td

TDR Oscilloscope Front

O pen
V V C
r e f le c t e d

V ref o p e n t 

 V  VTDR dt
1 2 1 1
C
C  dt  ref open
V TD R
2 t1 Z ( t ) Z 0V t1

126 Tektronix Confidential

 IConnect Short Interconnect Modeling
Single-Ended TDR:
Package Lead Capacitance C Measurements

W V in d u c e d
open

P ackage C
T D R in to t h e u n d e r te s t
C m u tu a l
W
ds
p a c k a g e le a d TDR
lea K e e p le a d V
e
b a c k g r o u n d n o is e
ag

ends open
ck

M e a s u r e r e f le c t io n
Pa


1
M e a s u re n e a r-e n d
c r o s s t a lk in a d ja c e n t C self    (Wopen  WTDR )dt
le a d 2  Z 0 V 0

1
2  Z 0 V 0
C mutual   (Winduced  Wbackground )dt
 TDR waveform:
– TDR into package lead
 Short the leads that are not being
measured to ground on the outside of
 Induced waveform:
the package – Measure near end crosstalk with far end of
the victim open-ended
 Open waveform:
– TDR into the “open”;disconnect the  Background waveform:
probe from the DUT or remove the DUT – Corrects for the noise and scope DC offset
from the fixture

127 Tektronix Confidential

IConnect Short Interconnect Modeling
Input Die Capacitance Measurement

128 Tektronix Confidential

IConnect Short Interconnect Modeling
Even-Odd Mode L and C Measurements
 Compute C and L in even and odd mode
M e a s u r e o d d m o d e T D R w it h P ackage
d if f e r e n t ia l s t im u lu s , a n d u n d e r te s t

ds
e v e n m o d e T D R w it h c o m m o n

l ea
m o d e s t im u lu s

e
ag
ck
Pa
T D R in t o t h e t w o a d ja c e n t
s o c k e t le a d w it h d if f e r e n t ia l a n d
c o m m o n m o d e s t im u lu s

C self  Ceven Lself 

 Leven  Lodd 
2
Cmutual 
 Ceven  Codd 
Lmutual 
 Leven  Lodd 
2 2
129 Tektronix Confidential
IConnect Short Interconnect Modeling
Even-Odd Mode Impedance Profile
 Compute C and L from even and odd Z-line
M e a s u r e o d d m o d e T D R w it h P ackage
d if f e r e n t ia l s t im u lu s , a n d u n d e r te s t

ds
e v e n m o d e T D R w it h c o m m o n

l ea
m o d e s t im u lu s

e
ag
ck
Pa
T D R in t o t h e t w o a d ja c e n t
s o c k e t le a d w it h d if f e r e n t ia l a n d
c o m m o n m o d e s t im u lu s

Lself 
1
 Z event even  Z odd t odd  1  t odd t 
C tot    even 
2 2  Z odd Z even 

1  t odd t 
1 Cm    even 
Lm   Z event even  Z odd t odd  2  Z odd Z even 
2
Ctotal = Cself + Cm

130 Tektronix Confidential

Outline
 Interconnect Measurement Accuracy Issues
 Interconnect SPICE / IBIS Modeling and Model Validation
 Examples:
 Power Plane Analysis
 Backplanes and cable assemblies

131 Tektronix Confidential

Power Plane Analysis
Power Distribution Network (PDN) Test Vehicle

P r o b e p la c e m e n t a t p o in t
o f p o w e r a p p lic a t io n 3"

1 3/8" (35mm)
V ia c o n n e c tio n to b o tto m p la n e
P a d c o n n e c tio n to to p p la n e

R e f e r e n c e s h o r t c o n n e c t io n f o r
in d u c ta n c e m e a s u r e m e n t
T o p p la n e

P o in t o f p o w e r d e liv e r y

132 Tektronix Confidential

Power Plane Analysis
PDN Equivalent Models

R L
R C
C

R C L
R C L 1

C 2

133 Tektronix Confidential

Power Plane Analysis
PDN Capacitance Measurements

134 Tektronix Confidential

Power Plane Analysis
PDN Impedance

135 Tektronix Confidential

Power Plane Analysis
PDN Resonance: Analysis for Bypass Caps

136 Tektronix Confidential

Power Plane Analysis
PDN Model Validation

137 Tektronix Confidential

Power Plane Analysis
PDN Model Accuracy

138 Tektronix Confidential

Power Plane Via
Power Via Inductance

Leven  Lodd Leven  Lodd

Lself  Lmutual 
2 2

1 1
Lself   Z even t even  Z odd t odd  Lmutual   Z even t even  Z odd t odd 
2 2

139 Tektronix Confidential

Power Plane Via
Example: Via Modeling
Correlation between simulation and
measurement

***** Partition #1
l1 port1 1 1.9n
l2 port3 2 1.9n
k1 l1 l2 200m

140 Tektronix Confidential

Outline
 Interconnect Measurement Accuracy Issues
 Interconnect SPICE / IBIS Modeling and Model Validation
 Examples:
 Backplanes and cable assemblies

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Putting It All Together
Complete Topological Modeling Methodology
 Connectors, packages:
– Short structures => use lumped elements (LC) or lossless T-lines
– Use the true impedance profile approach
 Cables – lossy transmission line
 Backplane traces – lossy transmission line
 Combine the model and verify the accuracy with simulations
 Note that MeasureXtractor™ can do any of that! (behaviorally)

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Single-ended Example
Example: IConnect-Extracted Model

W-line
L=198nH, C=69.7pF
Ro=0.18 Ohm
Rs=0.2uOhm
LC T-line CLC Gd=6.7nS (nMho)
L=700pH Z=53 Ohm L=6nH (long => lossy)
C=280fF Td=520ps C=1.5pF
(short => lossless)

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Single-ended Example
Simulation Results

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Differential Example
Backplane Example

Courtesy FCI Electronics

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Differential Example
Backplane Example: PCI-X Eye Diagram

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Differential Example
Backplane Example
 Differential measurement, full mode analysis

Daughter Card Backplane Daughter Card

Connector Connector
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Differential Example
Daughter Card and Backplane Models

Daughter Card
Model (odd mode)

Backplane
Model
(odd mode)

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Differential Example
Full Daughter Card Modeling

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Differential Example
Full Backplane Modeling

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Differential Example
Simulation Results

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Differential Example
Jitter De-Embedding: Daughter Card Only

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Differential Example
Jitter De-Embedding: Backplane Only

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Outline
 Interconnect Measurement Accuracy Issues
– Impedance, S-parameters and eye diagram measurements
 Interconnect SPICE / IBIS Modeling and Model Validation
– Z-line, lossy line, and automatic behavioral modeling

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