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I2C Communication Protocol

I2C is a serial communication protocol used to connect low-speed peripherals to microcontrollers. It uses only two bidirectional open-drain lines: Serial Data Line (SDA) and Serial Clock Line (SCL). Devices communicate by addressing and transferring data in frames that are acknowledged by the receiver. I2C supports multiple masters and slaves and can be used to connect sensors, memory, and other peripherals to microcontrollers. Examples of I2C devices include temperature sensors, LCD displays, and EEPROM memory chips.

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356 views34 pages

I2C Communication Protocol

I2C is a serial communication protocol used to connect low-speed peripherals to microcontrollers. It uses only two bidirectional open-drain lines: Serial Data Line (SDA) and Serial Clock Line (SCL). Devices communicate by addressing and transferring data in frames that are acknowledged by the receiver. I2C supports multiple masters and slaves and can be used to connect sensors, memory, and other peripherals to microcontrollers. Examples of I2C devices include temperature sensors, LCD displays, and EEPROM memory chips.

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yuosef hababa
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© © All Rights Reserved
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I2C COMMUNICATION PROTOCOL

Done by :
George Bannoura 21610234
Sumaya Omar 21610691
Duaa Barghouthi 21611122
Alzahra Yassir 21610600
What to expect:

• History and development • What message looks like • Multiple masters


& multiple slaves
• What is l2c • Addressing • Advantages and
disadvantages
• communication • Data frame • Examples of I2C in
microcontrollers .
• What are SDA and SCL • Handshaking

• How I2C works • Single Master & Multiple


slaves
History and development

 Developed by Philips semiconductor in late 1980s,


for tv sets.

 Version 1.0 was published in This version supports


standard (100 Kbps) and fast(400 Kbps) mode.

 Version 2.0 was published in The high-speed mode


(3.4 Mbps) was added.
WHAT IS I2C:

• {I2C } or the Inter-Integrated Circuit.


• Its a serial communication protocol, is that data is transferred bit by bit
along a single wire (the SDA line).
• The I2C interface (I2C1, I2C2) can operate in master or slave modes.
• Each I2C interface can support Standard mode (Sm, up to 100 kbit/s),
Fast mode (Fm, up to 400 kbit/s) and Fast Mode Plus (Fm+, up to 1
Mbit/s).
• I2C is synchronous, so the output of bits is synchronized to the sampling
of bits by a clock signal shared between the master and the slave.
COMMUNICATION:

• I2C uses only two wires one to


transmit data (SDA)
• one to transmit clock (SCL) The clock
signal is always controlled by the
master.
• it works in two modes which are
master mode that works as a
MicroController Unit(MCU) and
another slave mode that works as
memory.
How I2C works: Messages.
 Data is transferred in Messages.
 Each message has only one address frame that contains the binary address
of the slave.
 Each message has one or more frame of data that contain the data being
transmitted.
 Start condition.
 Stop Condition.
 read/write bits.
 ACK/NACK bits between each data frame.
What Message looks like 1/2:
What Message looks like 2/2:
Start condition:

Used to indicate that a device would like to transfer data on the I2C bus
Represented by the SDA line going low when the clock (SCL) signal is high
Will initialize the I2C bus.

Stop Condition:
A condition that a device wants to release the I2C bus represented by the
SDA signal going high when the SCL signal is high Once the stop condition is
complete, both the SCL and SDA signals are high. This is the idle bus.
Addressing:
 A 7 or 10 bit sequence unique to each slave that identifies the slave
when the master wants to talk to it.

 The salve I2C needs a way to know that the data is sent to it not to
another slave,We do that by addressing.

 We use address frame which is the first frame after start bit.

 The master sends the address of the slave it wants to communicate with
to every slave connected to it.
READ/WRITE BIT:
 The address frame includes a single bit at the end that informs the slave
whether the master wants to write data to it or receive data from it.

 If the master wants to send data to the slave, the read/write bit is a low
voltage level. If the master is requesting data from the slave, the bit is a
high voltage level.

ACK/NACK Bit:
 Each frame in a message is followed by an acknowledge/no-acknowledge
bit. If an address frame or data frame was successfully received, an ACK
bit is returned to the sender from the receiving device.
THE DATA FRAME

 After the master detects the ACK bit from the slave, the first data frame is
ready to be sent.

 Each data frame is immediately followed by an ACK/NACK bit to verify that


the frame has been received successfully.

 After all of the data frames have been sent, the master can send a stop
condition to the slave to halt the transmission.
Arbitration

 In the event two or more


master devices attempt to
begin a transfer at the
same time.

 an arbitration scheme is
employed to force one or
more masters to give up
the bus.
I2C BLOCK DIAGRAM
Register for i2c operation

1- I2C Address Register(IBAD):


 Contains an address to which it will respond when the I2C module
is configured as a slave device.

2- I2C Data Register(IBDR):

 IN master transmit mode, a data transfer is started whenever this


register is written into. the most significant bit is a shifted out first .
 In master receive mode, reading this register initiates the reception
of the next byte .
Control register(IBCR)
Status Register(IBSR)
I2c frequency divider register(ibfd)

 Four timing requirements to be met :


• SCL divider
• SDA hold time
• SCL hold time for start condition
• SCL hold time for stop condition
Handshaking 1/6:
 Start Condition Used to indicate that a device would like to transfer data on the
I2C bus .
 Represented by the SDA line going low when the clock (SCL) signal is high Will
initialize the I2C bus.
Handshaking 2/6:
 The master sends each slave the 7 or 10 bit address of the slave it wants to
communicate with, along with the read/write bit:
Handshaking 3/6:
  Each slave compares the address sent from the master to its own address.
 If the address matches, the slave returns an ACK bit by pulling the SDA line
low for one bit.
 If the address from the master does not match the slave’s own address, the
slave leaves the SDA line high.
Handshaking 4/6:
 The master sends or receives the data frame:
Handshaking 5/6:
 After each data frame has been transferred, the receiving device returns
another ACK bit to the sender to acknowledge successful receipt of the
frame:
Handshaking 6/6:
 A condition that a device wants to release the I2C bus.
 Is represented by the SDA signal going high when the SCL signal is high.
 Once the stop condition is complete, both the SCL and SDA signals are
high (This is the idle bus).
SINGLE MASTER WITH MULTIPLE SLAVES

 Because I2C uses addressing, multiple


slaves can be controlled from a single
master.
 With a 7 bit address, 128 (27) unique
address are available.
 Using 10 bit addresses is uncommon, but
provides 1,024 (210) unique addresses.
  To connect multiple slaves to a single
master, wire them like this, with 4.7K Ohm
pull-up resistors connecting the SDA and
SCL lines to Vcc.
MULTIPLE MASTERS WITH MULTIPLE SLAVES 1/2

 Multiple masters can be connected to


a single slave or multiple slaves.

 The problem with multiple masters in


the same system comes when
two masters try to send or receive data
at the same time over the SDA line.

 To solve this problem, each master


needs to detect if the SDA line is low or
high before transmitting a message.
MULTIPLE MASTERS WITH MULTIPLE SLAVES 2/2

 If the SDA line is low, this means that


another master has control of the bus, and
the master should wait to send the message.

 If the SDA line is high, then it’s safe to


transmit the message. 

 To connect multiple masters to multiple


slaves, use the following diagram, with
4.7K Ohm pull-up resistors connecting the
SDA and SCL lines to Vcc.
ARM to I2C Interface example
ARM to I2C Interface example
ADVANTAGES

 Supports multiple masters and


multiple slaves

 ACK/NACK bit gives confirmation that


each frame is transferred successfully
 Hardware is less complicated than
with UARTs

 Well known and widely used


protocol
DISADVANTAGES

 Slower data transfer rate than


SPI

 The size of the data frame is


limited to 8 bits

 More complicated hardware
needed to implement than SPI
Examples of I2C in Microcontrollers

PCF 8574
Grove – I2C Hub (6 Port) MCP 23017
Comparison between I2C and SPI
THE END
For any questions refer to the working team

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