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Irregular Sequence Counter - DLC Presentation

An irregular sequence counter was designed to display the sequence 5, 3, 6, 7, 2. The design process involved: 1) Developing a state diagram and truth table showing the next state for each combination of inputs and present states. 2) Deriving the logic equations for the D flip-flops using K-maps. 3) Implementing the counter circuit using the D flip-flop logic equations. 4) Verifying the design through simulation, which successfully counted through the desired sequence of 5, 3, 6, 7, 2.

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Promiti Sarker
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45 views10 pages

Irregular Sequence Counter - DLC Presentation

An irregular sequence counter was designed to display the sequence 5, 3, 6, 7, 2. The design process involved: 1) Developing a state diagram and truth table showing the next state for each combination of inputs and present states. 2) Deriving the logic equations for the D flip-flops using K-maps. 3) Implementing the counter circuit using the D flip-flop logic equations. 4) Verifying the design through simulation, which successfully counted through the desired sequence of 5, 3, 6, 7, 2.

Uploaded by

Promiti Sarker
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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Irregular sequence Counter

COURSE : DIGITAL LOGIC & CIRCUITS


SECTION :O
INSTRUCTOR : NAFIZ AHMED CHISTY
Group Information
SL Name ID

1 UMMA SHARA ALI SETU 20-43223-1

2 MOHAMMAD SHUVO ALI 20-43240-1

3 PRIYAM SARKER 20-42989-1


Introduction
• A counter is a device which stores the
number of times a particular event or process
has occurred, often in relationship to a clock.
The most common type is a sequential digital
logic circuit with an input line called the clock
and multiple output lines.
• Irregular sequence is a synchronous counter
where the desired sequence can be displayed
by a HEX decimal counter in the sequence
which might be an arbitrary sequence where
the numbers aren’t one after another
Applications of Counters
• Frequency counters
• Digital clocks
• Analog to digital convertors
• Design digital triangular wave
generator
• Microwave ovens
• Washing machines
Design Process
• Step 1: Develop a state Diagram
• Step 2: Develop a Next-state table
• Step 3: Create a flip-flop transition table
• Step 4: Use K-map to derive the logic requirements
• Step 5: Implement a counter to produce the specific sequence of
states
State Diagram & Truth Table
5 3 6 7 2 Present
State
Next State Inputs D Flip Flop Table
Q2 Q1 Q0
Q Q+ D
Q2 Q1 Q0 D2 D1 D0
+ + +

101
(5) 0 1 0 1 0 1 1 0 1 0 0 0
0 1 1 1 1 0 1 1 0 0 1 1
011
010
(3) 1 0 1 0 1 1 0 1 1
(2)
1 1 0 1 1 1 1 1 1 1 0 0
1 1 1 0 1 0 0 1 0 1 1 1
111 110
(7) (6)
K-Map

D2=Q2/+Q0/ D1=Q2+Q0

D0= Q1/+Q0/
Simulation Of the Circuit
Conclusion
• By using the equations from K-map we can make this circuit
properly.
• This moreover likely to be a countdown circuit
• 5,3,6,7,2 which was seen in the Simulation so steps were followed
properly and implemented successfully.
THNAK YOU
EVERYONE

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