Chapter 2

Embedded Microcontrollers

Abebaw.Z

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 Outline
Embedded Microcontrollers
1. Structure of a basic computer system
 Elements of computer
 Elements of embedded system
 Architectures(Von Neumann and Harvard Architecture)
 RISC and CISC
2. CPU families used in microcontrollers
3. Memories
4. Basic I/O devices and technologies
5. Interrupts

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 Structure of a basic computer system

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 Structure of a basic computer system
 A Microprocessor
 Intel (R) Core i7-3770 CPU 3.4GHz

 A Large Memory
 (Primary and Secondary)
 (RAM, ROM and caches)
 Input Units
 (Keyboard, Mouse, Scanner, etc.)

 Output Units
 (Monitor, printer, etc.)

 Networking Units
 (Ethernet Card, Drivers, etc.)

 I/O Units
 (Modem, Fax cum Modem, etc.)

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 Structure of a basic computer system
Elements of embedded
system

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 Structure of a basic computer system
Elements of embedded system
 Processor
 Memory
 Parallel ports
 Serial communication ports
 Input interfacing device
 Output interfacing device
 Timers and counter
 Interrupt controller
 Power supply, reset and oscillation circuit

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 Structure of a basic computer system
Von Neumann Architecture
Shared memory (data and program )
 one data path (both instruction and data)
CPU does one operation at a time
 Fetch or read/write
supports simple hardware
Slow
 Improved by cache memory

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 Structure of a basic computer system
Harvard Architecture
Separate storage for instructions and data
Separate bus for data and instruction
 Simultaneous access to both instructions and data
Programs needed to be loaded by an operator
 the processor could not boot itself

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 Structure of a basic computer system
CISC is a Complex Instruction Set Computer
Larger set of instructions. Easy to program
Many addressing modes causing complex instruction
formats.
Instruction length is variable.
Higher clock cycles per second.
Emphasis is on hardware
Slower execution, as instructions are to be read from
memory and decoded by the decoder unit.
Pipelining is not possible.

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 Structure of a basic computer system
RISC Reduced Instruction Set Computer
 Smaller set of Instructions. Difficult to program.
 Few addressing modes, fix instruction format.
 Low clock cycle per second
 Emphasis is on software
 Faster execution, as each instruction is to be executed by
hardware.
 Pipelining of instructions is possible, considering single
clock cycle

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 CPU families used in microcontrollers

Processor
 A Processor is the heart of the Embedded System.
 For an embedded system designer knowledge of
microprocessor and microcontroller is a must.
 Two Essential Units: Operations
Control Unit (CU), Fetch
Execution Unit (EU) Execute

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 CPU families used in microcontrollers

Classifications of processor

1. General Purpose processor (GPP)

 Microprocessor
 Microcontroller
 Embedded Processor
 Digital signal Processor
2. Application Specific System Processor (ASSP)
3. Multi Processor System using GPPs

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 CPU families used in microcontrollers
Microprocessor
 A microprocessor is a single chip semi conductor device also
which is a computer on chip, but not a complete computer.
 Its CPU contains
 ALU,
 a program counter,
 a stack pointer,
 working register,
 clock timing circuit and
 interrupt circuit on a single chip.
 Complete micro computer must have
 memory usually ROM and RAM,
 memory decoder,
 oscillator and
 a number of serial and parallel ports.
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 CPU families used in microcontrollers
History of microprocessor
1st Generation (4 bit processors)
 early 1970 by Intel (Integrated Electronics)
 4004 and 4040 4 bit

2nd Generation (8 bit processors)

 in 1974
 8008 and 8080 8 bit

3rd Generation (16 bit processors)

 8086 16 bit. Same as 8086, the 8088 introduced 8088 has only 8 bit data bus

Followed by:
The 80186 & 80286 (16 bit processor), the 80386 & 80486 (a 32 bit processor),
leading to the Pentium range of microprocessors (64 bit processors) available
today. The 80x86 and Pentium processors have all been designed for use in
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personal computer type applications and have large memory maps.
 CPU families used in microcontrollers

Various microprocessors
Intel  Zilog
4004, 4040
8080, 8085 Z80, Z180, eZ80
8086, 8088, Z8, eZ8
80186, 80188 and others
80286, 80386
x86-64

Motorola

6800
6809
68000
G3, G4, G5

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 CPU families used in microcontrollers

Microcontroller
A microcontroller is a functional computer system-on-
a-chip.
 It contains a processor, memory, and programmable
input/output peripherals.
Microcontrollers include an integrated CPU, memory
(a small amount of RAM, program memory, or both)
and peripherals capable of input and output.
Computer On The Box

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 CPU families used in microcontrollers

Various microcontrollers
 INTEL
 8031,8032,8051,8052,8751,8752
 PIC
 8-bit PIC16, PIC18,
 16-bit DSPIC33 / PIC24,
 PIC16C7x
 Motorola
 MC68HC11

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 CPU families used in microcontrollers
Microprocessor vs. Microcontroller
MICROPROCESSOR MICROCONTROLLER

 It includes functional blocks of

The functional blocks are ALU,
microprocessors & has timer, parallel
registers, timing & control units
i/o, RAM, EPROM, ADC & DAC

Bit handling instruction is less, One Many type of bit handling

or two type only instruction

Rapid movements of code and data Rapid movements of code and data
between external memory & MP within MC

 They are used for designing

 It is used for designing general
application specific dedicated
purpose digital computers system
systems

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 CPU families used in microcontrollers

Embedded processor

 Special microprocessors & microcontrollers often called,

Embedded processors.

 An embedded processor is used when fast processing fast

context-switching & atomic ALU operations are needed.

Examples : ARM 7, INTEL i960, AMD 29050.

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 CPU families used in microcontrollers

Digital signal processor

 DSP as a GPP is a single chip VLSI unit.

 It includes the computational capabilities of microprocessor and

multiply & accumulate units (MAC).

 DSP has large number of applications such as

 image processing,
 audio, video &
 telecommunication processing systems.

 It is used when signal processing functions are to be processed fast.

Examples : TMS320Cxx, SHARC, Motorola 5600xx

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 CPU families used in microcontrollers

Application specific system processor (ASSP)

 ASSP is dedicated to specific tasks and provides a faster

solution.

 An ASSP is used as an additional processing unit for running

the application in place of using embedded software.

Examples : IIM7100, W3100A

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 CPU families used in microcontrollers
Multi processor system using GPSS

Multiple processors are used when a single processor

does not meet the needs of different task.

The operations of all the processors are synchronized

to obtain an optimum performance.

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 PIC
What is PIC?
 A family of Harvard architecture

 Derived from the PIC1650 originally developed by

General Instrument Microelectronics Division.

 PIC was originally an acronym for "Programmable

Intelligent Computer".

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 Microchip’s MCU families

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 PIC families

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 8-bit PIC Architecture

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 Comparison of 8-bit PIC

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 PIC 18 families

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 PIC18 series
The series has different members all built around:
 same core and instructions
 75 instruction set
 different memory, I/O features and package size
 Memory size and technology
 I/O technology
 Package size
 28/40/44 or other pins

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 Some members of PIC18 features

 We will use PIC18F4520 to study the

course
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 PIC18F4520 pin

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PIC18F4520 block diagrams

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 PIC18F4520 ALU
 Arithmetic and logic unit
8- bit ALU
75 instruction set
Input operands are
Working register
Content of file register or
literals
Result of operation stored in :
Working register
File register

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 PIC18F4520 Working Register
 The working Register, W
 Inside the CPU
 Usually store result of last operation by CPU

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
 PIC18F4520 Working Register
 What if result exceed 8 bit , for example a case of overflow ?
 Will use status register like carry flag, DC flag , zero flag ……to
indicate the condition
 Detail of status register will be covered soon

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 Memory organization and technologies
An ideal memory
 R/W negligible time,
 retains its stored value indefinitely,
occupies negligible space and
consumes negligible power.
Practically getting all these is impossible
 Any memory is made up of an ‘array’ of memory ‘cells’,
 each cell holds one bit of data.
 The characteristics of the single cell reflect the characteristics of the
overall array.

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 Static RAM (SRAM)
cell as flip-flop,
How?
two pairs of transistors connected back-to-back.
 Two further transistors allow the cell to connect into the
main array
volatile
CMOS is used to reduce power consumption
a popular technology in battery-powered systems
data memory(RAM) in a microcontroller

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 EPROM (Erasable Programmable Read-Only Memory)
 From single MOS transistor
 non-volatile.
 erased by exposing it to intense ultraviolet light.
 OTP (One Time Programmable)
 raised price and reduced flexibility.
Its requirement of a quartz window and ceramic packaging, to
enable erasing,
 Used for program memory,
forcing the whole microcontroller to be ceramic-packaged
with a quartz window

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 EEPROM (Electrically Erasable Programmable Read-Only
Memory)
 EEPROM uses floating gate technology
 Nordheim–Fowler tunneling, NFT
Its dimensions are finer, so that it can exploit another
means of charging its floating gate.)
 With NFT, it is possible to electrically erase the memory
cell as well as write to it.

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 Flash
Flash represents a further evolution of floating-gate
technology.
with a single transistor per memory cell
electrical writing and erasing
Can not be written and erased indefinitely

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 PIC18F4520 memory
There are three types of memory in PIC18
• Program Memory
• Data RAM
• Data EEPROM
 As Harvard architecture devices, the data and program
memories use separate busses;
this allows for concurrent access of the two memory
spaces.

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 Program memory PIC18F4520
Program memory
32 Kbytes of Flash memory
Address range 0000H – 7FFFH
100,000 erase/write cycles
Location 0000H reserved for reset
Location 0008H reserved for high priority interrupt
Location 00018H reserved for low priority interrupt

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 Program memory map

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 Program memory
Program counter
Hold address of next instruction to be executed
21 bit wide
Has three separate 8-bit registers
 PCL
 Lower Byte
 Readable and writable
 PCH,
 Higher byte (PC<15:8> bits)
 Not directly readable or writable
 But indirectly through PCLATH register
 PCU
 Upper byte ,PC<20:16>bits
 Not directly readable or writable
 But indirectly through PCLATU register
The contents of PCLATH and PCLATU are transferred to the program counter by
any operation that writes PCL.
 Similarly, the upper two bytes of the program counter are transferred to PCLATH

44 and PCLATU by an operation that reads PCL .

 Stack
31 level of stack
 The PC is pushed onto the stack when a CALL or RCALL instruction
or
When an interrupt is Acknowledged.
 The PC value is pulled off the stack on a RETURN, RETLW
or a RETFIE instruction.
Note: PCLATU and PCLATH are not affected by any of the RETURN
or CALL instructions.
Use STKPTR (5 bits) to push on or pop from stack

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 STKPTR register

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 Top-of-Stack Access
Only the top of the return address stack (TOS) is
readable and writable
three registers, TOSU:TOSH:TOSL, to hold content
pointed by STKPTR
After a CALL, RCALL or interrupt, the software can
read
the pushed value by reading the TOSU:TOSH:TOSL
registers.
Can use user defined software stack. At return time,
the software can return these values to
TOSU:TOSH:TOSL and do a return.
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 Return Stack Pointer (STKPTR)
The stack pointer increments before values are pushed
onto the stack and
decrements after values are popped off the stack.
On Reset, the stack pointer value will be zero

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 Data memory
 Implemented as SRAM
 12 bit address = 4096 memory space
 16 banks that contain 256 bytes
 Special Function Registers(SFRs) and
control status of the controller and peripheral functions,
 General Purpose Registers (GPRs)
Data storage
 Access: Direct, Indirect or Indexed Addressing.

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 Data memory map

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 Data memory
Access Bank
first 128 bytes of memory (00h-7Fh) in Bank 0
 For frequently used data
And the last 128 bytes of memory (80h-FFh) in Block
15
 For SFRs
For access efficiency
 single cycle operation
No need of BSR
GPR general purpose registers
available for use by all instructions.
start at the bottom of Bank 0 grow toward SFRs

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 The Special Function Registers (SFRs)
For controlling desired operation of devices.
used by the CPU and peripheral modules
static RAM.
SFRs start at the top of data memory (FFFh) and
 extend the top half of Bank 15 (F80h to FFFh).

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 Status register

 arithmetic status of the ALU

CLRF STATUS
 Set the Z bit

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 Addressing mode
Inherent
operation that globally affects the device or
operate implicitly on one register.
 SLEEP, RESET
Literal
require some literal value as an argument
ADDLW and MOVLW
Direct
specifies all or part of the source and/or destination address
MOVFF
 Indirect
access a location without giving a fixed address in the instruction.
using File Select Registers (FSRs) as pointers

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 Basic I/O devices and technologies

 Peripherals such as LEDs and keypads are

essential components of microcontroller-based
systems
 Input devices
 Provide digital information to an MPU
 Examples: switch, keyboard, scanner, and digital camera
 Output devices
 Receive digital information from an MPU
 Examples: LED, seven-segment display, LCD, and
printer
 Devices are interfaced to an MPU using I/O ports

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 I/O Interfacing

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 Interfacing and Addressing
I/O ports
Buffers and latches on the MCU chip
 Assigned binary addresses by decoding the address bus
Generally bidirectional
 Internal data direction registers
To read binary data from an input peripheral
 MPU places the address of an input port on the address bus
 Enables the input port by asserting the RD signal
 Reads data using the data bus
To write binary data to an output peripheral
 MPU places the address of an output port on the address bus
 Places data on data bus
 Asserts the WR signal to enable the output port

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 PIC18F4520 I/O Ports
MCU includes five I/O ports
PORTA, PORTB, PORTC, PORTD, PORTE
Ports are multiplexed
Can be set up to perform various functions
Each I/O port is associated with several SFRs
 PORT
 Functions as a latch or a buffer
 TRIS
 Data direction register
 Logic 0 sets up the pin as an output
 Logic 1 sets up the pin as an input
 LAT
 Output latch similar to PORT

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 PIC18F4520 I/O Ports
PORTA: Example of Multiple Fns
 Digital I/O: RA6-RA0
 Analog Input: AN0-AN4
 V REF+ : A/D Reference Plus V
 V REF- : A/D Reference Minus V
 TOCK1: Timer0 Ext. Clock
 SS: SPI Slave Select Input
 LVDIN: Low V Detect Input

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 PIC18F4520 I/O Ports
 PORTB

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 Interfacing Output Peripherals
 Commonly used output peripherals in embedded systems
 LEDs
 Seven-Segment Displays
 LCDs
 Two ways of connecting LEDs to I/O ports
 Common Cathode
 LED cathodes are grounded
 Logic 1 from the I/O port turns on the LEDs
 Current is supplied by the I/O port called current sourcing
 Common Anode
 LED anodes are connected to the power supply
 Logic 0 from the I/O port turns on the LEDs
 Current is received by the chip called current sinking

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 Interfacing Output Peripherals

Common Cathode Common Anode

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 Seven-Segment Display
Seven-segment Displays
Used to display BCD digits
 0 thru 9
A group of 7 LEDs physically
mounted in the shape of the
number eight
 Plus a decimal point
Each LED is called a segment
 ‘a’ through ‘g’
Two types
 Common anode
 Common cathode

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 Seven-Segment Display
 Common Anode
 All anodes are connected together to a power supply
 Cathodes are connected to data lines
 Logic 0 turns on a segment
 Example: To display the digit 1
 All segments except b and c should be off
 11111001 = F9
H

Common Anode

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 Seven-Segment Display
 Common Cathode
 All cathodes are connected together to ground
 Anodes are connected to data lines
 Logic 1 turns on a segment
 Example: To display digit 1
 All segments except b and c should be off
 00000110 = 06
H

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 Example
Interfacing Seven-Segment Display to PORTB
Common Anode
Table Look-Up

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 Interfacing Input Peripherals
Commonly used input peripherals
DIP switches, push-button keys, keyboards, and A/D converters
DIP switch
One side of the switch is tied high
 To a power supply through a resistor called a pull-up resistor
The other side is grounded
The logic level changes when the position is switched
Push-button key
Same as the DIP switch except that contact is momentary

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 Interfacing Dip Switches

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 Reading from an I/O Port
Read input switches on PORTB (RB7-RB4)
RB0 set HI (1)
Switches Open = LOW (0)
Switches Closed = HIGH (1)
Display on PORTC
Opcode Operands Comments
MOVLW 0xF0 ;Load B’11110000’ into WREG
MOVWF TRISB ;Set PORTB TRIS Reg
CLRF TRISC ;Set PORTC as Output
BSF PORTB,0 ;Set RB0 High
MOVF PORTB,W ;Read PORTB
MOVWF PORTC ;Display on PORTC
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 Internal Pull-Up Resistor
 Turning off the internal FET
provides a pull-up resistor
 Bit7 (RBPU) in the INTCON2
register enables or disables the
pull-up resistor
 Instruction to Enable Pull Up
Resistors:
BCF INTCON2,7

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 Interfacing Push-Button Keys
 When a key is pressed (or released), mechanical metal contact
bounces momentarily and can be read as multiple inputs
 Key debounce
 Eliminating reading of one contact as multiple inputs
 Hardware or Software

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 Key Debounce Techniques
Hardware technique Software technique
Two NAND gates Wait for 10 to 20 ms
 S-R latch after detection of a
The output of the latch is a switch closure
pulse without a bounce If the reading is still the
same it is accepted

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 Interrupts

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