ECT 301

ARUN O S KUMAR
Asst.Professor,Dept.of ECE
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BOOKS

1. Roy D. C. and S. B. Jain, Linear Integrated Circuits,

New Age International, 3/e, 2010
2. David A. Bell, Operational Amplifiers & Linear ICs,
Oxford University Press,2nd edition,2010
3. Gayakwad R. A., Op-Amps and Linear Integrated Circuits,
Prentice Hall, 4/e, 2010
4. Salivahanan S. and V. S. K. Bhaaskaran, Linear Integrated
Circuits, Tata McGraw Hill, 2008.

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MODULE 1
Operational amplifiers(Op Amps): The 741 Op Amp, Block
diagram, Ideal op-amp parameters,
typical parameter values for 741, Equivalent circuit, Open loop
configurations, Voltage transfer
curve, Frequency response curve.
Differential Amplifiers: Differential amplifier configurations using
BJT, DC Analysis- transfer
characteristics; AC analysis- differential and common mode gains,
CMRR, input and output
resistance, Voltage gain. Constant current bias, constant current
source; Concept of current
mirror-the two transistor current mirror, Wilson and Widlar current
mirrors

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Integrated Circuit : An Integrated circuit is
a miniature electronic circuit comprising of
active and passive components irreparably
(impossible to rectify or repair) joined
together on a single chip of Silicon.

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Op-Amp Introduction
• Op-amps (amplifiers/buffers in general) are drawn as a
triangle in a circuit schematic
• There are two inputs
• inverting and non-inverting
• And one output
• Also power connections (note no explicit ground)
divot on pin-1 end
V+

2 7
inverting input  6
output
non-inverting input +
3 4

V

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 Input stage
• The input stage is the dual
input, balanced output
differential amplifier. This
stage generally provides most
of the voltage gain of the
amplifier and also establishes
the input resistance of the op-
amp.
 Intermediate stage
• The intermediate stage is usually
another differential amplifier,
which is driven by the output of
the first stage.
• In most amplifiers, the
intermediate stage is dual input
and unbalanced(single-ended)
output. Because direct coupling
is used, the dc voltage at the
output of the intermediate stage
as well above ground potential.
 Level shifter
• The level translator circuit is used after the intermediate
stage to shift the dc level at the output of the intermediate
stage downward to zero volts with respect to the ground.
(zero output for zero inputs)
• Level shifter is a circuit which can eliminate DC voltage from
a signal.
• It is designed to eliminate a single DC voltage. Level shifter is
a common collector circuit, It has high input impedance, low
output impedance and unity small signal voltage gain.
• It act as buffer circuit too.
 Output stage
• The final stage is usually a push-pull
complementary amplifier output stage.
• The output stage increases the output voltage
swing(symmetric swing) and raises the current-
supplying capability of the op-amp.
• Additionally Op amps generally incorporates
circuitry to provide drift compensation and
frequency compensation.
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Op-amp without feedback
• The internal op-amp formula is:
Vout = gain(V+  V)
• So if V+ is greater than V, the output goes positive
• If V is greater than V+, the output goes negative
V 
Vout
V+ +

• A gain of 200,000 makes this device (as illustrated here) practically useless
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Open Loop Configuration of Op-Amp
• In open loop mode there is no feedback present in between output
and input.
There are three open loop configuration of Op-amp.
1) Differential amplifier
2) Inverting amplifier and
3) Non-inverting amplifier

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Differential Open Loop Amplifier

Vo = A (Vin1 – Vin2)

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Inverting Open Loop Amplifier
V = 0 V and V = V
1 2 in

∴ V = A (0 – V )
o in

∴ V =–AV
O in

The negative sign indicates that the output voltage is out of phase by 180° from input.

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Non-inverting Open Loop Amplifier
V1= Vin and V2=0;
∴ VO = A (Vin – 0)
∴ Vo = A Vin

There is positive sign in above equation. This means that the output voltage is larger than the input
voltage by gain A and in phase with the input signal.

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Op-amp parameters
• Supply Voltage (Vcc+ and Vcc-): The 741 op-amp typically operates from a dual power supply,
with a recommended range of ±5V to ±18V.

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• Input Offset Voltage (Vos): This parameter represents the voltage difference required between

the inverting (-) and non-inverting (+) inputs to bring the output voltage to zero. Typical values

for Vos are in the range of 2mV to 6mV.

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• Input Bias Current (Ib): It is the average of the current entering the
inverting and non-inverting inputs. Typical values for Ib are around
20nA to 500nA.

IBIAS = IB1 + IB2/ 2

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• Input Offset Current (Ios): It is the difference between the currents
entering the inverting and non-inverting inputs. Typical values for Ios
are around 0.5nA to 50nA.
Ios=|IB1-IB2|

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• Open-Loop Gain (Aol): The open-loop voltage gain of the 741 op-
amp is typically around 100,000 (100 dB). This means that if you
apply a small voltage difference between the inputs, the output voltage
will be 100,000 times larger
• Input Common-Mode Range (ICMR): The range of common-mode
input voltage that the op-amp can handle without significant
distortion. For the 741, it's typically specified as ±12V when using
±15V supplies.
• Output Voltage Swing: The range of output voltage values that the
op-amp can produce without saturating. For the 741, it's typically
within a few volts of the supply rails when using ±15V supplies.

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• Slew Rate (SR): Slew rate is defined as the maximum rate of change
of output voltage per unit of time and is expressed in volts per
microseconds. In equation,
• SR = dVo/dt | V/µs
• Maximum Slew rate indicates how rapidly the output of an op-amp
can change in response to changes in the input frequency.
• For the 741, the slew rate is typically around 0.5 V/µs.
• Input Impedance: The input impedance of the 741 is typically high, often
in the range of several megaohms.

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• Output Impedance: The output impedance is relatively low, typically
in the range of tens to hundreds of ohms.
• Bandwidth (BW): The unity-gain bandwidth of the 741 is typically
around 1 MHz. The bandwidth decreases as the closed-loop gain
increases.
• Temperature Range: The 741 op-amp typically operates over a
temperature range of 0°C to 70°C.

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• Gain Bandwidth Product
• Gain bandwidth product (GB) is the bandwidth of the op-amp when
the voltage gain is 1.
• For 741 op-amp GB is 1MHz. GB is also known as closed-loop
bandwidth, unity gain bandwidth and small signal bandwidth.

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• Common-Mode Rejection Ratio (CMRR): The CMRR is a measure of
how well the op-amp rejects common-mode signals (signals that
appear on both inputs). It's typically specified in dB and is around 70
to 90 dB for the 741.

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Supply Voltage Rejection Ratio (SVRR)

• The change in op-amp’s input offset voltage Vio caused by variations in

supply voltages is called the supply voltage rejection ratio (SVRR). It is also
called Power Supply Rejection Ratio(PSRR) and Power Supply
Sensitivity(PSS).
• If we denote the change in supply voltages by ∆v and the corresponding
change in input offset voltage by ∆Vio .
• Then, SVRR is defined as,
• SVRR = ∆Vio / ∆V .
• The lower the value of SVRR in microvolts/volt, the better the op-amp
performance.
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The ideal op-amp
• Infinite voltage gain
• a voltage difference at the two inputs is magnified infinitely
• In truth, something like 200,000
• means difference between + terminal and  terminal is amplified by 200,000!
• Infinite input impedance
• no current flows into inputs
• in truth, about 1012  for FET input op-amps
• Zero output impedance
• rock-solid independent of load
• roughly true up to current maximum (usually 5–25 mA)
• Infinitely fast (infinite bandwidth)
• in truth, limited to few MHz range
• slew rate limited to 0.5–20 V/s.

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Ideal Op-amp Electrical Characteristics
1.Infinite input resistance (Ri=∞) so that almost any signal source can drive it and
there is no loading of the preceding stage.
2.Zero output resistance (RO=0) so that the output can drive an infinite number of
other devices.
3.Infinite voltage gain (A= ∞).
4.Zero offset voltage (Vio=0) so that zero output voltage when input voltage is zero.
5.Infinite bandwidth (BW=∞) so that any frequency signal from 0 to ∞ Hz can be
amplified without attenuation.
6.Infinite common-mode rejection ratio (CMRR=∞) so that the output common-
mode noise voltage is zero.
7.Zero Supply Voltage Rejection Ratio (SVRR=0) so that output voltage does not
change due to fluctuation in supply voltage.
8.Infinite slew rate (SR=∞) so that output voltage changes occur simultaneously
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Sr. No. Characteristics Ideal Value Typical Value

1 Input Resistance ∞ 2MΩ

2 Output resistance 0 75Ω

3 Voltage gain ∞ 200000

4 Bandwidth ∞ 1 MHz

5 CMRR ∞ 90 dB

6 Slew rate ∞ 0.5 V/µs

7 Offset voltage 0 2 mV

8 SVRR/ PSRR 0 30 µV/V

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