Scribd
Upload
30 views26 pages

MPMC Unit-3 Cse Arun

Uploaded by

htasarpnura
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
30 views26 pages

MPMC Unit-3 Cse Arun

Uploaded by

htasarpnura
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 26

MULTIPROCESSOR

CONFIGURATION
INTRODUCTION
 Multiprocessor system: If a microprocessor system contains
two or more components that can execute instructions
independently.
 It can be implemented using the 2 basic architectures: Closely
coupled architecture and Loosely coupled architecture.
 System using these architectures are known as loosely coupled
systems and closely coupled systems respectively.
 Advantages:
1. improves cost and performance ratio of the system
2. several processors may be combined to fit the needs of an
application.
3. tasks are divided among the modules. If failure occurs, it is
easier and cheaper to find and replace the malfunctioning
processor.
CLOSELY COUPLED
MULTIPROCESSOR CONFIGURATION
 In the closely coupled system (CCS) the coprocessors share
clock generator, bus control logic, entire memory and I/O
subsystem.
 When high-speed or real-time processing is desired, CCS may
be used.
 Two models of a CCS

1. CCS without private cache


2. CCS with private cache
CCS WITHOUT PRIVATE CACHE
 It consists of processors, memory modules and input-output
channels. These units are connected through a set of three
interconnection networks
1. The processor-memory interconnection network (PMIN) – used to
connect processor to every memory module.
2. The input-output processor interconnection network (IOPIN) –
used to allow a processor to communicate with an I/O channel
connected to peripheral devices.
3. The interrupt-signal interconnection network (ISIN) – used for two
purposes: to direct an interrupt to any other interprocessor network
and to initiate hardware alarm in case of processor failure.
 Unmapped Local Memory (ULM) – reserved storage area with
each processor
CCS WITHOUT
PRIVATE CACHE
CCS WITH PRIVATE CACHE
 In first model each memory reference goes through the
PMIN, it encounters delay in the process or memory
switch and hence the instruction cycle time increases. It
reduces the throughput.
 This delay can be reduced by associating a cache with
each processor to capture most of the references made by
a processor.
 Traffic can be reduced, which reduces the contention at
the cross points.
CCS WITH PRIVATE
CACHE
CLOSELY COUPLED SYSTEM USING
8086

 CPU and external processor share clock generator, bus


control logic, entire memory and input/output subsystem.
 8086 is the master and the coprocessor/independent
processor is slave
LOOSELY COUPLED SYSTEM USING
8086

 Each module may consists of an 8086, a bus master, or a


coprocessor or a CC configuration.
 Each processor has its own load memory and I/O
devices, to which other processors do not have direct
access. But they can share system resources.
LOOSELY
COUPLED
SYSTEM USING
8086
ADVANTAGES OF LCS

 Better throughput by having more than one processor.


 Each processor may have a local bus to access local
memory or I/O devices so that parallel processing can be
achieved.
 System architecture is more flexible.

 Failure in one module normally does not cause a


breakdown of the entire system. The faulty module can be
detected and replaced.
8087
NUMERIC DATA
PROCESSOR
FEATURES
 8087 is a coprocessor which has been specially designed to
work under the control of the processor 8086 and to support
additional numeric processing capabilities.
 It can operate on data of the integer, decimal and real types
with lengths ranging from 2 to 10 bytes.
 Its instruction set includes addition, subtraction and also
provides many useful functions such as square root,
exponential, tangent etc.,
 It is high performance numeric data processor. It can multiply
two 64-bit real numbers in about 27µs and calculate square
root in about 36µs
 It is multibus compatible
PIN
DIAGRAM
8087 ARCHITECTURE
STATUS REGISTER
STATUS REGISTER
STATUS REGISTER
STATUS REGISTER
CONTROL REGISTER
CONTROL REGISTER
CONTROL REGISTER
NUMERIC EXECUTION UNIT
 This performs all operations that access and manipulate the
numeric data in the coprocessors registers.
 Numeric registers in NEU are 80 bits wide.

 NEU is able to perform arithmetic, logical operations

 It supply a small number of mathematical constants from its on-


chip ROM.
CONNECTION OF COPROCESSOR 8087
8089
I/O PROCESSOR

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy