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2.binary Adder-Subtractor, Decimal Adder, Multipier

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8 views34 pages

2.binary Adder-Subtractor, Decimal Adder, Multipier

Uploaded by

killerdolly76
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Binary Adders:

Basic Binary adders are two types.


Half adder.
 Full adder.
Half adder:
It is a combinational logic circuit used to add two
binary bits and produces two outputs sum & carry.

Fig(1): Block diagram of Half Adder


Truth table:
K-Map:

Logic Diagram:
Full adder:
It is a combinational logic circuit used to add
three binary digits.

Truth table:
K-Map:

Cout = BCin +ACin+ AB

Cout= AB+Cin(A + B)
CARRY = AB AC

=AB

=AB

=AB)

=
Logic Diagram:
Cout= AB+Cin(A + B)
• Full-adder can also implemented with two half adders
and one OR gate
Subtractors:
Basic Subtractors are two types.
Half Subtractor.
Full Subtractor.
Half Subtractor:
It is a combinational logic circuit used to Subtract two
binary digits.

Fig: Block Diagram of Half-Subtractor


Truth Table:
K-Map:

Logic Diagram:
Full Subtractor:
It is a combinational logic circuit
used to Subtract three binary digits.

Truth Table:
A B C Diff Borrow
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1
K-Map:
Logic Diagram:
• Full-Subtractor can also implemented with
two half Subtractor and one OR gate.

Fig: Implementation of Full-Subtractor By using Two Half -Subtractor and


OR gate.
Binary Adders or Parallel
Adders or ripple carry Adders:
Parallel Subtractor:
Parallel Adder /Subtractor

•The addition and subtraction operations are combined in on circuit


•An exclusive OR gate is added with each Full adder
•The Mode M controls the operation of the circuit
•When M=0 the circuit act as an adder
•When M=1 the circuit act as an Subtractor
•EX-OR gate receives the M and one of the inputs of B.
•When M=0 we have B 0=B.The full adder receives value of B, the
input carry is 0 and circuit performs A+B
•When M=1 we have B 1=B’ input carry =1
The B inputs are all complimented, and a 1 is added through the input
carry. the input carry is 0 and circuit performs A-B by 2 s compliment
method
Parallel Adder/ Subtractor
BCD Adder(Decimal Adder)

1.Add two BCD numbers using ordinary binary addition


2.If four bit sum is equal to or less than 9 , no corrections
is needed. The sum is in the proper BCD form
3.If the four bit sum is greater than 9 or if a carry is
generated from the four bit sum , the sum is invalid
4.To correct the invalid sum ,add 01102 to the four bit
sum. If a carry results from this addition ,add it to the
next higher order BCD digit
INPUT OUTPUT
Z8 Z4 Z2 Z1 Y
0 0 0 0 0
0 0 0 1 0
0 0 1 0 0
0 0 1 1 0
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 0
1 0 1 0 1
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 1
1 1 1 1 1
Z2Z1
Z8Z4 00 01 11 10

00

01

1 1 1 1
11

10 1 1

EXPRESSION = Z8Z4+Z8Z2
BINARY MULTIPLIER

It is a combinational circuit which performs the multiplication


two binary numbers
It uses n shifts and adds to multiply n bit number
2 bit multiplier
B=B1 B0 IS THE MULTIPLICAND
A=A1 A0 IS THE MULTIPLIER
Multiplication process involves multiplication of 2 bit number
and addition of 2 bit number.
 Multiplication of 2 bits can be implemented using 2 input AND
gate where as addition of 2 bits can be implemented using half
adder.
2bit by 2 bit Multiplier

B1 B0 MULTIPLICAND
A1 A0 MULTIPLIER
B1 A0 B0A0 PARTIAL
B1 A1 B0 A1 PRODUCT

C3 C2 C1 C0
2bit by 2 bit Multiplier
Each shifted multiplicand which is multiplied by either 0 or 1
depending on the corresponding multiplier bit is called partial
product
Each partial product consists of two product component
The final 4 bit product is obtained by adding all partial products
The first partial product is formed by multiplying A0 by B1 B0

The Second partial product is formed by multiplying A1 by B1 B0


The partial products are implemented using AND gates
The partial products are added using 2 half adder
The carry out and the second sum represent two most significant
bits of the product(C3 C2)
The first sum represents C1 and product B0A0 represents C0
Magnitude Comparator:
 A magnitude Comparators is a special
combinational circuit designed to
compare the magnitude of two binary
numbers.
If A&B are the two inputs for the
magnitude comparator then the outputs
are A>B,A=B & A<B.

Block Diagram:

Fig: N-Bit Comparator


Truth Table:

Input Output
A1 A0 B1 B0 A>B A=B A<B
0 0 0 0 0 1 0
0 0 0 1 0 0 1
0 0 1 0 0 0 1
0 0 1 1 0 0 1
0 1 0 0 1 0 0
0 1 0 1 0 1 0
0 1 1 0 0 0 1
0 1 1 1 0 0 1
1 0 0 0 1 0 0
1 0 0 1 1 0 0
1 0 1 0 0 1 0
1 0 1 1 0 0 1
1 1 0 0 1 0 0
1 1 0 1 1 0 0
1 1 1 0 1 0 0
1 1 1 1 0 1 0

A>B = ∑ (4, 8,9 ,12,13,14) A=B = ∑( 0,5,10,15) A>B = ∑ ( 1,2,3,6,7,11)


K-Map:
A>B

A= B
A< B
Logic Diagram :

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