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CHAPTER 2 Logic Gates

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15 views43 pages

CHAPTER 2 Logic Gates

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nebusami20
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
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Digital Logic:

CHAPTER TWO

Logic Gates

Floyd, Digital Fundamentals, 10 th ed © 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights
Reserved
Chapter Outline
2

 The Inverter
 The AND Gate

 The OR Gate

 The NAND Gate

 The NOR Gate

 The Exclusive-OR and Exclusive-NOR Gates

 Fixed-Function Logic: IC Gates


Logic Gates
The Inverter A X

 The inverter performs the Boolean NOT operation.


 When the input is LOW, the output is HIGH; when the input
is HIGH, the output is LOW.
Input Output
A X
LOW (0) HIGH (1)
HIGH (1) LOW(0)

 The NOT operation (complement) is shown with an overbar.


 Thus, the Boolean expression for an inverter is X = A.
The Inverter
 Performs inversion or complementation
 Changes a logic level to the opposite
 0 (LOW)  1(HIGH) ; 1  0;

 Symbols used:
1

(a) Distinctive shape symbols 4


(b) Rectangular outline symbols
with negation indicators with polarity indicators
 Inverter operation:
HIGH (1) HIGH (1)
LOW (0) LOW (0)
t1 t2 t1 t2
Input Output
Pulse Pulse

 Logic expression for an Inverter:


A X
0 1
A X = A
1 0

X is the complement of A
A X is the inverse of A
X is NOT A
"A bar"
"not A"

5
The AND Gate

 Performs ‘logical multiplication’


 If all of the input are HIGH, then the output is
HIGH.
 If any of the input are LOW, then the output is
LOW.
&
A A
X X
 Symbols
B used: B

(a) Distinctive shape (b) Rectangular outline with


the AND (&) qualifying symbol
6
AND gate operation:

LOW (0)
LOW (0) A
LOW (0) X=A B
B
HIGH (1) AND
LOW (0)
LOW (0)
A
B X=A B C
LOW (0) C
LOW (0)
HIGH (1)
A
HIGH (1) B
C X = ABCD
HIGH (1)
HIGH (1) D
A INPUTS OUTPUT
X=A B
A B X
B or
AND 0 0 0
X = AB
0 1 0
1 0 0
1 1 1

1 0 1 1 0

1 1 1 0 0

1 0 1 0 0

8 t1 t2 t3 t4 t5
Logic expressions for AND gate:
9

 AND gate performs Boolean multiplication


 Boolean multiplication follows the same basic rule as
binary multiplication:
0 . 0 = 0
0 . 1 = 0
1 . 0 = 0
1 . 1 = 1
The OR Gate
 Performs ‘logical addition’
 If any of the input are HIGH, then the output is HIGH.
 If all of the input are LOW, then the output is LOW
 Symbols used:

1
A A
X X
B B

(a) Distinctive shape (b) Rectangular outline with


the OR ( 1) qualifying symbol
10
The OR gate operation:
11

LOW (0) A
LOW (0) X=A+B
LOW (0)
B

HIGH (1)
HIGH (1) A
LOW (0) B X=A+B+C
C
LOW (0)
HIGH (1)
HIGH (1) A
B X=A+B+C+D
C
HIGH (1) D
HIGH (1)
HIGH (1)
INPUTS OUTPUT
A
X=A+B A B X
B
0 0 0
0 1 1
1 0 1
1 1 1

1 0 0 1 0

1 1 1 0 0

1 1 1 1 0

t1 t2 t3 t4 t5
Logic expressions for OR gate:
13

 OR gate performs Boolean addition


 Boolean addition follows the basic rules as follows:

0+0=0

0+1=1

1+0=1

1+1=1
The NAND Gate
 NAND  NOT-AND  combines the AND gate and an inverter
 Used as a universal gate
 Combinations of NAND gates can be used to perform AND, OR and INVERTER
OPERATIONS
 If all or any of the input are LOW, then the output is HIGH.
 If all of the input are HIGH, then the output is LOW
 Symbol used:

A A &
A
X X X
B B B
(b) Rectangular outline: 2 input
(a) Distinctive shape: 2 input NAND NAND gate with polarity indicator
gate and its NOT/AND equivalent 14
The NAND gate operation:

LOW (0)
HIGH (1)
LOW (0) A
X
B
HIGH (1)
HIGH (1)
LOW (0) A
B X
LOW (0) C
HIGH (1)
HIGH (1)

HIGH (1)
LOW (0)
HIGH (1)
INPUTS OUTPUT
A
X = AB A B X
B
0 0 1
0 1 1
1 0 1
1 1 0

1 0 0 1 0

1 1 1 0 0

0 1 1 1 1

t1 t2 t3 t4 t5
Logic Expressions For NAND Gate:

 Boolean expression for NAND is a combination of


AND and Inverter Boolean expressions.
INPUTS OUTPUT
A B AB AB = X
0 0 0 0.0 = 0 = 1
0 1 0 0.1 = 0 = 1
1 0 0 1.0 = 0 = 1
1 1 1 1.1 = 1 = 0
17
The NOR Gate
 NOR  NOT-OR combines the OR gate and an
inverter
 Used as a universal gate
 Combinations of NOR gates can be used to perform AND, OR
and inverter operations
 If all or any of the input are HIGH, then the output is LOW.
 If all of the input are LOW, then the output is HIGH

18
The NOR Gate

Symbol used:

A A 1
X X A X
B B B

(a) Distinctive shape: 2 input NOR (b) Rectangular outline with


gate and its NOT/OR equivalent the OR ( 1) qualifying symbol

19
The NOR gate operation:
20

LOW (0)
HIGH (1)
LOW (0)
A
X
HIGH (1) B
LOW (0)
LOW (0)
A
LOW (0) B X
LOW (0) C
HIGH (1)

HIGH (1)
LOW (0)
HIGH (1)
INPUTS OUTPUT
A
X=A+B A B X
B
0 0 1
0 1 0
1 0 0
1 1 0

1 0 0 1 0

1 0 1 0 0

0 1 0 0 1

21 t1 t2 t3 t4 t5
Logic expressions for NOR gate:

 Boolean expression for NOR is a combination of OR


and Inverter Boolean expressions.

INPUTS OUTPUT
A B A+B A+B=X
0 0 0 0+0 = 0 = 1
0 1 1 0+1 = 1 = 0
1 0 1 1+0 = 1 = 0
1 1 1 1+1 = 1 = 0
22
The Exclusive-OR gate

 Combines basic logic circuits of AND, OR and Inverter. Has


only 2 inputs
 Used as a universal gate
 Can be connected to form an adder that allows a computer to
do perform addition, subtraction, multiplication and division
in ALU (Arithmetic and Logic Unit).

23
 If both of the input are at the same logic level, then the output is LOW.

 If both of the input are at opposite logic levels, then the output is HIGH

Symbol used:

A =1
X A
X
B B

(a) Distinctive shape (b) Rectangular outline

24
The XOR gate operation:
25

LOW (0)
LOW (0)
LOW (0)

HIGH (1) A
HIGH (1) X
LOW (0) B

LOW (0)
HIGH (1)
HIGH (1)

HIGH (1)
LOW (0)
HIGH (1)
INPUTS OUTPUT
A
X = AB + BA A B X
B
=A B 0 0 0
0 1 1
1 0 1
1 1 0

1 0 0 1 0

A Sama 0
Tak sama 1
1 0 1 0 0

0 0 1 1 0

t1 t2 t3 t4 t5
The Exclusive-NOR gate

 Has only 2 inputs, but output of XNOR is


the opposite of XOR
 If both of the input are at the same logic level,
then the output is HIGH.
 If both of the input are at opposite logic levels,
then the output is LOW.

27
Symbol used:

A =1
A
X X
B B

(a) Distinctive shape (b) Rectangular outline


The XNOR gate operation:
29

LOW (0)
LOW (1)
LOW (0)

HIGH (1) A
HIGH (0) X
LOW (0) B

LOW (0)
HIGH (0)
HIGH (1)

HIGH (1)
LOW (1)
HIGH (1)
INPUTS OUTPUT
A
X=A B A B X
B
0 0 1
0 1 0
1 0 0
1 1 1

1 0 0 1 0
Sama 1
A
Tak sama 0
1 0 1 0 0

1 1 0 0 1

t1 t2 t3 t4 t5
XOR vs XNOR

1 0 0 1 0

1 0 1 0 0

0 0 1 1 0

XOR

1 1 0 0 1

XNOR
t1 t2 t3 t4 t5
Fixed-function Logic : IC
Gates
32

 Three digital IC technologies used to


implement basic logic gates:
 CMOS (Complementary Metal-Oxide Semiconductor)
 TTL (Transistor-Transistor Logic)
 ECL (Emitter-Coupled Logic)
 CMOS and TTL is widely used
 ECL is for more specialized applications
CMOS vs TTL
33

 The logic operations of all gates are the same


regardless of the IC technology used
 CMOS and TTL differ only in the type of circuit
components and value parameters; not in the basic
logic operations.
 CMOS AND gate = TTL AND gate.
CMOS
34

 Advantage:
 Lower power dissipation
 There are 2 categories:
 5V & 3.3V
 Prefix : 74 and 54
 74 : commercial grade for general use
 54 : military grade for more severe environments
 5V Series
 74HC and 74HCT – High-speed CMOS
35
 74AC and 74ACT – Advanced CMOS
 74AHC and 74AHCT – Advanced High-speed CMOS

 3.3V Series
 74LV – Low-voltage CMOS
 74LVC – Low-voltage CMOS
 74ALVC – Advanced Low-voltage CMOS

 4000 Series
 Older, low-speed
TTL
 Advantage:
36
 Faster switching speed – CMOS is catching up
 Greater selection of device types
 Not sensitive to electrostatic discharge
 All TTL operates on 5V and comes in 74 or 54 prefixes.
 TTL Series:
 74 – Standard TTL
 74S – Schottky TTL
 74AS – Advanced Schottky TTL
 74LS – Low-power Schottky TTL
 74ALS – Advanced Low-power Schottky TTL and 74F – Fast TTL
Types of Fixed-Function Logic
Gates
 All the basic logic configurations are available
in some or all of the IC technologies.
 These are identified by the last 2/3 digits in the
series designation
 Some examples:

74LS04 : Low-power Schottky hex inverter

37
Quad 2-input NAND → 00 Triple 3-input NAND → 10

Quad 2-input NOR → 02 Triple 3-input AND → 11

Quad 2-input 0R → 32 Triple 3-input NOR → 27

Quad 2-input XOR → 86 Dual 4-input NAND → 20

Quad 2-input AND → 08 Dual 2-input AND → 21

Single 8-input NAND → 30 Hex inverter → 04

38
Quad 2-input AND
8 7 GND
4 AND gates
9 6
Each AND gate has 2 inputs
10 5
8 pins for inputs & 4 pins for outputs
11 4

12 3

13 2

VCC 14 1

39
40

 All of the 74 series CMOS are pin-


compatible with the same types of
devices in TTL
 Typical IC gate packages:
 Dual in-line package (DIP)
 Small-outline integrated circuit (SOIC)
DIP and SOIC packages
41
Integrated Circuits

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