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Unit 3

This document provides an overview of combinational circuits, including design procedures and specific examples such as Half Adders, Full Adders, Half Subtractors, and Full Subtractors. It outlines the functionality, limitations, and applications of these circuits, as well as their implementation using different types of logic gates. The document also includes truth tables, Boolean expressions, and K-map simplifications for each type of adder and subtractor.

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P.Dinesh Reddy
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24 views25 pages

Unit 3

This document provides an overview of combinational circuits, including design procedures and specific examples such as Half Adders, Full Adders, Half Subtractors, and Full Subtractors. It outlines the functionality, limitations, and applications of these circuits, as well as their implementation using different types of logic gates. The document also includes truth tables, Boolean expressions, and K-map simplifications for each type of adder and subtractor.

Uploaded by

P.Dinesh Reddy
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Unit-III

Introduction, Design Procedure, Combinational


circuit for Half Adder, Full Adder, Half Subtractor,
Full Subtractor, Binary Adder, Binary Adder-
Subtractor, Decimal Adder, Code Converters,
Decoders, Encoders, Multiplexers, Demultiplexers
Combinational Circuit
• The combinational logic circuits are the circuits that contain different types
of logic gates.
• Simply, a circuit in which different types of logic gates are combined is
known as a combinational logic circuit.
• The output of the combinational circuit is determined from the present
combination of inputs, regardless of the previous input gates, and output
variables are the basic components of the combinational logic circuit.
• There are different types of combinational logic circuits, such as Adder,
Subtractor, Decoder, Encoder, Multiplexer, and De-multiplexer.
Applications of Combinational Circuit
• NAND and NOR Implementation
• Digital Measuring Techniques
• Digital Processing
• Industrial Processing
• Computers
• Calculators
• Automatic control of machines
• Digital Communication.
Design Procedure
• Step-1: Identify the number of inputs and
outputs of the circuit.
• Step-2: Creating the Truth Table.
• Step-3: Simplify the Boolean function for each
output.
• Step-4: Constructing circuit using Boolean
function obtained from third step.
Half Adder
The Half-Adder is a basic building block of adding two numbers as two inputs
and produce out two outputs. The adder is used to perform OR operation of
two single bit binary numbers. The augent and addent bits are two input
states, and 'carry' and 'sum 'are two output states of the half adder.

Block diagram Truth Table

The SOP form of the sum and carry are as follows:

Sum = A‘B+AB'
Carry = AB
Logic Diagram for half Adder
Half Adder is also designed by combining the 'XOR' and 'AND' gates
and provide the sum and carry.

There is the following Boolean expression of Half Adder circuit:


Sum= A XOR B
Carry= A AND B
K-maps using for Half Adder
• The SOP form of the sum and carry are as follows:
• Sum = A‘B+AB'
Carry = AB
Implementation of Half Adder using NAND gates : Total 5 NAND gates are
required to implement half adder

A . 𝐴𝐵

𝐴𝐵

B. 𝐴𝐵
𝐴𝐵

Sum (S)=A+ B= A+ B+
= A+)+ B+)=A. + B. =

Carry (C)=AB=
Implementation of Half Adder using NOR gates : Total 5 NOR gates are required to
implement half adder.

Sum (S)=A+ B= A+ B+
= A+)+ B+)= +B)(+)
=

Carry (C)=AB= =
Limitation of Half Adder-

• Half adders have no scope of adding the carry bit


resulting from the addition of previous bits.
• This is a major drawback of half adders.
• This is because real time scenarios involve adding the
multiple number of bits which can not be accomplished
using half adders.
Full Adder
• The half adder is used to add only two numbers. To overcome this problem,
the full adder was developed. The full adder is used to add three 1-bit binary
numbers A, B, and carry C. The full adder has three input states and two
output states i.e., sum and carry.

Truth Table
Block diagram

Sum = A' B' C+A' BC'+AB' C'+ABC


Carry = A’BCin+ AB’Cin+ABCin’+ABCin=AB(Cin+Cin’)+Cin(A’B+AB’)
=AB+Cin(A’B+AB’)
Construction of Half Adder Circuit:
Realization of full Adder using two Half Adders and an OR gate Circuit:

The full adder logic circuit can be constructed using the 'AND' and the ‘XOR’ gate with an OR
gate.
K-maps using for Full Adder
Sum = x' y' z+x' yz+xy' z'+xyz
Carry=X’YCin+XY’Cin+XYCin’+XYCin

The SOP form can be obtained with the help of K-map as:
Sum = x' y' z+x' yz+xy' z'+xyz
Carry = xy+xz+yz
Implementation of Full Adder using NAND gates:

A ⊕ B=
Where S= A ⊕ B ⊕=

= (A ⊕ B )+AB=
Implementation of Full Adder using NOR gates:

A ⊕ B=
Where S= A ⊕ B ⊕
=
= (A ⊕ B )+AB==
Half Subtractor
Half subtractor is a combination circuit with two inputs and two outputs that
are different and borrow. It produces the difference between the two binary bits at the
input and also produces an output (Borrow) to indicate if a 1 has been borrowed. In the
subtraction (A-B), A is called a Minuend bit and B is called a Subtrahend bit.

Block diagram Truth Table

The SOP form of the Diff and Borrow is as follows:


Diff= A'B+AB‘
Borrow = A'B
Implementation of Logic Diagram for Half Subtractor

Advantages of Half Adder and Half Subtractor


• Simplicity
• Building blocks
• Low cost
• Easy integration
Disadvantages of Half Adder and Half Subtractor
• Limited functionality
• Inefficient for multi-bit numbers
• High propagation delay
Application of Half Subtractor in Digital Logic:
1.Calculators
2.Alarm Frameworks
3.Automotive Frameworks
4.Security Frameworks
5.Computer Frameworks
Implementation of Half Subtractor using NAND gates :
Implementation of Half Subtractor using NOR gates :
Full Subtractor
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A full-subtractor is a combinational circuit that has three inputs A, B, bin and two
outputs d and b. Where, A is the minuend, B is subtrahend, b in is borrow produced by
the previous stage, d is the difference output and b is the borrow output.

Truth Table
Block diagram

Difference,d=A⊕B⊕bin=A′B′bin+AB′b′in+A′Bb′in+Abbin

Borrow,b=A′B′bin+A′Bb′in+A′Bbin+ABbin
Or
Borrow,b=A′B(bin+b′in)+(AB+A′B′)bin=A′B+(A⊕B)′bin
K-maps using for Full Subtractor

Diff=xy' z'+x' y' z+xyz+x'yz'

Borrow=x' z+x' y+yz


Realization of full Subtractor using two Half Subtractors and an OR gate Circuit:

The full subtractor logic circuit can be constructed using the 'AND', '
XOR', and NOT gate with an OR gate.
Implementation of Full Subtractor using NAND gates:

Implementation of Full Subtractor using NOR gates:

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