Objectifs de l’enseignement

1. Ce cours constitue un premier apport à la bonne compréhension de l’architecture

interne et le fonctionnement d’un ordinateur

2. Le processeur (CPU), la mémoire, et l’interaction CPU-Mémoire sont étudiés

dans leurs aspects architecturaux et fonctionnels

3. Des outils de programmation (Langage assembleur, code machine) sont

également étudiés

La matière a pour objectif de mettre en clair le principe de

fonctionnement de l’ordinateur avec une présentation
détaillée de son architecture en s’appuyant sur un
microprocesseur courant.
 USTHB
Faculty of Computer Science
Computer Architecture 2
L2ING
Chapter 1
Introduction and Basics

In charge of the course & TDs : GOT Adel

Email : adeladl34@yahoo.fr
Office N° : 212
N° mailbox: 82

2024-2025
OUTLINE

1. Introduction

2. Synoptic Diagram of Computer

3. ‘’Von Neumann’’ Machine

4. ‘’Harvard’’ Machine

5. Conclusion
Introduction
INFORMATION AUTOMATIQUE

INFORMATIQUE

PHILIPPE
DREYFUS
1962

Informatics: Automatic Information

Processing
An automaton is a device that autonomously reproduces a sequence of
predetermined actions without human intervention.

COMPUTER
Introduction

Jacques Perret (1955)

Programmable electronic machine used for processing
information coded in digital form.

(Receive + Process + Store + Transmit) (Information)

Introduction
Program

Receive
Output
Store

1- It can receive input data  « fonction d’entrée ».

2- It can store input data  « fonction d’entrée ».
3- It can perform operations based on a program  « fonction
de traitement ».
4- It can provide output results  « fonction de sortie ».
 Introduction

MATERIAL ASPECT (Hardware) :

All the components, devices, accessories, etc. that constitute the computer

SOFTWARE ASPECT (Software) :

All the programs that allow the exploitation of the MATERIAL ASPECT.
Introduction
ASPECT
SOFTWARE

ARCHI 2 !! MATERIAL
concerns the organization of the different ASPECT
physical devices of computer
(OPERATION + COMMUNICATION)
ENIAC (Electronic Numerical Thermionic valve Relay
Integrator And Computer)

18000 1500

Resistance Capacitors

70000 10000

170 m2 !!
 Synoptic Diagram (Scheme)
HARDWARE ASPECT

INPUT UCT OUTPUT

UNIT (CPU) UNIT

Keyboard General Pupose Registers Screen

Mouse Status Register Printer
Scanner Instruction Pointer (IP)
UAL (ALU)
UCC

PRIMARY SECONDAR
MEMORY Y MEMORY

SRAM
HD
DRAM
Flash Disk
ROM
SSD
‘’Von Neumann’’ Machine

Current computers are all based on improved

versions of this architecture
‘’Core i3, i5, i7, …’’
‘’Von Neumann’’ Machine
1 Memory (Main)

C Arithmetic Logic
P Control Unit
(UCC) 3 Unit

U 2 (ALU)
Accumulator
(Acc)

Input Output

4
‘’Von Neumann’’ Machine
Memory

Control Unit Arithmetic Logic

UCC Unit
(UAL)
Acc

I/O
‘’Von Neumann’’ Machine
Memory

Control Unit Arithmetic Logic

UCC Unit
(UAL)
Acc

I/O

Memory: Program (Instructions) + Data – Chapter 2

Memory: Set of Addresses
Sequential Execution (unless modified)
UAL: Perform basic arithmetic (+, *, …) and logical (AND, OR, …)
operations - Chapter 2
UCC : Responsible for “sequencing” operations
I/O: Interfaces for interacting with the outside world (peripherals – Chapter 4)
‘’Von Neumann’’ Machine
Memory

Control Unit Arithmetic Logic

UCC Unit
(UAL)
Acc

I/O

RAM (Random Access Memory - Volatile Memory): Information during

operation + loses its content when no longer powered + Read/Write

ROM (Read Only Memory– Non volatil Memorye) : Informations de base de la

machine, cette mémoire le disparait pas à la mise hors tension + Lecture seule
‘’Von Neumann’’ Machine
Memory

C
Arithmetic Logic
P
Control Unit
UCC Unit
(UAL)

U
Acc

I/O

Memory
Give me the instruction of address x
x Instr

CPU
o m m and !
At y o ur C
 ‘’Von Neumann’’ Machine
Memory

C
Read & Fetch Arithmetic Logic
P
Control Unit
UCC Unit
instruction (UAL)

U
Acc
R/W Control
Signal
I/O
Memory

U
MA
CO R
MDR RI Decoder A
L

REGISTERS
‘’Von Neumann’’ Machine
Memory

Bus Control Unit

UCC
Arithmetic Logic
Unit
(UAL)
Acc

A bus is a set of wires (electrical conductors) that ensures I/O

the transmission of binary information between the elements
of the computer.
‘’Von Neumann’’ Machine
1 Memory

C Arithmetic Logic
P Control Unit
(UCC) 3 Unit

U 2 (UAL)
Accumulator
(Acc)

e r !
mb
Input Output
me
e
To
R 4
‘’Harvard’’ Machine
Program
Memory
Memory Data Memory

C Arithmetic Logic
P Control Unit
(UC)
Unit
(UAL)
Accumulator
U (Acc)

Input Output
 ‘’Harvard’’ Machine
Program
Data memory
memory

C
Arithmetic Logic
P
Control Unit
UC Unit
(UAL)

U
Acc

I/O

 Data memory and program memory are physically separated

 Access to each of the two memories is via two separate buses
 Allows data and instructions to be transferred simultaneously
 Difference Von Harvard
Neumann
Memory Single memory Two memories
System

Bus System Single bus Two bus

Instruction Two clock Single clock

Traitment cycles cycle

Hardware Less material More material

Configuration

Cost Acceptable Expensive

Conclusion
 L’architecture de tous les ordinateurs actuels est basée sur le modèle de Von
Neumann. Il s’agit des ordinateurs de bureau, des ordinateurs portables, des
smartphones …etc. Bien que des modifications aient été apportées à la
conception originale, comme l’ajout de processeurs multiples (multi-
cœurs) et de systèmes de cache, les principes de base restent les mêmes.
Conclusion
Processeurs multiples (multi-core processor)

Memory

UC UC UC

UAL UAL UAL

I/O
 Conclusion
Cache memory

Memory
RAM is fast, but the microprocessor
is even faster! In order not to limit its Cache memory
performance by forcing it to wait, 2
small memory units are used, much
faster, but much more expensive!

These cache memories are used to Cache memory

store frequently consulted 1
information for a short time. They
have a very high speed, and a high
cost for a low storage capacity.

CPU
Conclusion
multi-cœurs + mémoires cache

Mémoire

Mémoire Mémoire Mémoire

cache 1 cache 2 cache n

CPU- CPU- CPU-

1 2 n