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Instruction Set of 8051 Microcontroller: Gaurav Sharma

The document provides an overview of the instruction set for the 8051 microcontroller, detailing I/O port usage, various instruction categories including data transfer, arithmetic, logical, and branch instructions. It includes examples of configuring ports, performing arithmetic operations, and utilizing jump and subroutine instructions. Additionally, it explains specific instructions for bit manipulation and logical operations, as well as the structure of jump and call instructions.

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0% found this document useful (0 votes)
11 views28 pages

Instruction Set of 8051 Microcontroller: Gaurav Sharma

The document provides an overview of the instruction set for the 8051 microcontroller, detailing I/O port usage, various instruction categories including data transfer, arithmetic, logical, and branch instructions. It includes examples of configuring ports, performing arithmetic operations, and utilizing jump and subroutine instructions. Additionally, it explains specific instructions for bit manipulation and logical operations, as well as the structure of jump and call instructions.

Uploaded by

sukhmani8012005
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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– Instruction set of 8051 Microcontroller

Gaurav Sharma
I/O port usage in 8051
• When RESET all ports are configured as input ports.
• To configure any port as an output port, 0 is written to it and to configure it
again as an input port, 1 is written to it.
• Example 1: To configure port 0 as an input port, receive a data and send it to
port 1.
MOV A, #0FFH
MOV P0, A
BACK: MOV A, P0
MOV P1, A
SJMP BACK
• Example 2: It will alternately send 55 and AA to port 0 repeatedly.
BACK: MOV A, #55H
MOV P0, A
ACALL DELAY
MOV A, #AAH
MOV P0, A
ACALL DELAY
SJMP BACK
• Example 3: It will alternately send 55 and AA to port 1 repeatedly.
MOV A, #55H
BACK: MOV P1, A
ACALL DELAY
CPL A
SJMP BACK
• Example 4: Configure port 1 as an input port and save the received data in
R5 and R7.
MOV A, #0FFH
MOV P1, A
MOV A, P1
MOV R5, A
ACALL DELAY
MOV A, P1
MOV R7, A
8051 Instructions
• Data transfer instructions
• Arithmetic instructions
• Logical instructions
• Branch instructions
• Subroutine instructions
• Bit manipulation instructions
Data Transfer Instructions
• Move the contents of a register Rn to A
– MOV A,R2
– MOV A,R7

• Move the contents of a register A to Rn


– MOV R4,A
– MOV R1,A

• Move an immediate 8 bit data to register A or to Rn or to a memory


location(direct or indirect)
– MOV A, #45H
– MOV R6, #51H
Data Transfer Instructions
• Move the contents of a memory location to A or A to a memory
location using direct and indirect addressing
• MOV A, 65H
• MOV 45H, A

• Move the contents of a memory location to Rn or Rn to a memory


location using direct addressing
• MOV R3, 65H
• MOV 45H, R2

• Move the contents of memory location to another memory location


using direct and indirect addressing
• MOV 47H, 65H

• MOV R4, R7 is invalid


Push and Pop instructions
MOV R1, #12 moves decimal 12 in R1 ie 00001100
MOV R4, #F3H moves hex F3 in R4 ie 11110011
PUSH 1 [SP]=09,[09]=[01]=12d //CONTENT OF 09 is
0CH
PUSH 4 [SP]=0A,[0A]=[04]=F3H //
CONTENT OF 0A IS F3H
POP B B = [SP = 0A] = F3H

Exchange instructions
The content of source ie register, direct memory or indirect memory
will be exchanged with the contents of destination ie accumulator.
XCH A,R3
XCH A,@R1
XCH A,54H
Bit oriented data transfer
• Carry flag in PSW is used as a single bit accumulator.
MOV C, P0.0 data at 0th pin of port 0
MOV C, 67H bit addressable RAM
MOV C, 2CH.7 same bit referred as above in bit addressable RAM
Arithmetic Instructions
Addition
• Add the contents of A with immediate data with or without carry.
ADD A, #45H

• Add the contents of A with register Rn with or without carry.


ADD A, R5
ADDC A, R2

• Add the contents of A with contents of memory with or without


carry using direct and indirect addressing
ADD A, 51H
ADDC A, 75H
Subtraction
• Subtract the contents of A with immediate data with or without carry.
SUBB A, #45H

• Subtract the contents of A with register Rn with or without carry.


SUBB A, R5
SUBB A, R2

• Subtract the contents of A with contents of memory with or without


carry using direct and indirect addressing
SUBB A, 51H
SUBB A, 75H
Multiplication
• MUL AB: This instruction multiplies two 8 bit unsigned
numbers which are stored in A and B register. After multiplication the
lower byte of the result will be stored in accumulator and higher byte
of result will be stored in B register.
Eg.MOV A,#45H;[A]=45H
MOV B,#0F5H;[B]=F5H
MUL AB ;[A] x [B] = 45 x F5 = 4209 ;[A]=09H, [B]=42H

Division
• DIV AB: This instruction divides 8 bit unsigned number stored in A
by an 8 bit unsigned number stored in B. After division the quotient
will be stored in accumulator and remainder in B.
DA A (Decimal Adjust After Addition)
• When two BCD numbers are added, the answer is a non-BCD number.
To get the result in BCD, we use DA A instruction after the addition.
Adds 6 to higher or lower nibble for valid BCD.
Eg 1: MOV A,#23H
MOV R1,#55H
ADD A,R1 // [A]=78
DA A // [A]=78
no changes in the accumulator after da a

Eg 2: MOV A,#53H
MOV R1,#58H
ADD A,R1 // [A]=ABH
DA A // [A]=11, C=1 . ANSWER IS 111.
Accumulator data is changed after DA A
Increment
• Increments the operand by one. INC increments the value of source
by 1. If the initial value of register is FFH, incrementing the value will
cause it to reset to 0.
INC A
INC byte
INC DPTR

Decrement
• Decrements the operand by one. DEC decrements the value of
source by 1. If the initial value of is 0, decrementing the value will
cause it to reset to FFH.
DEC A
DEC byte
Logical Instructions
Logical AND
• ANL destination, source : ANL does a bitwise "AND" operation
between source and destination, leaving the resulting value in
destination. The value in source is not affected.
ANL A,#DATA ANL PSW, #E7H forces 3rd and 4th bit to
low
ANL A, Rn

Logical OR
• ORL destination, source : ORL does a bitwise "OR" operation
between source and destination, leaving the resulting value in
destination. The value in source is not affected.
ORL A,#DATA ORL PSW, #18H forces 3rd and 4th bit
to high
Logical Ex-OR
• XRL destination, source : XRL does a bitwise "EX-OR" operation
between source and destination, leaving the resulting value in
destination. The value in source is not affected.
XRL A,#DATA XRL P1, #40H Complements
6th bit of port 1
XRL A,Rn

Complement
• CPL A
Rotate Instructions
• RR A : This instruction is rotate right the accumulator. Each bit is
shifted one location to the right, with bit 0 going to bit 7.

• RL A : Rotate left the accumulator. Each bit is shifted one location


to the left, with bit7 going to bit 0

• RRC A : Rotate right through the carry. Each bit is shifted one
location to the right, with bit 0 going into the carry bit in the PSW,
while the carry goes into bit 7.

• RLC A : Rotate left through the carry. Each bit is shifted one
location to the left, with bit7 going into the carry bit in the PSW,
while the carry goes into bit 0.
Other Logical Instructions
• CLR – Clear
CLR A CLR R1
CLR @R4 CLR 45H

MOV A, #3CH
SETB C sets the carry flag
RLC A

• SWAP – swap accumulator nibbles


MOV A, #72H
SWAP A A – 27H
Branch (Jump) Instructions
Jump : There are 3 types of jump instructions. They are:-
– Relative Jump
– Short Absolute Jump
– Long Absolute Jump

• Relative Jump: Jump that replaces the PC (program counter) content


with a new address that is greater than or less than is called a
relative jump. The advantages of the relative jump are:
– Only 1 byte of jump address needs to be specified in the 2's complement form.
– Specifying only one byte reduces the size of the instruction and speeds
up program execution.

SJMP <relative address>; this is unconditional jump.


SJMP(short jump): is a 2-byte instruction. First byte is the op-code
and second byte is the relative target address, 00 to FFH.
• conditional jumps:
JC <relative address> //jump if C = 1
JNC <relative address>
JB bit, <relative address> //jump if bit = 1
JNB bit, <relative address>
JBC bit, <relative address> //jump if bit=1 and clear bit
CJNE <destination>, <source>, <relative address> //compare
both, jump if not equal
DJNZ <byte>, <relative address> //decrement and then jump if not
zero
JZ <relative address> //jump if A = 0
JNZ <relative address>
• JMP @A+DPTR
Short Absolute Jump
• In this case only 11 bits of the absolute jump address are needed. In
8051, 64 Kbyte of program memory space is divided into 32 pages of
2kbyte each. The instruction length becomes 2 bytes.
AJMP(Absolute jump): causes unconditional branch to the indicate
address, by loading the 11 bit address to 0 -10 bits of the program
counter.

Long Absolute Jump/Call


• The entire program memory from 0000H to FFFFH use long absolute
jump. The absolute address has to be specified in the op-code, the
instruction length is 3 bytes.
LJMP(long jump): is a 3-byte instruction. First byte is the op-code
and second and third bytes represent the 16-bit target Address
which is any memory location from 0000 to FFFFH.
Subroutine CALL And RETURN
Instructions
• Subroutines are handled by CALL and RET instructions. CALL is same
as jump except it pushes PC onto stack before branching. There are
two types of CALL instructions

• LCALL address(16 bit): This is long call instruction which


unconditionally calls the subroutine located at the indicated 16 bit
address. This is a 3 byte instruction.

• ACALL address(11 bit): This is absolute call instruction


which unconditionally calls the subroutine located at the indicated 11
bit address. This is a 2 byte instruction.

• RET instruction: pops top two contents from the stack and load
it to PC.
THANK YOU

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