Computer Organization Lecture III-1
Computer Organization Lecture III-1
Lecture III
Presented by Tandoh Lawrence (PhD)
REVISION
• What is the difference between how humans and computers perceive
information/data
• How many digits are used in the decimal number system
• What are those digits
• Every number in the decimal number system can be represented
using powers of…
• What is the total number of possible values that can be represented
in the decimal number system using “n” digit positions
REVISION II
• How many digits are used to represent values in the binary number system
• Every number in the binary number system can be represented using
powers of …
• How many possible values can you represent using “n” digits in the binary
number system
• What is the maximum possible value that you can use to represent using
“n” digits in the binary number system
• How do you convert from binary to decimal and vice versa
• What is the greatest disadvantage of using the binary number system as
compared to the decimal number system
REVISION III
• What is the easiest way to introduce polarity in the decimal number
system
• What two problems do we face when the above method is used
• What is the range of values that can be obtained from “n” digits when
the above method is used to introduce polarity
• What problem does this way of representing polarity pose when
compared to the decimal system
• How can we resolve one of the problems
REVISION IV
• How do we obtain the ones complement of a binary number
• What is the range in ones complement
• Does the ones complement allow binary addition and subtraction
• What are the rules governing binary subtraction of one number from another in ones
complement
• What are the rules governing binary addition of one number to another in ones
complement
• What does having an overflow of one bit signify in addition and subtraction in ones
complement
• How do we deal with the final result in ones complement wen we have an overflow bit
and when we do not
• What problem do we still face in ones complement representation
REVISION V
• How do we obtain the twos complement of a binary number
• What is the range in twos complement
• Does ones complement allow binary addition and subtraction
• What are the rules governing binary subtraction of one number from another
in ones complement
• What are the rules governing binary addition of one number to another in
twos complement
• What does having an overflow of one bit signify in addition and subtraction in
twos complement
• How do we deal with the final result in twos complement wen we have an
overflow bit and when we do not
Conclusion
• As can be seen, twos complement allows simple binary arithmetic as well
as solves the double zero problem
• So what is exactly does overflow mean
• It is possible to have scenarios where additions are out of range
(overflow). For example:
• If we add the two (2’s complement) 3 bit numbers representing 7 and 5 we get :
111 => +7
101 => +5
1100 => -4 (in 4 bit 2’s comp)
• We get -4, not +12 as we would expect !!
• We have overflowed the range of 4 bit 2’s comp. (-8 to +7), so the result is invalid
Other factors to consider (real
numbers I)
• Now that we have resolved the problem of addition and subtraction
in binary, lets turn to other problems
• So far we have only considered integers (positive and negative whole
numbers)
• Real life mathematical problems have an equal share of whole
numbers (integers) and other none whole (real) values
• First lets consider how we represent these in the decimal number
system and the advantages of being able to do so
• The decimal point is used to help us denote fractional components
• E.g.: ½ = 0.5, ¼ =0.25, 3/10 = 0.3, and so on
Other factors to consider (real numbers I)
• Real numbers are made up of the whole part and the decimal
(fractional) part
• The decimal point separates the two parts
• Decimal point can be fixed or it can float
• What does a decimal floating point mean
• We move the point to the left or to the right and represent the same number by
subtracting or adding a power of 10 respectively
• Whole and decimal component = mantissa
• Power of 10 = exponent
• E.g. 3456.789 = 0.3456789 x 104
• What is the advantage of doing this
• We can represent values between integers (real numbers)
• We can represent a much greater range
• What is the disadvantage of doing this?
Other factors to consider (real
numbers 2)
• The real number aspect is easy to understand: decimal (fractional)
part
• What about increased range
• What is the range of 3 digit positions in decimal notation: 0 to 103 - 1= 0 to
1000 - 1
• If we try using floating point where 2 bits will denote the mantissa and one bit
will denote the exponent we can have a range of 0 to 102 – 1 x 109 =
99,00,00,00,000
• There is still the problem of loss in precision because only a certain
number of digits can be used to represent the non zero portion of the
fractional component
Other factors to consider (real numbers 3)
• The question is, how do we do this in the binary number system
• Lets first look at how binary numbers are represented
• 25.75 = (1x24) + (1x23) + (1x21) + (1x2-1) + (1x2-2) + (0x2-3)= 11001.110
• NB: 2-n = 1/2n
• NB: conversion can be done by comparing binary to decimal and how the point
moves to the left or right with the addition or subtraction of a zero to or from the
denominator
• This means that if we implement this in floating point notation we will have:
11001.110 = 1.1001110 x 24
• Thus, in the same way, in order to represent this number we simply need to
represent the mantissa and the exponent (NB: we consider the whole
number part to usually be 1)
• Hence, our binary representation can be compressed into 2 values:
• Fractional component of mantissa
• Exponent (power of 2)
IEEE-754 fp 1 8 bits
s biased exp.
23 bits
fraction
standard (32 bits) N = (-1)s x 1.fraction x 2(biased exp. – 127)
• This binary standard uses 32 bit representations
• 1 bit = sign bit
• 8 bits = biased exponent
• 23 bits = fraction/mantissa
• The exponent is biased because it is divided into 3 parts obtained by
subtracting 127 from the exponent which has a maximum value of 254
• Positive exponents
• Negative exponents
• Exponent of 0
• 2-127=> biased exponent = 0000 0000 (= 0)
• 20 => biased exponent = 0111 1111 (= 127)
• 2+127 => biased exponent = 1111 1110 (= 254)
IEEE-754 fp standard
• Example:
25.75 => 11001.110 => 1.1001110 x
sign bit = 0 (+ve)
normalized mantissa (fraction) = 100 1110 0000 0000 0000 0000
biased exponent = 4 + 127 = 131 => 1000 0011
so 25.75 => 0 1000 0011 100 1110 0000 0000 0000 0000 => x41CE0000
• Values represented by convention:
• Infinity (+ and -): exponent = 255 (1111 1111) and fraction = 0
• NaN (not a number): exponent = 255 and fraction = 0 (verify)
• Zero (0): exponent = 0 and fraction = 0
IEEE-754 fp standard (64 bits/double
standard)
1 11 bits 52 bits
s biased exp. fraction
AND
A B A.B
0 0 0
0 1 0
1 0 0
1 1 1
The OR operation, table, and gate
• The OR operation takes in two inputs and produces a single output
• The output is true if both or either of the inputs are true else the output is false
OR
A B A+B
0 0 0
0 1 1
1 0 1
1 1 1
The XOR operation, table, and gate
• The XOR operation takes in two inputs and produces a single output
• The output is true if the inputs are different and 0 if they are the same
• This operation can be likened to addition modulo 2
XOR
A B AB
0 0 0
0 1 1
1 0 1
1 1 0
The NOT operation, table, and gate
• The NOT operation takes in one input and produces a single output
• The output inverts the input value
NOT
A A'
0 1
1 0
The NAND operation, table, and
gate
• The AND operation takes in two inputs and produces a single output
• The NAND operation is simply an inversion of the AND operation (combination of AND and NOT operations)
• In other words it returns true when either one or both inputs are false and false when both inputs are true
NAND
A B (A.B)'
0 0 1
0 1 1
1 0 1
1 1 0
The NOR operation, table, and gate
• The NOR operation takes in two inputs and produces a single output
• The NOR operation inverts the OR operation (combination of NOT and OR operations)
• It returns true when both inputs are false and false otherwise
NOR
A B A+B
0 0 1
0 1 0
1 0 0
1 1 0
The XNOR operation, table, and
gate
• The XNOR operation takes in two inputs and produces a single output
• The XNOR operation inverts the XOR operation (combines XOR and NOT operations)
• It returns true if both inputs are the same and false if they are different
XNOR
A B AB
0 0 1
0 1 0
1 0 0
1 1 1
Digital circuits
• As mentioned before, digital circuits are made up of logic gates
• How can we transform the theoretical addition and subtraction that we studied into a digital circuit
• Can be done using combinational circuits
• The output of combinational circuit at any instant of time, depends only on the levels present at input terminals.
• The combinational circuit do not use any memory. The previous state of input does not have any effect on the
present state of the circuit.
• A combinational circuit can have n inputs and m outputs.
Half adder
• The half adder accepts two inputs and generates two outputs
• Is the basic building block for the addition of two single bits
• The input bits are A and B whilst the output is the Sum: s and Carry: c
• Problem: the theoretical addition we studied may include an extra (carry) bit as an input
Full adder
• The full adder is used to resolve the issue of the carry bit
• It takes three values as inputs: two input bits A and B as well as a carry bit Cin
• It generates
• Problem: our theoretical addition is not limited to just three inputs but consists of
several pairs of bits being added together
• Challenge: Implement a four bit full adder using logic gates
• Take note of the carry over input of the full adder for the LSB
Subtraction
• As we studied, subtraction will require
ones or twos complement to implement
• Although, there are actual half and full
subtractors we will not consider them
and only concentrate on subtraction
using the ones and twos complement.
• Below is an example of an n bit parallel
subtractor in ones complement
• Implement it and the twos complement
subtractor using logic gates