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QPSK Modyulation

QPSK modulation encodes 2 bits of data into each symbol by varying the phase of the carrier signal by 0, 90, 180, or 270 degrees. The document describes: 1) QPSK modulation encodes 2 bits at a time by multiplying the even and odd bits by a cosine or sine wave carrier that is phase shifted by 0, 90, 180 or 270 degrees depending on the 2 bits. 2) A data source generates the digital signal to be transmitted and a carrier phase shifter changes the phase of the carrier signal by 90 degrees. 3) Double balanced modulators multiply the phase shifted carrier signal with the even and odd bit waveforms to generate the QPSK modulated signal.

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Hasan Al-asadi
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30 views4 pages

QPSK Modyulation

QPSK modulation encodes 2 bits of data into each symbol by varying the phase of the carrier signal by 0, 90, 180, or 270 degrees. The document describes: 1) QPSK modulation encodes 2 bits at a time by multiplying the even and odd bits by a cosine or sine wave carrier that is phase shifted by 0, 90, 180 or 270 degrees depending on the 2 bits. 2) A data source generates the digital signal to be transmitted and a carrier phase shifter changes the phase of the carrier signal by 90 degrees. 3) Double balanced modulators multiply the phase shifted carrier signal with the even and odd bit waveforms to generate the QPSK modulated signal.

Uploaded by

Hasan Al-asadi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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QPSK MODYULATION

‫عبد عالوي حسن‬


Introduction
It send two bit at same time .first check pair if even and
odd .and multiplied even bits by COSwct and also multiplied odd
by SINwct .and after that sum COSwct with SINwct. In
quadrature phase shift keying carrier is given any one of four
possible phases relative to reference phase. 00 pair bit at third
quarter, 01 pair bit at second quarter, 10 pair bit at fourth
quarter and 11 pair bit at first quarter.as show in figure(1).

Figure (1) block diagram Qpsk modulation


Qpsk modulation

DATA SOURCE: From this block we generate the signal to be sent. It


must be supplied CLOCK with a frequency 16khz .The transfer of the
signal from this block by three lines of a line determines the beginning
and end of the signal and the second line determines the order of the
signal, while the third line transfer the signal (bit clock and word clock)
and take information signal form line (nrz) data. This block contain on
carrier (frequency of carrier signal is 1.28 MHz).

Data form: this block contain on more than form signal. We will chose
waveform A and B (carrying odd and even bit data). waveform A check
pair bit 1 with 8 ,2 with 3, 4 with5 , 6 with7 if 0with 0 waveform A is 0, if
1 with 0 waveform A is 0, if 0with 1 waveform A is 0, if 1with 1 waveform
A is 1. Waveform B check pair bit 1 with 2, 3 with 4, 5 with6, 8 with 7 if 0
with 0 waveform B is 0, if 1 with 0 waveform B is 1, if 0 with 1 waveform
B is 1, if 1with 1 waveform A is 0.

Carrier phase shifter: This block consists of a capacitor and resistive


used to phase shifter the carrier. The phase shifter between is 90 form
through this phase shifter can change phase shifter between the bits. And
this block contain on transformer that will remove harmonic from signal.
The input is carrier signal.

Double balance modulators: It is used to multiply voltage of capacitor


with wave form A and also multiply voltage of resistor with waveform B.
And then connect the output of the first multiplication with the second
through wire.
Figure (2)qpsk modulation

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