Copyright e 2010 OmniVision Technologies, Ine. Allrights reserved. ‘hedaman pod a? win oa ware tory, er any ware aca eotebn oreo ‘petty bi ra tout oteetn ti cart Nolen sewed eb oe rons, ary ates any APS ge en “The fermen conaredin hi decaen anda ett Orin Techno ea thane Taeimaron atoms nua panen sna Ones ae Trademacintermatin Bluetooth® 2.0 + EDR stereo audio processor datasheat PRELIMINARY SPECIFICATION version 1.0 december 2010 Tolearn more about OmiVsion Technologies. st wort con. ‘OmaiMision Tecnologie is publ raced on NASDAQ under he symclOVT.applications Bluetooth stereo headsels 1 Bluctcoth treo speakers = automanve stereo auto 1 Bluetooth minster soundooxes = 0vC3860.0566 (lasee) ‘Spm GFN features 1 ight integrated single chp Blutooth stron auto souton low power consumption f Bluezoth V2.0 + EDR spestetion compliant + Bluezotn aso with #2 eB waren poner ane $2 dBN oonive senstty 1 suppor ne mandstry Bluioatn compression codneldscosng scvema - Sub Band Coding (530) wich leoneoroe negated i stereo ao CODEC with 80d SNR DAC key specifications = power supply: DD: 1.7=1.9V (1.8 typical) Vig: 17330, peo! 22-42 + power requirements: ‘acive: 26 mA, SCOHVS: 23 ma, sloop: 400 uA shutdown: 12 yA temperature range: cperatng: 10°C to 80°C (ese table 5:2) storage: 45°C to 126°C (e00 table 8:2) 1 signal descriptions integrated 150 mA Litium batery charger negated swtehvllage equator negated ow ilies regulators 1) suppods A20P V1.2 and AVC VELA f= suppods HSP V1.2 and HFP VIS ART and SCCB interfaces 1 om power 1.8V operation 1 small fot 6-p6 GFN 7x7 «0.9m package 1 RoHS cometont ‘© Bluetooth specification: version 20 wih EDR 1 operating range: upto 10 motors ‘+ modulation: rt OPK /8DOPSK ‘= transmission frequency: 2402-2480 WH 1 receive sensitivity: 82 dBm @ 1% BER pica) ‘= maximum RF transmit power: 0 +4 oBm (+2 08m yea) ‘antenna impedance: 50 ohms Input clock: 12 He ‘+ package cimensions: 7 mmx 7 mmx0.omm {able 1-1 lists he signal descriptions and thir correspancing pn numbers forthe OVCS860. The package information is shown in section 8table 1-1 signal description (sheet 1 of 3) programmabe inpwoutput terminal, LED a ePIoat ital = Bea fo we cok gota TIA npAGUB emia LED o 3 ver over poste oueraupely of OTP ROM ow o YOD_ANA power positive ower supply fr analog cat core 35 VoD RF power postive ower supply for RF rout RF 5 RFA Re radiansmiertemina 7 RB RF ‘ap Wanemiter mina 38 VoD RF foweh postive power sippy fr RF ut RF ° voo.L0 Fever |, _postve power supply for cal oscar creat 19 YODARFGP ower postive power supply for RF crt 1" (oo.0ur Iinarvlage regulator auput 2 LOIN Iinarvotage requir input 8 »TALO ‘yal resonator cup (negative) 1 aaALL ‘ya resonator au (stve) a yoo svn postive power sup for analog Goat 18 nom ‘analog headphone connen ain 7 not ‘analog ___headchone et channel ouput erninal table 1-1 signal description (sheet Zof 3) postive poner supply for headshone power 8 voo_20 power poste 9 AOR ‘analog headphone right channel output terinal 20 vaio ‘log audio CODEC reference valiage input erminl 2 \voDA power positive power euply fr audio CODEC 2 Mic ‘analog microphone postive input terminal 28 MIOBIAS ‘analog microphone bas output terminal24 CHRGB8.OD analog charger status indicator output 28 vPow power postive power supply for charger 26 CHRG_R_OD power charger status indicator output a vat power charger output to battery terminal 2B eFB power switch regulator feedback input terminal 29 VODA power positive power supply for Buck 30 sw power switch regulator output terminal 3 Bvss power exposed pad as ground 32 ONKEY digital soft power ON/OFF control terminal 33 voo power positive power supply for digital core 4 v0.33 power ostve power supply for digital 10 35 RESETN digital Chip reset enable (active low) 36 TESTEN digital enable test mode (connect to ground) 7 GPIO_87 digital programmable VO terminal 38 GPIO_B6 digital programmable VO terminal 39 B00T0 digital select boot position 40 yoo power postive power supply for digital core table1-1 signal description (sheet 3 of 3) in urbe al name Coie GPIO_AS rogram JO era 5 POA aol programmable 10 teminal = oo ewer poslve power supply fr cgi core figure1-1 —pindlegram a voo_33 power postive power supply for digital LO 2 Cri Be dots! programmed 0 terminal a ast igtel—__LART nfariace data cut terminal a UART_AX daitel__UART interface data input terminal a POU_GLK —__digtal_—_—_~POM terface cook a PCU_SYNC gal PC terface spre a sie dglol___SCCB HieTace tock auout arminal a S100 ‘gisl___SCOB rete deta tominal a Ean cdgtal PCM interface data in 0 PCu_OUT __digfal_—~PM terface cata out st GOAT otal programmabie 0 tena 2 FI0_AB dgtel___ programmable /O terminal 58 ‘yoo_88 power postive power supply for dial 1luaRt 1% JGPIOAS, yop_33, JGPIoaz PCM_OUT PCM.CLK PCM.S¥NC lUART RX. yoo Coen JGPIo.ag cPioat cPio.a4 “}vo0 33 yoo lpooTo cPI0,36 cFi0,37 lrest.en resem cio sof” vee VOD _ANA von Re ral 3F8 OVvC3860 von pF vo0.Lo vooa pecP| Lo.0ur| Loo N xraLo| yoo 33 yoo loNkey vss ssw xmaL| avons ee 8 s z2°¢ 2 system level description 21 overview ‘Tho OVE3860 i a hight intograted, ow power single-chip Blustootn® RF transceiver and basoband processor for ura low cost Blustnotnstreo aude soutons. ‘The OV63860 femurs a 2.GH2 ISM RF transcewver, Bluetoct V2.0+EDR baseband, high-qually 20-07 stereo audio CODEC and a complete on-chip power management unitincluding sich regulator, Lithium onlpclymer ballry charger, ‘a low iq ines reguatrs. ‘Aconfigurable Blustotn stacks integrated it profes and applications including AZDP V1.2, AVRCP V1.4, HSP V1.2 land HPF V1.5. Incerperated wih an er-chip SEC decoder, the OVCSB60 fully eompliant withthe Bluetcath 20+EDR. speciation. I fulfils al Bluetooth stereo audio and vice commurication furetons.2.2 key features 221 general + cost etfoctve, low power consumption, single-chip solulon for Bluctoathstoreo aud apaticatlns + Blueloot V2.0 + EDR souctication comolant fuly integrated RF and baseband processor 222 radio + Bluslooth V20 + EDR specication compliant system in 2.4GHz ISM band + typical +2 dom transmit ower + typical -83 dBm receive sensitvty + supports Class 2 and Class $ without the need ofan external power amplier + upto 10 moters communication range 2.23 baseband processor + on-chip low power high performance, 32-b# RISC processor + 2M intemal ROM ard «8X8 ioral RAM + fully integrate Bluetooth baseband gk or FEC, HEC, acness code coreaton, CRC, demodulation, enerypion bit srsam generaten, uhstanng “fully supports Biveloath V2.0 + EDR features including AFH and enhanced dat rate upto 9 Mbps + supports C89 tanscoder fr voiceover air 224 synthesizer + fly integrated syrthesizer + 12MH2 erystal compatible 225 digital ntertaces + ingested high speed LIART interface for system cetugsng + SCO intortsco for extornal EEPROM to store device configuration data + ea ig fy ao CODES wih SNR > £38 sack + evaipDDbtareo se Spasenseg oer OAC) + cers veer voce raepara cone (ADC) *ngse anita anette @ 320 upuegcapetrie upe © ena menprens gt iptae ser 227 poner + enanp hgh tceny ited agus p 280% fom? 7Y 1 AV routed abl {827294 + Sp tatoo! argue Lm enpayneraan cage wm arannebe aac + sores st prayanane bat lg tn 228 slurtootnetace + evcip Sot ck son taped trae Porat got 1 even a208 v1.26 REF V4 pes wh Front SEC ce na Bue tee oe Bu, + Coane HEP VT Sand HaPY 2th 229 paceage at opr i N77 =D Om th23 architecture figure 2-1 functional block diagram 9