Introduction to Electronics (EC21103 End-Semester Examination: November 2018 Department of € & ECE, Indian Institute of Technology, Kharagpur. Time ~ 3 hours. Total marks = 90 IMPORTANT INSTRUCTIONS: + Write neatly with legible handwriting and always mark with correct question numbers. + Strictly organize and arrange all the answers of sub-questions together. Scattered answering practice will simply lose marks even if they are correct. + Show the steps and the units in your answers with high clarity and supported explanation. + Assume suitable values of device or circuit parameters and justify suitably, if not mentioned. ‘+ All symbols have their usual meaning as per international or conventional standards. + Answer all the questions. + Manage your time carefully while answering the questions. 1. Refer to fig. 1 and calculate Vor, Voa, Vos, Vos and Ve while ignoring offset parameters and phase shift in the op-amp circuit. (10 marks) Wa R= 520kQ, Rye 470k, Rar 621kQ, ‘Ac@=100000 VbD=+18v Vss=15V Fig. 4 2. a. Implement a digital full subtractor by using 4:1 multiplexers. Draw the truth table, solve by using multiplexer tables and show a detailed multiplexer based diagram. (10 marks) b. Simplify the following boolean function by using a k-map: f=2(3,8,10,12,14). Draw NMOS transistors based logic circuit, and also a simple logic gates based digital circuit, (5 marks) 3, a, Draw logic gate level circuits of a T-flip flop by using both D type and JK master-slave (MS) type flip flop configurations. The logic circuits must adopt only NOR, OR, AND and/or NOT gates only, and highlight D, JK master and JK slave flip flops portions in your diagram, (5 marks) b, Draw the waveform patterns vite and vefor the circuit as shown in fig. 2. Label the diagram and show the calculations. (5 marks) lof 4.Fig. 2 Fig. 3 4, Consider a multi-stage amplifier as shown in fig. 3. Draw the small-signal equivalent circutt Find the resistor values in the circuit and the voltage gain of the entire amplifier. Consider the following values: Voo=5V, Rin=400KQ, Koy=0.2 mAIV?, Kgx= 1.0 mAN?, Vint=0.6V, Vie2=-0.6 V. Ar= M20, Vosa‘=2V, Vosa2=3V, Vrst=0.6V, Ina=0.2mA and Inaz=0.5MA. (10 marks) 5, a. What are the main differences between Field Effect Transistor (FET) and a Bipolar junction Transistor (BJT) with respect to their properties, fabrication and operation wise? Give at least five (5) points. (5 marks) b, With Suitable diagrams explain the basic operations of a (i) n-channel enhancement mode MOSFET (i) p-channel depletion mode MOSFET. (5 marks) 6. a. For the logical expression: X = (A+ C) -(B +C) (i) Construct the truth table for X and using Karnaugh map technique simplify the expression of X. (i Implement this simplified expression of X obtained from (i) into a logic circuit by using only two NOR gates. (5 marks) b. (i) Prove the following De Morgan's Law: (A+B +0) = 4° BC (i) Draw the logic circuit and the truth table for a Sf flp flop using only NAND gates, with the initial condition of S=O and R= 1 (5 marks) 7a. Asilicon based pn junction diode is doped with a donor concentration of 10°” cm® and acceptor concentration of 10°° cm. When this diode was kept at room temperature and biased by a quiescent voltage of 0.5 volts, the diffusion conductance was obtained as 0.02 Siemens ‘Assume m= 1.5 X 10 cm Boltzmann's constant = 1.38*107 m?kgs-* kK". From this data, determine the following: (i) Thermal voltage (i) Built-in potential barrier (ii) Diffusion resistance (iv) Quiescent diode current {v) Diode saturation current in reverse bias (6 marks) 2ofa9.6 kO, Ro= 2k and Re = 0.4 kO, Rs = 0.1 0.7V, B = 100 and Va= ®. Calculate the corner (5 marks) V For the circuit shown in fig. 4, Ri = 51.2 KO, Ro KO, Co = 1pF and Vcc = 10V. Assuming Vac con frequency and the maximum gain. Fig. 4 8.2) Fora silicon crystal, moderately doped with arsenic dopants, the conductivity at zero Kelvin is: (i) Moderate (i) High (il) Zero (iv) No effect of temperature b) For an electron mobilty of 1000 em?/V-s, with an applied electric field of 0.5mV/em, the electron drift velocity is (i) 2X10" emisec (ii) 0.5 cm/sec (il) 0.5 10° cmisec (iv) 1000 cm/sec ©) Diode is a ...... device. (i) Unipolar (i) Bipolar (ji) Tripolar(iv) None of them ) For a p-n junction made up of moderately doped p type silicon (Si) and heavily doped n type Si, the depletion layer penetrates mostly the: ( p-type Si section (i) n-type Si section (ii) Equal penetration (iv) No effect of doping . between two e)The basic principle of a bipolar junction transistor (BJT) is that the .. terminals controls the ......... through the third terminal. (i) Voltage, Current (i) Current, Current (ii) Current, Voltage (v) Voltage, Voltage {) The emitter current le for a BJT with a = 0.98 and base current (Ie) = 100 HA is: (7) 0.098 mA (ji) 0.1 pA (il) 4 mA (iv) 5 MA g) In an FET, the .... between two terminals controls the ..... between the third terminal. (Voltage, Current (ji) Electric Field, Voltage (ii) Current, Voltage (iv) Current, Current 30f4h) For a p-channel MOSFET of poly silicon, by increasing the temperature, the magnitude of threshold voltage and the net drain current () Increases, Decreases (Ii) Decreases, Increases (ii Increases, Increases (iv) Decreases, Decreases ... voltage, i) The gate voltage in a JFET at which drain current becomes 22r0 called (i) Saturation (ji) Active (ill) Cut-off (iv) Pinch-off j)A MESFET device is usually fabricated by using (i) Palysiicon (i) Heavily doped Germanium (ii) Gallium Arsenide (iv) PMOS and NMOS i) For an ideal op-amp, the common mode input signal is given 2s: () Vie Ve# 0 i) Vs = V2 = 0 fil) Vs = 0 and Var 0 (W) ViFV2 =O 1) The output of a particular Op-amp increases 8V in 12us The slew rate is: () 96 Vius (i) 1.5 Vins (ii) 0.67 Vius(iv) 20 V/s mm) A certain non-inverting amplifier has Ri of 1 KO. and Rreesack of 100 kA. The closed-loop voltage gain is (i) 100000 (i) 100 (i) 104 (iv) 1000 rn) Derive the boolean expression for the output of the logic circuit shown below: (No option) Mara je ES) Xt 5 make the product term AB CD equal to 1.(No 0) Determine the binary values of A, B, C, and D thal option) (15 marks) END OF QUESTION PAPER