ZE3155 Digital Electronics Experiment Box

Product User Manual

Jinan Should Shine Import And Export Co., Ltd.

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 Product introduction:
Digital electric circuit learning machine provide various signal source, front side print
character wiring, reverse side install the component, all the signal source frequency meter
are constituted by CPLD chip and double-side board, all the component adapt high quality
product, improve the whole machine quality. Because the component are installed on the
reserve side, so it can reduce and avoid the possibility of man-made damage.
Product characteristic: easy to operation, durable, experiment project flexible, it easy to
carry out various the digital simulation experiment. This product is suitable for the electronic
technique teaching of institutions of higher learning and various vocational-technical
school.
System content
1. Power supply: AC input: 220V±10% , 50HZ
DC output: ±12V/200mA, 5V/2A
2. Manual monopulse electric circuit two group: it can output the positive and negative
pulsed in the meantime, pulse amplitudes is TTL electrical level.
3. Continuous pulses one group: output is TTL electrical level.
Fixed frequency impulse source: 1HZ,1KHZ,10KHZ,100KHZ,1MHZ
4. Six- bit high accuracy digital frequency meter, measuring range: 0-9.9999MHZ error<1HZ
( design by CPLD chip )
5. The output and display of logic level.
A Eight- bit independent logic level switch: it can output “0”,“1” electrical level ( it is positive
logic.
B The logic electrical level constituted by eight- bit red LED and drive electric circuit
6. Nixie tube display
A Four-bit BCD code decode display electric circuit constituted by LED nixie tube.
B One-bit eight segment nixie tube, pin totally lead out, it used for nixie tube experiment.
7. CCD timing generator and start and stop control electric circuit
8. 21 eight core, fourteen core, sixteen core, twenty core, twenty-eight core and other
circular hole socket. It can meet various IC chip.
9. Four each resistance value potentiometer
2

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 10. 30 Regular size resistance-capacitance
Recommended experiment project
1. The parameter testing and using of TTL integrated logic gate
2. The testing of CMOS integrated logic gate
3. The logic function experiment of gate electric circuit
4. Common combinations logic function component testing
5. Half adder, full adder and logical operation experiment
6. Seven people voting circuit and blood type detection electric circuit
7. Trigger function testing
8. JK, D trigger logic function and main parameter testing
9. Three state output trigger and latch
10. Asynchronization binary system counter experiment
11. Synchronization binary system counter experiment
12. Shifting register function testing
13. Count, decode, display electric circuit experiment
14. 555 integrated electric circuit and application
15. Wave generation and monostabillity trigger
16,. The design of sequence detector
17. D/A digital analog converter
18. A/D analog-digital converter
19. Manual intervention traffic light controller
20. Digital electronic clock design
21. Digital frequency meter
22. Automobile tail light control experiment

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 Experiment Notice And Warning
In order to do the experiment well, to achieve the intended purpose of the experiment, and
to ensure the safety of the human body and equipment in the experiment, the precautions
of this experiment are specially formulated, and the experimenter is strictly followed.
1. Prepare adequately before each experiment and carefully prepare for it. The preparation
requirements are as follows:
(1) Carefully read the relevant chapters in the experimental instructions and textbooks,
master the experimental principles, read the experimental lines, and make the necessary
theoretical estimates.
(2) Defining the purpose of the experiment, the requirements of the task and the
precautions. Understand and be familiar with the experimental procedures and operating
procedures.
(3) Understand and be familiar with the use methods and precautions of each instrument
used in the experiment.
(4) Prepare paper, pen, form, etc. for recording experimental data.
2. Before starting the experiment, carefully check whether the equipment used in the
experiment is complete? does it reach the requirement? Is the work normal? If there is a
problem, report it to the teacher immediately.
3. In order to ensure the safety of the person and equipment, in the experiment, it is
necessary to strictly abide by the experimental requirements and implement the operating
procedures:
(1) Before using the equipment, be familiar with and familiar with its performance, operation
methods and precautions for use, and use it as required. If you don't understand, you
should ask the instructor.
(2) Correctly select the gear position and range of the measuring instrument and connect
them correctly. When measuring, the voltmeters should be connected in parallel and the
ammeters should be connected in series. It is strictly forbidden to measure the voltage with
the ohmmeter or current gear of the multimeter (or with an ammeter).

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 (3) It is strictly forbidden to make wiring or change wiring when there is electricity. It is
strictly forbidden to touch the metal parts of the instrument and the experimental circuit at
will to avoid electric shock.
(4) In the experiment, the connection line should be carefully carried out according to the
circuit diagram, and the same group of students should check each other carefully, and the
power can be turned on after the determination is correct. If you are in the first trial or are
unsure, you should turn on the power after the instructor has reviewed and approved.
(5) If abnormal conditions occur during the experiment, the power should be cut off
immediately, the site should be protected, the instructor should be reported, and the cause
of the failure should be checked. After troubleshooting, continue the experiment with the
consent of the instructor.
(6) Take care of state property. Use instrumentation with ease. Any instrumentation
equipment, without knowing its performance and usage, is not allowed to use it without the
permission of the teacher. Except for the connecting line, it is strictly forbidden to modify the
instrument.
4. After the experiment is completed, the power should be turned off, the connection line
and equipment should be arranged, and the instructor should check the acceptance before
leaving. If the laboratory equipment and equipment are damaged, they should immediately
report to the teacher and handle it according to the specific conditions.
5. After the experiment, it is necessary to carefully summarize the experimental data,
analyze and summarize the experimental results, and independently write the experimental
report.

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 Experiment 1 Gate Logic Circuit Function And Test

I. The purpose of the experiment

1. Familiar with the logic function of the gate circuit.
2. Familiar with the digital circuit experiment box and the use of the oscilloscope.

II. Experimental instruments and devices

1, oscilloscope;
2, experimental components
74LS00 two input terminal four NAND gate 2 pieces
74LS20 four input double NAND gate 1 piece
74LS86 two input four exclusive OR gate 1 piece
74LS04 six inverters 1 piece

III. Preparation requirements

1. Review the working principle of the gate circuit and the corresponding logical expression.
2. Familiar with the lead position of the integrated circuit used and the purpose of each lead.
3. Understand how to use the dual trace oscilloscope.

IV. Experimental content

Check whether the power of the experiment box is normal before the experiment. Then
select the integrated circuit for the experiment, connect the wiring according to the
experimental wiring diagram of your own design, pay special attention to the Vcc and the
ground wire can not be connected incorrectly (Vcc=+5v, available on the ground wire
experimental box). After the line is connected, the experiment instructs the teacher to check
the correct power-on experiment. In the experiment, the wiring must be disconnected from
the power supply before the connection is completed.

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 1, test gate circuit logic function
(1) Select one of the four-input NAND gates 74LS20 and insert it into the IC socket, as
shown in Figure 1.1.
Wiring, input terminal K1 ~ K4 (output socket of the logic level switch in the lower left corner
of the experiment box), the output terminal is connected to the LED level of the lower left
corner of the experiment box to indicate any one of the diode input jacks L1 ~ L8.
(2) Convert the logic level switch according to the state of Table 1.1, and measure the
output logic state value and voltage value to fill in the table.

Table 1.1

2, the logical relationship of the logic circuit

(1) Use 74LS00 dual-input NAND gate circuit, connect according to Figure 1.2 and Figure
1.3, and fill in the input-output logic relationship in Table 1.2 and Table 1.3 respectively.
(2) Write the logical expression of the two circuits.

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 3, using NAND gate control output
Use a piece of 74LS00 to wire as shown in Figure 1.4. S Connect the high and low switches
respectively, and observe the control effect of S on the output pulse with an oscilloscope.

4. Use NAND gates to form other gates and test and verify.

Figure 1.4
(1) Composition of the right or wrong:
Using a two-input four-in-one NAND gate to form a NOR gate

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 — — — — — —
Y= = A B
Draw a circuit diagram, test and fill in Table 1.4.
(2) Forming an XOR gate:
1 Convert the XOR gate expression to a NAND gate expression;
2 Draw a logic circuit diagram;
3 Test and fill out Form 1.5.

5, XOR gate logic function test

(1) Select two input four-OR gate circuit 74LS86, connect according to Figure 1.5, input
terminals 1, 2, 4, 5 are connected to the level switch output jack, and output terminals A, B,
Y are connected to the level display LED.
(2) Convert the level switch to the state of Table 1.6 and fill in the results

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 6, logic gate transmission delay time measurement
Use the six-inverter 74LS04 logic circuit to connect according to Figure 1.6, input 1KHz
pulse (fixed pulse unit in the upper left corner of the experiment box), connect the input
pulse and output pulse to the double trace oscilloscope Y1 and Y2 axes respectively, and
observe the input and output phase difference.

Note: “1” in the table indicates high potential, and “0” indicates low potential.
V. Experimental report
1. Draw a logic diagram as required.
2. Answer the question:
(1) How to judge whether the logic function of the gate circuit is normal?
(2) A continuous pulse is connected to one input of the NAND gate. What state of the other
end allows the pulse to pass? What state prohibits the passage of pulses?
(3) XOR gate is also called controllable reverse phase door. Why?

10

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 Experiment 2 CMOS Gate Circuit
I., the purpose of the experiment
1. Master the method of CMOS gate function test.
2. Learn the test method for CMOS gate circuit characteristics.
3. Compare the characteristics of CMOS gates and TTL gates.

II, the experimental content

1, CMOS chip CD4001 functional test
CMOS integrated circuit 4000 series chips have a wide range of power supply voltages and
can be used from +3 to +18V.
The logic high and low values of the CMOS gate circuit are slightly different from the TTL
gate circuit. Usually, the high level is VDD and the low level is 0V. The power supply
voltage of this experiment is VDD=+5V.
Add different logic levels at terminals A and B, measure the corresponding V0 values with a
voltmeter, and list the results in the form of a truth table.
Note: The extra inputs of the CMOS gate are not allowed to float.

2, CMOS gate circuit CD4001 voltage transmission characteristics test

Wire as shown in Figure 10.1. Shilling VDD = +10V. Adjust the resistance of the
potentiometer RW to change the VI from +3 to +15V and measure the characteristic curve
of V0 as a function of V1.

Figure 10.1
11

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 Record the relevant experimental data, draw it in tabular form, and plot the voltage transfer
characteristic curve V0=f(VI). Repeat the above experiment by changing the VDD value to
+5V and +15V respectively.
Draw the V0=f(VI) curve corresponding to the CMOS gate taking different VDD values on
the same coordinate.
Measurement of the average transmission time Tpd of the CD4001. Wire the circuit as
shown in Figure 10.2. In the figure, VDD = +5V. The CP is taken from a continuous pulse
on the chamber. Observe the similarities and differences between VI and CP, what is the
role of chip 74LS00?

Figure 10.2
Observe and record the V0~VI waveform with a dual trace oscilloscope and measure the
————
T p d value of the CD4001 chip.
————
If the CD4001 chip in Figure 10.2 is changed to the CD4011 chip, the T p d of the CD4011
chip is measured. Compared with the Tpd of the TTL gate circuit, what conclusion do you
get from it?
III. thinking questions
1. The redundant input of the CMOS gate circuit is not allowed to float when it is used.
What is the reason? Test through experiment
Determine the level value of the floating end of the CMOS gate, and analyze whether the
measured value is correct?
2. If the A terminal of the CMOS door CD4001 chip is connected as follows:
1 connected to +VDD;
2 connected to GND;

12

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 3 grounded via 1M_ resistor;
4 grounded via 500_ resistor;
5 Connect to +VDD via a 100K_ resistor.
Using a voltmeter to measure the voltage at the other input B, how many volts do you think
each should be? Verify with experiments.
Can a general CMOS gate circuit be "wired"? why? To logically AND the output of a CMOS
gate, what method do you think?
If you consider pushing a CMOS gate directly with a TTL gate, or pushing a TTL gate
directly with a CMOS gate, can you work properly? How did you think about it? If there are
conditions, please verify by experiment.

IV, the material

1, CMOS chip:
CD4001 4 2 input NOR gate 1 piece
CD4011 four 2 input NAND gate 1 piece
2, TTL chip:
74LS00 four 2 input NAND gate
Potentiometer 47K 1 only
Resistance 5.1K 2 only

13

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 Experiment 3 Decoder and data selector
I, the purpose of the experiment
1. Familiar with the integrated decoder.
2. Understand the application of the integrated decoder and data selector.

II, experimental instruments and devices

1, double trace oscilloscope
2, experimental components
1 74LS139 2 — 4 line decoder 1 piece
2 74LS153 dual 4 select 1 data selector 1 piece
3 74LS00 Two input four NAND gate 1 piece

III, the preparation requirements

1. Preview the decoder and data selector functions;
2. Familiar with the lead position of the integrated circuit used.

IV. the experimental content

1, decoder function test
Connect the 74LS139 decoder circuit as shown in Figure 2.1, refer to Table 2.1 Input Level,
test the output status and fill in the table.

14

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 2, decoder conversion
Convert the dual 2-4 line decoder to a 3-8 line decoder.
(1) Draw a conversion circuit diagram;
(2) Wire the test box and verify that the design is correct;
(3) Fill in the 3-8 line decoder function table 2.2.

15

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 3. Test and application of data selector
(1) Select the double 4 select 1 data selector 74LS153 with reference to Figure 2..2, test its
function and fill in Table 2.3.

Figure 2.2

16

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 (2) Connect the signals of four different frequencies of the fixed pulse in the experimental
box pulse signal source to the four input terminals of the data selector, the output terminal
1Y to the oscilloscope, and the selection end (A, B) still change according to the status of
Table 2.3, respectively observe 4 A pulse signal of different frequencies.

4, seven-segment digital tube decoding circuit

Input the 8421BCD code to the decoder input terminals 1A to 1D and 2A to 2D on the
experiment box, and observe that the two digital tubes display the symbols of the output.

V. Experimental report
1. Summarize the use of the decoder and data selector.
2. Thinking: If you enter 1010~1111 code, what symbol will the digital tube display?

17

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 Experiment 4 Operational circuit (half adder, full adder, and logic operation)
I, the purpose of the experiment
1. Master the functional test of the combinational logic circuit.
2. Verify the logic function of the half adder full adder.
3. Learn the rules of binary operation.

II, experimental instruments and devices

1, components:
74LS00 two input terminal four NAND gate 3 pieces
74LS86 two input four exclusive OR gate 1 piece
74LS54 four sets of input and or not one piece

III, the preparation requirements

1. Preview the analysis method of the combinational logic circuit;
2. The working principle of the half adder and the full adder composed of NAND gates and
XOR gates;
3. Predict the operation of binary numbers.

IV.Experiment content

Figure 3.1

18

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 1, combination logic circuit function test
(1) Combine two 74LS00 to form the logic circuit shown in Figure 3.1. In order to facilitate
wiring and inspection, wire the chip number and the corresponding pin number indicated in
the figure.
(2) In the figure, A, B, and C are connected to the level switch, and Y1 and Y2 are
connected to the LED display level.
(3) According to the requirements of Table 3.1, change the state of A, B, C to fill in the form
and write the logical expression of Y1 and Y2.
(4) Compare the results of the logical expression operation with the experiment.

2. Logic function of testing half-adder composed of XOR gate (74LS86) and NAND gate
According to the logical expression of the half adder, the half adder Y is the exclusive OR of
A and B, and the carry Z is the phase A and B, so the half adder can be composed of an
integrated XOR gate and two NAND gates.
Figure 3.2.

19

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 (1) Connect the above circuit with the XOR gate and the NAND gate on the test chamber. A,
B are connected to the level switch, Y, Z are connected to the level display.
(2) Change the A and B states as required in Table 3.2 and fill in the results of the
experiment.

3. Test the logic function of the full adder.

(1) Write the logical expression of the circuit in Figure 3.3;
(2) List the truth table according to the logical expression;
(3) Draw the Karnaugh map of the functions Si and Ci according to the truth table.
Y = Z = X1 =
X2 = X3 = Si =
Ci =

20

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 (4) Fill in the status of each point in Table 3.3.

21

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 (5) Select the NAND gate according to the schematic diagram and connect the wiring for
testing. Record the results in Table 3.4 and compare them with the data in Table 3.3 to see
if the logic functions are consistent.

4. Test the logic function of the full adder composed of XOR, AND or NAND gate
(1) Draw a logic circuit diagram of the full adder with the XOR gate and the NOR gate and
the NOT gate, and write a logical expression.
(2) Draw the wiring diagram by yourself using the above three logic circuit devices. When
wiring, pay attention to the grounding of the input of the AND gate that is not used in the
NAND gate.
(3) The input terminals Ai, Bi, and Ci-1 are connected to the level switch output jack (Si),
and the output terminal level is displayed as a light-emitting diode (Di) and the logic state is
filled in Table 3.5.

22

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822
 V. Experimental report
1. Organize experimental data, charts and analyze and discuss the experimental results.
2. Summarize the analysis of the combinational logic circuit.

23

www.ssedumachine.com Tel/Fax:+86-531-67808851 Email: education@ssedumachine.com

Address: No.15612 Century Avenue Room 1-1612, Building 1, High Tech Zone,Jinan, China Cell:+86-15153112822