Octal Bus Buffer With 3 State Outputs (Non Inverted) : PD CC o
Octal Bus Buffer With 3 State Outputs (Non Inverted) : PD CC o
TRUTH TABLE
INPUT OUTPUT
G An Yn
L L L
L H H
H X Z
X:”H” or ”L”
Z: High impedance
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74ACT244
DC SPECIFICATIONS
Symb ol Parameter Test Co nditions Valu e Un it
V CC T A = 25 oC -40 to 85 o C
(V) Min. T yp. Max. Min. Max.
VIH High Level Input Voltage 4.5 VO = 0.1 V or 2.0 1.5 2.0
V
5.5 VCC - 0.1 V 2.0 1.5 2.0
VIL Low Level Input Voltage 4.5 VO = 0.1 V or 1.5 0.8 0.8
V
5.5 VCC - 0.1 V 1.5 0.8 0.8
VOH High Level Output 4.5 IO=-50 µA 4.4 4.49 4.4
VI(*) = V
Voltage 5.5 IO=-50 µA 5.4 5.49 5.4
VIH or
4.5 VIL IO=-24 mA 3.86 3.76
5.5 IO=-24 mA 4.86 4.76
VOL Low Level Output 4.5 (*) IO=50 µA 0.001 0.1 0.1
VI = V
Voltage 5.5 IO=50 mA 0.001 0.1 0.1
VIH or
4.5 VIL IO=24 mA 0.36 0.44
5.5 IO=24 mA 0.36 0.44
II Input Leakage Current 5.5 VI = VCC orGND ±0.1 ±1 µA
IOZ 3 State Output Leakage 5.5 VI = VIH orVIL ±0.5 ±5 µA
Current VO = VCC orGND
ICCT Max ICC /Input 5.5 VI = VCC -2.1V 0.6 1.5 mA
ICC Quiescent Supply 5.5 VI = VCC orGND 8 80 µA
Current
IOLD Dynamic Output Current 5.5 VOLD = 1.65 V max 75 mA
IOHD (note 1, 2) VOHD = 3.85 V min -75 mA
1) Maximum test duration 2ms, one output loaded attime
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50 Ω.
(*) All outputs loaded.
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74ACT244
CAPACITIVE CHARACTERISTICS
Symb ol Parameter Test Co nditions Valu e Un it
o o
V CC T A = 25 C -40 to 85 C
(V) Min. T yp. Max. Min. Max.
CIN Input Capacitance 5.0 4 pF
Ci/o I/O Capacitance 5.0 8 pF
CPD Power Dissipation 5.0 24 pF
Capacitance (note 1)
1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto
Test Circuit).Average operating current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC/n (per circuit)
TEST CIRCUIT
T EST SW IT CH
tPLH , tPHL Open
tPZL , tPLZ 2VCC
tPZH , tPHZ Open
CL = 50 pF or equivalent (includes jigand probe capacitance)
RL = R1 = 500Ω orequivalent
RT = ZOUT of pulse generator (typically 50Ω)
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74ACT244
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)
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74ACT244
mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
a1 0.254 0.010
b 0.45 0.018
b1 0.25 0.010
D 25.4 1.000
E 8.5 0.335
e 2.54 0.100
e3 22.86 0.900
F 7.1 0.280
I 3.93 0.155
L 3.3 0.130
Z 1.34 0.053
P001J
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74ACT244
mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 2.65 0.104
a1 0.10 0.20 0.004 0.007
a2 2.45 0.096
b 0.35 0.49 0.013 0.019
b1 0.23 0.32 0.009 0.012
C 0.50 0.020
c1 45 (typ.)
D 12.60 13.00 0.496 0.512
E 10.00 10.65 0.393 0.419
e 1.27 0.050
e3 11.43 0.450
F 7.40 7.60 0.291 0.299
L 0.50 1.27 0.19 0.050
M 0.75 0.029
S 8 (max.)
P013L
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74ACT244
mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 1.1 0.433
K 0o 4o 8o 0o 4o 8o
A A2
K L
A1 b e
c E
E1
PIN 1 IDENTIFICATION
1
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74ACT244
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granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
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