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CAT 1 Digital Principles and System Design

This document contains an exam for a Digital Principles and System Design course with 2 parts: - Part A contains 10 multiple choice questions worth 2 marks each on topics like binary conversions, arithmetic, logic gates, and switching functions. - Part B contains 5 longer answer questions worth 13 marks each, asking students to design circuits like half/full adders, subtractors, magnitude comparators, and implement logic functions using NAND/NOR gates.

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72 views1 page

CAT 1 Digital Principles and System Design

This document contains an exam for a Digital Principles and System Design course with 2 parts: - Part A contains 10 multiple choice questions worth 2 marks each on topics like binary conversions, arithmetic, logic gates, and switching functions. - Part B contains 5 longer answer questions worth 13 marks each, asking students to design circuits like half/full adders, subtractors, magnitude comparators, and implement logic functions using NAND/NOR gates.

Uploaded by

malai
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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DEPARTMENT OF ECE DEPARTMENT OF ECE

CAT-I: August - Digital Principles and System Design CAT-I: August - Digital Principles and System Design
Duration: 3 Hours Date: 01/08/2018 Duration: 3 Hours Date: 01/08/2018
Dept/Year/Sem: CSE II /III(B) Marks: 100 Dept/Year/Sem: CSE II /III(B) Marks: 100
PART-A-Answer All the questions (10x 2 = 10) PART-A-Answer All the questions (10x 2 = 10)
1. Convert (3102.12)4 to its decimal equivalent. 1. Convert (3102.12)4 to its decimal equivalent.
2. Convert (101101.1101)2 to decimal and Hexa decimal form. 2. Convert (101101.1101)2 to decimal and Hexa decimal form.
3. Perform subtraction (11010 – 10000)2 using 1’s compliment. 3. Perform subtraction (11010 – 10000)2 using 1’s compliment.
4. Perform (147-89) using 2’s complement binary arithmetic. 4. Perform (147-89) using 2’s complement binary arithmetic.
5. Divide 110110112 by 1102 5. Divide 110110112 by 1102
6. Perform 46 – 22 in BCD using 9’s complement. 6. Perform 46 – 22 in BCD using 9’s complement.
7. Perform 24-56 in BCD using 10’s complement. 7. Perform 24-56 in BCD using 10’s complement.
8. Express the switching function f(AB) = A in canonical sop form. 8. Express the switching function f(AB) = A in canonical sop form.
9. Draw the logic diagram of Ex-OR gate. 9. Draw the logic diagram of Ex-OR gate.
10. What are the universal gates? 10. What are the universal gates?
PART-B (Answer All The Questions)(5 * 13 = 65) PART-B (Answer All The Questions)(5 * 13 = 65)
11. A. Design a Half and Full adder. 11. A. Design a Half and Full adder.
(OR) (OR)
B. Write short notes on logic gates. B. Write short notes on logic gates.
12. A. Design a Half and full Subtractor. 12. A. Design a Half and full Subtractor.
(OR) (OR)
B. subtract using 9’s complement (888 – 111). B. subtract using 9’s complement (888 – 111).
13. A. Design a Fast adder. 13. A. Design a Fast adder.
(OR) (OR)
B. subtract using 10’s complement (111 – 888) B. subtract using 10’s complement (111 – 888)
14. A Obtain the minimal product of sums for F = ∑ (02 3 6 7 + D(810 11 14. A Obtain the minimal product of sums for F = ∑ (02 3 6 7 + D(810 11
15) and draw its logic diagram using NOR gates. 15) and draw its logic diagram using NOR gates.
(OR) (OR)
B. Reduce by k map f(ABCD) = ∑m (01345689 11 12+ D(14 15 ) & draw B. Reduce by k map f(ABCD) = ∑m (01345689 11 12+ D(14 15 ) & draw
its logic diagram its logic diagram
15. A. Reduce the following function using k map technique and implement 15. A. Reduce the following function using k map technique and implement
it by using NAND gates. F(WXYZ) = ∑m(0,7,8,9,10,12) +∑d(2,5,13) it by using NAND gates. F(WXYZ) = ∑m(0,7,8,9,10,12) +∑d(2,5,13)
(OR) (OR)
B. perform BCD addition 4567 +8932 B. perform BCD addition 4567 +8932
Part C Part C
16. A Design a 2 bit magnitude comparator. 16. A Design a 2 bit magnitude comparator.
B design a BCD adder. B design a BCD adder.

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