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Basic Op-Amp Circuits: 1.1 Objective

This document describes the objective, hardware requirements, theory, and design of basic op-amp circuits including the inverting amplifier, non-inverting amplifier, and voltage follower. It provides circuit diagrams and equations for the closed-loop voltage gain, input and output impedances of each circuit. The key aspects of op-amp operation and negative feedback are also explained.

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0% found this document useful (0 votes)
126 views26 pages

Basic Op-Amp Circuits: 1.1 Objective

This document describes the objective, hardware requirements, theory, and design of basic op-amp circuits including the inverting amplifier, non-inverting amplifier, and voltage follower. It provides circuit diagrams and equations for the closed-loop voltage gain, input and output impedances of each circuit. The key aspects of op-amp operation and negative feedback are also explained.

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viswa teja
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© © All Rights Reserved
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1.

BASIC OP-AMP CIRCUITS

1.1 OBJECTIVE
1. To design the following basic op-amp circuits and explain the operation of each:
a. Inverting amplifier
b. Non-inverting amplifier
c. Voltage follower

1.2 HARDWARE REQUIRED


S.No Equipment/Component name Specifications/Value Quantity

1 IC 741 Refer data sheet in 1


appendix

2 Cathode Ray Oscilloscope (0 – 20MHz) 1 1

3 Resistors 1.5K Ω 2

4 Dual Regulated power supply (0 -30V), 1A 1

5 Function Generator (0-2) MHz 1

6 ASLK PRO Kit Refer data sheet in 1


appendix

1.3THEORY
An op-amp is a high gain, direct coupled differential linear amplifier choose response
characteristics are externally controlled by negative feedback from the output to input, op-amp
has very high input impedance, typically a few mega ohms and low output impedance, less
than 100.
Op-amps can perform mathematical operations like summation integration,
differentiation, logarithm, anti-logarithm, etc., and hence the name operational amplifier op-
amps are also used as video and audio amplifiers, oscillators and so on, in communication
electronics, in instrumentation and control, in medical electronics, etc.
1.3.1 Circuit symbol and op-amp terminals

The circuit schematic of an op-amp is a triangle as shown below in Fig. 1-1 op-amp has
two input terminal. The minus input, marked (-) is the inverting input. A signal applied to the
minus terminal will be shifted in phase 180o at the output. The plus input, marked (+) is the
non-inverting input. A signal applied to the plus terminal will appear in the same phase at the
output as at the input. +VCC denotes the positive and negative power supplies. Most op-amps
operate with a wide range of supply voltages. A dual power supply of +15V is quite common
in practical op-amp circuits. The use of the positive and negative supply voltages allows the
output of the op-amp to swing in both positive and negative directions.

Fig-1-1 op-amp circuit symbol


1.3.2 Op amp internal circuit
Commercial integrated circuit OP-amps usually consists of your cascaded blocks as shown in
figure 1-2shown below.
V2
Differential Differential Buffer and Output
Amplifier Amplifier Level Vo
driver
V1 Translator

Fig 1-2Internal block schematic op-amp


The first two stages are cascaded difference amplifier used to provide high gain. The third stage
is a buffer and the last stage is the output driver. The buffer is usually an emitter fallowing
whose input impedance is very high so that it prevents loading of the high gain stage. The
output stage is designed to provide low output impedance. The buffer stage along with the
output stage also acts as a level shifter so that output voltage is zero for zero inputs.

In this laboratory experiment, you will learn several basic ways in which an op-amp
can be connected using negative feedback to stabilize the gain and increase the frequency
response. The extremely high open-loop gain of an op-amp creates an unstable situation
because a small noise voltage on the input can be amplified to a point where the amplifier in
driven out of its linear region. Also unwanted oscillations can occur. In addition, the open-loop
gain parameter of an op-amp can vary greatly from one device to the next. Negative feedback
takes a portion of output and applies it back out of phase with the input, creating an effective
reduction in gain. This closed-loop gain is usually much less than the open-loop gain and
independent of it.

1.3.3 Closed – loop voltage gain, ACL


The closed-loop voltage gain is the voltage gain of an op-amp with external feedback.
The amplifier configuration consists of the op-amp and an external negative feedback circuit
that connects the output to the inverting input. The closed loop voltage gain is determined by
the external component values and can be precisely controlled by them.

1.3.4 Non-inverting amplifier


An op-amp connected in a closed-loop configuration as a non-inverting amplifier with
a controlled amount of voltage gain is shown in Fig 1-3.

Fig. 1-3 Non-inverting amplifier configuration of op-amp


The input signal is applied to the non-inverting (+) input. The output is applied back to the
inverting(-) input through the feedback circuit (closed loop) formed by the input resistor R 1
and the feedback resistor Rf. This creates negative feedback as follows. Resistors R1 and Rf
form a voltage-divider circuit, which reduces VO and connects the reduced voltage Vf to the
inverting input. The feedback is expressed as
R1
Vf = ( )Vo
R1 + R f

The difference of the input voltage, Vin and the feedback voltage, Vfis the differential input of
the op-amp. This differential voltage is amplified by the gain of the op-amp and produces an
output voltage expressed as
 Rf 
Vo = 1 + Vin
 R1 

The closed-loop gain of the non-inverting amplifier is, thus


Rf
ACL ( NI ) = 1 +
R1

Notice that the closed loop gain is


• independent of open-loop gain of op-amp
• set by selecting values of R1 and Rf

An expression for the input impedance of a non-inverting amplifier can be written as


Z in( NI ) = (1 + AOL  ) Z in

Where AOL = open-loop voltage gain of op-amp


Zin = internal input impedance of op-amp (without feedback)
 = attenuation of the feedback circuit
Vf R1
= =
Vo R1 + R f

Above equation shows that the input impedance of the non-inverting amplifier configuration
with negative feedback is much greater than the internal output impedance of the op-amp itself.
The output impedance of a Non-Inverting amplifier can be written as
Zo
Z o ( NI ) =
1 + AOL
This equation shows that the output impedance of non-inverting amplifier is much less than the
internal output impedance, Zo of the op-amp.

1.3.5 Voltage follower


The voltage follower configuration is a special case of the non-inverting amplifier
where all the output voltage is feedback to the inverting input by straight connection, as shown
in fig. 1.4

Fig. 1.4 Voltage follower configuration of op-amp

As you can see, the straight feedback connection has a voltage gain of (which means there is
no gain).
ACL (VF) = 1

The most important features of the voltage follower configuration are its very high input
impedance and its very low output impedance. These features make it a nearly ideal buffer
amplifier for interfacing high-impedance sources and low-impedance loads.
Z IN (VF ) = (1 + AOL ) Z in

ZO
Z O (VF ) =
1 + AOL
As you can see, the voltage follower input impedance is greater for a given AOL and Zin than
for the non-inverting amplifier. Also, its output impedance is much smaller.
1.3.6. Inverting amplifier
An op-amp connected as an inverting amplifier with a controlled amount of voltage
gain is shown in fig. 1.5

Fig.1.5 inverting amplifier


The input signal is applied through a series input resistor R1 to the inverting input. Also, the
output is fed back through Rf to the same input. The non-inverting input is grounded. An
expression for the output voltage of the inverting amplifier is written as
Rf
VO = − Vin
R1

The –ve sign indicates inversion. The closed-loop gain of the inverting amplifier is, thus
Rf
ACL ( I ) = −
R1

The input & output impedances of an inverting amplifier are


Zin(I) = R1
Zo
Z O(I ) =
1 + AOL 

The output impedance of both the non-inverting and inverting amplifier configurations is very
low; in fact, it is almost zero in practical cases. Because of this near zero output impedance,
any load impedance connected to the op-amp output can vary greatly and not change the output
voltage at all.

1.3.7. Design Constraints


• The output signal is limited by the IC's power sources: the output signal cannot be greater
than +15V.
1.4 PRE LAB QUESTIONS

1. Identify each of the op-amp configurations

Fig.(a)
2. A non-inverting amplifier has R1 of 2K & Rf of 200K. Determine Vf and 
(Feedback voltage and feedback fraction), if VO = 5V

3. For the amplifier in Fig.(b) determine the following: (a) ACL(NI) (b) VO (c) Vf

Fig.(b)

1.5 EXPERIMENT
(1) Non-Inverting amplifier
1.1 Design a non-inverting amplifier for the gain of 10. Let R1=1.5k Assemble the circuit.
1.2 Feed sinusoidal input of amplitude 1V and frequency 1KHz
1.3 Observe the input voltage and output voltage on a CRO. Tabulate the reading in Table

(2) Voltage follower


2.1 Assemble a voltage follower circuit.
2.2 Feed sinusoidal input of amplitude 10V and frequency 1KHz.
2.3 Observe the input and output voltages on a CRO. Tabulate the readings in Table.
(3) Inverting amplifier
3.1 Design an inverting amplifier for the gain of 10. Let R1=1.5k. Assemble the circuit.
3.2 Feed sinusoidal input of amplitude 1V and frequency 1KHz.
3.3 Observe the input and output voltages on a CRO. Tabulate the readings in Table

op-amp Input signal Output signal Voltage gain


configuration /
Designed Observed
circuit Amplitude Frequency Amplitude Frequency
value value
Non-inverting
amplifier
Voltage
follower
Inverting
amplifier
1.6. POST LAB QUESTIONS
1. What is the relationship, if any, between the polarity of the output and input voltages in
your experimental op-amp? Refer to your data.
2. Comment on the statement: “The closed-loop gain-bandwidth product is a constant for a
given op-amp”.
3. Find the value of Rf that will produce closed-loop gain of 300 in each amplifier in
fig.(c)

Fig.(c)
4. Determine the approximate values for each of the following quantities in Fig.(d).

Fig.(d)
5. If a signal voltage of 10mV is applied to each amplifier in Fig.(e), what are the output
voltages?
Fig. (e)
2. INTEGRATOR AND DIFFERENTIATOR

2.1 OBJECTIVE
1. Design an integrator for a frequency of 1KHz, given R=1KΩ , C=0.1 µF and
Rf = 1MΩ. Conduct the experiment and plot integrated output waveforms for
various input waveforms and analyze
2. Design an differentiator for a frequency of 1KHz, given R=10KΩ , and C=0.1µf
and Rf = 470Ω. Conduct the experiment and plot integrated output waveforms for
various input waveforms and analyze

2.2 HARDWARE REQUIRED


S.No Equipment/Component name Specifications/Value Quantity

1 IC 741 Refer data sheet in 1


appendix

2 Cathode Ray Oscilloscope (0 – 20MHz) 1 1

3 Resistors 1K Ω 1

1M Ω 1

10 K Ω 1

470 Ω 1

4 Capacitors 0.1µf 2

5 Dual Regulated power supply (0 -30V), 1A 1

6 Function Generator (0-2) MHz 1

7 ASLK PRO Kit 1

2.3 THEORY
In this laboratory experiment, you will learn several basic ways in which an op-amp
can be connected using negative feedback to stabilize the gain and increase the frequency
response. The extremely high open-loop gain of an op-amp creates an unstable situation
because a small noise voltage on the input can be amplified to a point where the amplifier in
driven out of its linear region. Also unwanted oscillations can occur. In addition, the open-loop
gain parameter of an op-amp can vary greatly from one device to the next. Negative feedback
takes a portion of output and applies it back out of phase with the input, creating an effective
reduction in gain. This closed-loop gain is usually much less than the open-loop gain and
independent of it.

2.3.1 Integrator
An op-amp integrator simulates mathematical integration which is basically a summing
process that determines the total area under the curve of a function ie., the integrator does
integration of the input voltage waveform. Here the input element is resistor and the feedback
element is capacitor as shown in fig.2-1.

Fig.2-1 Basic op-amp integrator


The output voltage is given by
t
1
RC o
VO = − VS dt + VC (t = 0)

Where VC (t=0) is the initial voltage on the capacitor. For proper integration, RC has to be much
greater than the time period of the input signal.

It can be seen that the gain of the integrator decreases with the increasing frequency so,
the integrator circuit does not have any high frequency problem unlike a differentiator circuit.
However, at low frequencies such as at dc, the gain becomes infinite. Hence the op-amp
saturates (ie., the capacitor is fully charged and it behaves like an open circuit). A practical
integrator circuit is shown in Fig. 2-2.

Fig. 2-2 Practical op-amp integrator


2.3.2 Differentiator
An op-amp differentiator simulates mathematical differentiation, which is a process of
determining the instantaneous rate of change of a function. Differentiator performs the reverse
of integration function. The output waveform is derivative of the input waveform. Here, the
input element is a capacitor and the feedback element is a resistor. An ideal differentiation is
shown in fig. 2-3.

Fig.2-3 Basic op-amp differentiator


The output voltage is given by
dVS
VO = − RC ( )
dt
For proper differentiation, RC has to be much smaller than the time period of the input signal.
It can be seen that at high frequencies a differentiator may become unstable and break into
oscillation. Also, the input impedance of the differentiator decreases with increase in
frequency, thereby making the circuit sensitive to high frequency noise. So, in order to limit
the gain of the differentiator at high frequencies, the input capacitor is connected in series with
a resistance R1 and hence avoiding high frequency noise and stability problems. A practical
differentiator circuit is shown in fig. 2-4.

Fig. 2-4 Practical op-amp differentiator


2.3.3. Design Constraints
Integrator circuit
• The output of the integrator cannot rise indefinitely as the output will be limited.
• The output of the op amp integrator will be limited by supply voltage.
• When designing one of these circuits, it may be necessary to limit the gain or increase the
supply voltage to accommodate the likely output voltage swings.
• While small input voltages and for short times may be acceptable, care must be taken
when designing circuits where the input voltages are maintained over longer periods of
time.

Differentiator circuit
• Output rises with frequency: One of the key facts of having a series capacitor is that
it has an increased frequency response at higher frequencies. The differentiator output
rises linearly with frequency, although at some stage the limitations of the op amp will
mean this does not hold good. Accordingly precautions may need to be made to account
for this. The circuit, for example will be very susceptible to high frequency noise, stray
pick-up, etc.
• Component value limits: It is always best to keep the values of the capacitor and
particularly the resistor within sensible limits. Often values of less than 100kΩ for the
resistor are best. In this way the input impedance of the op amp should have no effect on
the operation of the circuit.\

2.4 PRE LAB QUESTIONS


1. Determine the input and output impedances for each amplifier configuration, (Zin=10M,
ZO=75, AOL = 175,000) in fig.(a)

Fig. (a)
2. Determine the BW of each of the amplifiers in fig(b). The op-amps have an open-loop gain
of 90dB and a unity gain bound width of 2MHz.

Fig.(b)

3. Determine the output voltage of each amplifier in Fig (c).

Fig.(c)
2.5 EXPERIMENT
(1) Integrator
1.1 Assemble an integrator circuit with R=1K and C=0.1µf. Connect Rf of value 1M across
the capacitor.
1.2 Feed +1V, 500Hz square wave input.
1.3 Observe the input and output voltages on a CRO.
1.4 Determine the gain of the circuit and tabulate the readings in table. Model waveform is
shown.
1.5 Plot the input and output voltages on the same scale on a linear graph sheet.

(2) Differentiator
2.1 Assemble a differentiator circuit with R=10K and C=0.1µf. Connect a resistor R1 of
value 470 between the source and the capacitor.
2.2 Feed +1V, 500Hz square wave input.
2.3 Observe the input and output voltages on a CRO.
2.4 Determine the gain of the circuit and tabulate the readings in table. Model waveform is
shown.
2.5 Plot the input and output voltages on the same scale on a linear graph sheet.

op-amp Input signal Output signal


configuration /
Amplitude Frequency Amplitude Frequency
circuit
Integrator
Differentiator
a)

(b)

Fig.2.5 Waveform for (a) op-amp integrator, (b) op-amp differentiator

2.6 POST LAB QUESTIONS


1. Determine the gain-bandwidth product of each amplifier.
2. Determine the input and output impedances of each amplifier.
3. (a) What is the normal output voltage in fig. 2-14?
(b) What is the output voltage of R2 opens?
(c) What happens if R5 opens?

Fig. 2-14
3. RECTIFIERS
3.1 OBJECTIVE
a. To study the operation of active diode circuits (precisions circuits) using op-amps, such as
half wave rectifier and full wave rectifier

3.2 HARDWARE REQUIRED


S.No Equipment/Component name Specifications/Value Quantity

1 IC 741 Refer data sheet in 1


appendix

2 Cathode Ray Oscilloscope (0 – 20MHz) 1 1

3 Resistors 10 K Ω 6

4 Semiconductor(Diode) 1N4002 2

5 Dual Regulated power supply (0 -30V), 1A 1

6 Function Generator (0-2) MHz 1

7 ASLK PRO Kit Refer data sheet in 1


appendix

3.3 THEORY
The major limitation of ordinary diodes is that it cannot rectify voltage below 0.6v,
thecut in voltage of the diode. The precision rectifier, which is also known as a super diode,
is a configuration obtained with an operational amplifier in order to have a circuit behaving
like an ideal diode and rectifier. It can be useful for high-precision signal processing.

3.3.1 Active Half Wave Rectifier


Op-amps can enhance the performance of diode circuits. For one thing, the op-amp
can eliminate the effect of diode offset voltage, allowing us to rectify, peak-detect, clip, and
clamp low-level signals (those with amplitudes smaller than the offset voltage). And because
of their buffering action op-amps can eliminate the effects of source and load on diode circuits.
Circuits that combine op-amps and diodes are called active diode circuits. Fig. (a) shows an
active HWR, with gain.
Fig(a) Active HWR, (b) input and output waveforms

When the input signal goes positive, the op-amp goes positive and turns on the diode. The
circuit then acts as a conventional non-inverting amplifier, and the positive half-cycle appears
across the load resistor. On the other hand, when the input goes negative, the op-amp output
goes negative and turns off the diode. Since the diode is open, no voltage appears across the
load resistor. This is why the final output is almost a perfect half-wave signal.

The high gain of the op-amp virtually eliminates the effect of offset voltage. For
instance, if the offset voltage equals 0.7V and open-loop gain is 100,000, the input that just
turns on the diode is

0.7V
Vin 7 V.
100,000

When the input is greater than 7µV, the diode turns on and the circuit acts like a voltage
follower. The effect is equivalent to reducing the offset voltage by a factor of A.
The active HWR is useful with low-level signals. For instance, if we want to measure

sinusoidal voltages in the millivolt region, we can add a milli ammeter in series with RL with

the proper value of RL, we can calibrate the meter to indicate rms millivolts.
1.3.2 Design Constraints
• The output signal is limited by the IC's power sources: the output signal cannot be
greater than +15V
3.3.3 Experiment
1. Connect the circuit as shown in the figure. Consider all resistors value 10kΩ . Use
1N4002 diodes. Assemble the circuit.

2. Feed sinusoidal input of amplitude 200mVPP and frequency 100Hz. Using a CRO
observe the input and output voltages simultaneously. Determine the amplitude and
frequency of the output voltage.
3. Increase the frequency of the input signal till distortion appears in the output. Record this
frequency in the below table
4. Plot the input and output voltages on the same scale.

Particulars Amplitude Time period Frequency

Input Voltage

Output Voltage

3.3.4 Full Wave Rectifier


A Full Wave Rectifier is a circuit, which converts an ac voltage into a pulsating dc
voltage using both half cycles of the applied ac voltage. It uses two diodes of which one
conducts during one half cycle while the other conducts during the other half cycle of the
applied ac voltage.

During the positive half cycle of the input voltage, diode D1 becomes forward
biased and D2 becomes reverse biased. Hence D1 conducts and D2 remains OFF. The load

current flows through D1 and the voltage drop across RL will be equal to the input voltage.
During the negative half cycle of the input voltage, diode D1 becomes reverse biased and
D2 becomes forward biased. Hence D1 remains OFF and D2 conducts. The load current

flows through D2 and the voltage drop across RL will be equal to the input voltage.
Input waveform

Output waveform:

Fig (a) Full wave rectifier, (b) input and output waveforms
Experiment
1. Connect the circuit as shown in the figure. Consider all resistors value 10kΩ . Use 1N4002
diodes. Assemble the circuit.

2. Feed sinusoidal input of amplitude 200mVPP and frequency 100Hz.


3. Using a CRO observe the input and output voltages simultaneously. Determine the
amplitude and frequency of the output voltage. Increase the frequency of the input signal
till distortion appears in the output. Record this frequency in the below table.
4. Plot the input and output voltages on the same scale.
Particulars Amplitude Time period Frequency

Input Voltage

Output Voltage

3.4 PRE-LAB QUESTIONS


1. What is a precision diode
2. Give the uses of precision diode
3. Give some applications of precision diode
4. What are the major limitations of an ordinary diode?

5. For a precision HWR, draw the output waveform if Vin is a 300mV peak sine wave at
1 KHz.
3.5 POST LAB QUESTIONS
1. If the diode is reversed in half wave rectifier, what would the output voltage be?
2. Draw the equivalent circuit of a full wave rectifier for input voltage less than zero
volts(Vi<0)
3. Draw the circuit of a Clipper which will clip the input signal below a reference voltage.
4. What is Clamper circuit?

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