®

INA102

ABRIDGED DATA SHEET

For Complete Data Sheet
Call Fax Line 1-800-548-6133
Request Document Number 10523

Low Power
INSTRUMENTATION AMPLIFIER

FEATURES APPLICATIONS
● LOW QUIESCENT CURRENT: 750µA max ● AMPLIFICATION OF SIGNALS FROM
● INTERNAL GAINS: 1, 10, 100, 1000 SOURCES SUCH AS:
Strain Gages (Weigh Scale Applications)
● LOW GAIN DRIFT: 5ppm/°C max
Thermocouples
● HIGH CMR: 90dB min Bridge Transducers
● LOW OFFSET VOLTAGE DRIFT: ● REMOTE TRANSDUCER AMPLIFIER
2µV/°C max
● LOW-LEVEL SIGNAL AMPLIFIER
● LOW OFFSET VOLTAGE: 100µV max
● MEDICAL INSTRUMENTATION
● LOW NONLINEARITY: 0.01% max
● MULTICHANNEL SYSTEMS
● HIGH INPUT IMPEDANCE: 1010Ω
● BATTERY POWERED EQUIPMENT

DESCRIPTION
The INA102 is a high-accuracy monolithic instrumen- 1 16 12 9
tation amplifier designed for signal conditioning V+ V–
applications where low quiescent power is desired. 14 13
4.44kΩ A1 5pF
On-chip thin-film resistors provide excellent tempera- 2
ture and stability performance. State-of-the-art laser- 404Ω 20kΩ 20kΩ 20kΩ
trimming technology insures high gain accuracy and 3
common-mode rejection while avoiding expensive 40.04Ω
external components. These features make the INA102 4
5pF A3 11
ideally suited for battery-powered and high-volume 5 5pF
applications.
20kΩ 20kΩ 20kΩ
The INA102 is also convenient to use. A gain of 1, 10,
7 10
100, or 1000 may be selected by simply strapping the
appropriate pins together. A gain drift of 5ppm/°C in 6
A2
low gains can then be achieved without external 15 5pF
8
adjustment. When higher-than-specified CMR is
required, CMR can be trimmed using the pins pro-
vided. In addition, balanced filtering can be accom-
plished in the output stage.

International Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132

© 1985 Burr-Brown Corporation PDS-523G Printed in U.S.A. October, 1993

SPECIFICATIONS
ELECTRICAL
At TA = +25°C with ±15VDC power supply and in circuit of Figure 2, unless otherwise noted.

INA102AG INA102CG INA102KP/INA102AU

PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
GAIN
Range of Gain 1 1000 * * * * V/V
Gain Equation, External, ±20% G = 1 + (40k/RG)(1) * * V/V
Error, DC: G = 1 TA = +25°C 0.1 0.05 0.15 %
G = 10 TA = +25°C 0.1 0.05 0.35 %
G = 100 TA = +25°C 0.25 0.15 0.4 %
G = 1000 TA = +25°C 0.75 0.5 0.9 %
G=1 TA = TMIN to TMAX 0.16 0.08 0.21 %
G = 10 TA = TMIN to TMAX 0.19 0.11 0.44 %
G = 100 TA = TMIN to TMAX 0.37 0.21 0.52 %
G = 1000 TA = TMIN to TMAX 0.93 0.62 1.08 %
Gain Temp. Coefficient
G=1 10 5 * ppm/°C
G = 10 15 10 * ppm/°C
G = 100 20 15 * ppm/°C
G = 1000 30 20 * ppm/°C
Nonlinearity, DC
G=1 TA = +25°C 0.03 0.01 * % of FS
G = 10 TA = +25°C 0.03 0.01 * % of FS
G = 100 TA = +25°C 0.05 0.02 * % of FS
G = 1000 TA = +25°C 0.1 0.05 * % of FS
G=1 TA = TMIN to TMAX 0.045 0.015 * % of FS
G = 10 TA = TMIN to TMAX 0.045 0.015 * % of FS
G = 100 TA = TMIN to TMAX 0.075 0.03 * % of FS
G = 1000 TA = TMIN to TMAX 0.15 0.1 * % of FS

RATED OUTPUT
Voltage RL = 10kΩ ±(|VCC| – 2.5) * * V
Current ±1 * * mA
Short Circuit Current(2) 2 * * mA
Output Impedance, G = 1000 0.1 * * Ω

INPUT
OFFSET VOLTAGE
Initial Offset(3) TA = +25°C ±300 ±300/G ±100 ±200/G * µV
INA102AU ±500 ±300/G µV
vs Temperature ±5 ±10/G ±2 ±5/G * µV/°C
vs Supply ±40 ±50/G ±10 ±20/G * µV/V

vs Time ±(20 + 30/G) * * µV/mo

BIAS CURRENT
Initial Bias Current
(Each Input) TA = TMIN to TMAX 25 50 6 30 * * nA
vs Temperature ±0.1 * * nA/°C
vs Supply ±0.1 * * nA/V
Initial Offset Current TA = TMIN to TMAX ±2.5 ±15 ±2.5 ±10 * * nA
vs Temperature ±0.1 * * nA/°C
IMPEDANCE
Differential 1010 || 2 * * Ω || pF
Common-Mode 1010 || 2 * * Ω || pF
VOLTAGE RANGE
Range, Linear Response TA = TMIN to TMAX ±(|VCC| – 4.5) * * V
CMR With 1kΩ Source Imbalance
G=1 DC to 60Hz 80 94 90 * 75 * dB
G = 10 DC to 60Hz 80 100 90 * * * dB
G = 10 to 1000 DC to 60Hz 80 100 90 * * * dB
NOISE
Input Voltage Noise
fB = 0.01Hz to 10Hz 1 * * µVp-p
Density, G = 1000: fO = 10Hz 30 * * nV/√Hz
fO = 100Hz 25 * * nV/√Hz
fO = 1kHz 25 * * nV/√Hz
Input Current Noise
fB = 0.01Hz to 10Hz 25 * * pAp-p
Density: fO = 10Hz 0.3 * * pA/√Hz
fO = 100Hz 0.2 * * pA/√Hz
fO = 1kHz 0.15 * * pA/√Hz

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ELECTRICAL (CONT)
INA102AG INA102CG INA102KP/INA102AU
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
DYNAMIC RESPONSE
Small Signal,
±3dB Flatness VOUT = 0.1Vrms
G=1 300 * * kHz
G = 10 30 * * kHz
G = 100 3 * * kHz
G = 1000 0.3 * * kHz

Small Signal,
±1% Flatness VOUT = 0.1Vrms
G=1 30 * * kHz
G = 10 3 * * kHz
G = 100 0.3 * * kHz
G = 1000 0.03 * * kHz
Full Power, G = 1 to 100 VOUT = 10V, RL = 10kΩ 1.7 2.5 * * * * kHz
Slew Rate, G = 1 to 100 VOUT = 10V, RL = 10kΩ 0.1 0.15 * * * * V/µs
Settling Time RL = 10kΩ, CL = 100pF
0.1%: G = 1 10V Step 50 * * µs
G = 100 360 * * µs
G = 1000 3300 * * µs
0.01%: G = 1 10V Step 60 * * µs
G = 100 500 * * µs
G = 1000 4500 * * µs
POWER SUPPLY
Rated Voltage ±15 * * V
Voltage Range ±3.5 ±18 * * * * V
Quiescent Current VO = 0V,
TA = TMIN to TMAX ±500 ±750 * * * * µA

TEMPERATURE RANGE
Specification –25 +85 * * 0 +70 °C
INA102AU –25 +85 °C
Operation RL > 50kΩ(2) –25 +85 * * –25 +85 °C
Storage –65 +150 * * –55 +125 °C
*Specification same as for INA102AG.
NOTES: (1) The internal gain set resistors have an absolute tolerance of ±20%; however, their tracking is 50ppm/°C. RG will add to the gain error if gains other than
1, 10, 100, or 1000 are set externally. (2) At high temperature, output drive current is limited. An external buffer can be used if required. (3) Adjustable to zero.

PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS

Top View DIP/SOIC Supply ................................................................................................ ±18V
Input Voltage Range .......................................................................... ±VCC
Offset Adjust 1 16 Offset Adjust Operating Temperature Range ......................................... –25°C to +85°C
Storage Temperature Range: Ceramic .......................... –65°C to +150°C
x 10 Gain 2 15 +In
Plastic, SOIC .................. –55°C to +125°C
14 –In Lead Temperature (soldering, 10s) ............................................... +300°C
x 100 Gain 3
Output Short Circuit Duration ................................. Continuous to Ground
x 1000 Gain 4 13 Filter

x 1000 Gain Sense 5 12 +VCC

PACKAGE INFORMATION
Gain Sense 6 11 Output
PACKAGE DRAWING
7 10 Common PRODUCT PACKAGE NUMBER(1)
Gain Set
INA102AG 16-Pin Ceramic DIP 109
CMR Trim 8 9 –VCC
INA102CG 16-Pin Ceramic DIP 109
INA102KP 16-Pin Plastic DIP 180
INA102AU 16-Pin SOIC 211
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
ORDERING INFORMATION

PRODUCT PACKAGE TEMPERATURE RANGE

INA102AG 16-Pin Ceramic DIP –25°C to +85°C

INA102CG 16-Pin Ceramic DIP –25°C to +85°C
INA102KP 16-Pin Plastic DIP 0°C to +70°C
INA102AU 16-Pin Plastic SOIC –25°C to +85°C

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 PAD FUNCTION PAD FUNCTION
1 Offset Adjust 10* Common
2 X10 Gain 11 Output
3 X100 Gain 12 +VCC
4 X1000 Gain 13 Filter
5 X1000 Gain Sense 14 –In
6 Gain Sense 15 +In
7 Gain Set 16 Offset Adjust
8 CMR Trim 17 (A1 Output)
9 –VCC 18 (A2 Output)
* Glass covers upper one-third of this pad.
Substrate Bias: Electrically connected to –V supply.
NC: No Connection.

MECHANICAL INFORMATION
MILS (0.001") MILLIMETERS
Die Size 142 x 104 ±5 3.61 x 2.64 ±0.13
Die Thickness 20 ±3 0.51 ±0.08
Min. Pad Size 4x4 0.10 x 0.10
Backing Gold
INA102 DIE TOPOGRAPHY

TYPICAL PERFORMANCE CURVES

At +25°C and in circuit of Figure 2 unless otherwise noted.

COMMON-MODE REJECTION vs SOURCE IMBALANCE GAIN vs FREQUENCY

120 80
VOUT = 0.1Vrms
Common-Mode Rejection (dB)

G = 1000
G = 10 to 1000 60
100
G = 100
G=1
Gain (dB)

40
80
G = 10
20
R IMB
60 20Vp-p 10kΩ G=1 1% Error
0
5Hz

40 –20
100 1k 10k 100k 1M 10 100 1k 10k 100k 1M
Source Resistance Imbalance ( Ω ) Frequency (Hz)

COMMON-MODE REJECTION vs FREQUENCY WARM-UP DRIFT vs TIME

120 50
Change in Input Offset Voltage (mV)

G = 100
Common-Mode Rejection (dB)

G = 1000 40
100

30
G = 10
80
G=1 20

60
10
V IN = 20Vp-p
0 Ω Source Imbalance
40 0
1 10 100 1k 0 1 2 3 4 5
Frequency (Hz) Time (ms)

®
TYPICAL PERFORMANCE CURVES (CONT)
At +25°C and in circuit of Figure 2 unless otherwise noted.

QUIESCENT CURRENT vs SUPPLY STEP RESPONSE

1000 ±15
900
VO = 10V G=1 RL = 10k Ω
±10
800 (no load) CL = 1000pF
Quiescent Current (µA)

700 G = 1000
±5

Output Voltage (V)

600
500 0
400 VO = 0
–5
300
200
–10
100
0 –15
0 ±5 ±10 ±15 ±20 0 1 2 3 4 5 6 7 8
Supply Voltage (V) Time (ms)

SETTLING TIME vs GAIN PEAK-PEAK VOLTAGE NOISE vs GAIN

Total Input Preferred Noise Voltage (µVp-p)

10 1000
RL = 10k Ω Bandwidth = 1Hz to 1MHz
CL = 1000pF
500kΩ
500kΩ
Settling Time (ms)

1 100

RS = 1MΩ

RS = 100kΩ
0.01%
0.1 10 RS

1% RS = 0
0.1% See Applications Section
0.01 1
1 10 100 1000 1 10 100 1000
Gain (V/V) Gain (V/V)

INPUT NOISE VOLTAGE vs FREQUENCY POWER SUPPLY REJECTION vs FREQUENCY

1000 125
Power Supply Rejection (dB)
Input Noise Voltage (nV√Hz)

100
Gain = 1000

75
Gain = 100
100
G=1
50
G = 10
Gain = 10
G = 100, G = 1000 25
Gain = 1
10 0
1 10 100 1k 10k 1 10 100 1k 10k
Frequency (Hz) Frequency (Hz)

®
DISCUSSION OF impedance (1010Ω) desirable in instrumentation amplifier
applications. The offset voltage, and offset voltage versus
PERFORMANCE temperature, are low due to the monolithic design, and
improved even further by state-of-the-art laser-trimming
INSTRUMENTATION AMPLIFIERS
techniques.
Instrumentation amplifiers are differential-input closed-loop
gain blocks whose committed circuit accurately amplifies the The output stage (A3) is connected in a unity-gain differential
voltage applied to their inputs. They respond mainly to the amplifier configuration. A critical part of this stage is the
difference between the two input signals and exhibit ex- matching of the four 20kΩ resistors which provide the
tremely high input impedance, both differentially and com- difference function. These resistors must be initially well
mon-mode. The feedback networks of this instrumentation matched and the matching must be maintained over tempera-
amplifier are included on the monolithic chip. No external ture and time in order to retain good common-mode rejec-
resistors are required for gains of 1, 10, 100, and 1000 in the tion.
INA102. All of the internal resistors are made of thin-film nichrome
An operational amplifier, on the other hand, is an open-loop, on the integrated circuit. The critical resistors are laser-
uncommitted device that requires external networks to close trimmed to provide the desired high gain accuracy and
the loop. While op amps can be used to achieve the same common-mode rejection. Nichrome ensures long-term sta-
basic function as instrumentation amplifiers, it is very diffi- bility and provides excellent TCR and TCR tracking. This
cult to reach the same level of performance. Using op amps provides gain accuracy and common-mode rejection when
often leads to design tradeoffs when it is necessary to amplify the INA102 is operated over wide temperature ranges.
low-level signals in the presence of common-mode voltages
while maintaining high-input impedances. Figure 1 shows a USING THE INA102
simplified model of an instrumentation amplifier that elimi- Figure 2 shows the simplest configuration of the INA102.
nates most of the problems associated with op amps. The output voltage is a function of the differential input
voltage times the gain.
A gain of 1, 10, 100, or 1000 is selected by programming pins
eO = eA + eB 2 through 7 (see Table I). Notice that for the gain of 1000, a
eA = G (e2 – e1) = GeD special gain sense is provided to preserve accuracy. Al-
G (e2 + e1)/ 2 GeCM though this is not always required, gain errors caused by
eB = =
CMRR CMRR external resistance in series with the low value 40.04Ω
e2
internal gain set resistor are thus eliminated.

e CM
e d /2 ~ Z CM
GAIN CONNECT PINS
Zd Za e0
~ ~ ~ 1 6 to 7
ea eb 10 2 to 6 and 7
e d /2 ~ Z CM
100 3 to 6 and 7
1000 4 to 7 and separately 5 to 6
e1
TABLE I. Pin-Programmable Gain Connections.
GeCM
eO = G eD +
CMRR

Gain Set Gain = 1

15
+In
Gain set is pin-programmable for x1, x10, x100, x1000 in the INA102.
7
11 Output
FIGURE 1. Model of an Instrumentation Amplifier. 6 INA102

14 12
–In 10
THE INA102 e2

A simplified schematic of the INA102 is shown on the first ~ 9

10kΩ
–VCC +VCC
page. A three-amplifier configuration is used to provide the ~
desirable characteristics of a premium performance instru- 1µF 1µF
mentation amplifier. In addition, INA102 has features not Tantalum Tantalum

normally found in integrated circuit instrumentation amplifi-

ers.
The input buffers (A1 and A2) incorporate high performance,
low-drift amplifier circuitry. The amplifiers are connected in
the noninverting configuration to provide the high input FIGURE 2. Basic Circuit Connection for the INA102.

®
Other gains between 1 and 10, 10 and 100, and 100 and 1000 OPTIONAL FILTERING
can also be obtained by connecting an external resistor The INA102 has provisions for accomplishing filtering with
between pin 6 and either pin 2, 3, or 4, respectively (see one external capacitor between pins 11 and 13. This single-
Figure 6 for application). pole filter can be used to reduce noise outside the signal
G = 1 + (40/RG) where RG is the total resistance between the bandwidth, but with some degradation to AC CMR.
two inverting inputs of the input op amps. At high gains, When it is important to preserve CMR versus frequency
where the value of RG becomes small, additional resistance (especially at 60Hz), two capacitors should be used. The
(i.e., relays or sockets) in the RG circuit will contribute to a additional capacitor is connected between pins 8 and 10. This
gain error. Care should be taken to minimize this effect. will maintain a balance of impedances in the output stage.
Either of these capacitors could also be trimmed slightly, to
OPTIONAL OFFSET ADJUSTMENT PROCEDURE maximize CMR, if desired. Note that their ratio tracking will
It is sometimes desirable to null the input and/or output offset affect CMR over temperature.
to achieve higher accuracy. The quality of the potentiometer
will affect the results; therefore, choose one with good OPTIONAL COMMON-MODE REJECTION TRIM
temperature and mechanical-resistance stability. The INA102 is laser-adjusted during manufacturing to assure
The optional offset null capabilities are shown in Figure 3. R4 high CMR. However, if desired, a small resistance can be
adjustment affects only the input stage component of the added in series with pin 10 to trim the CMR to an improved
offset voltage. Note that the null condition will be disturbed level. Depending upon the nature of the internal imbalances,
when the gain is changed. Also, the input drift will be either positive or negative resistance value could be required.
affected by approximately 0.31µV/°C per 100µV of input The circuit shown in Figure 4 acts as a bipolar potentiometer
offset voltage that is trimmed. Therefore, care should be and allows easy adjustment of CMR.
taken when considering use of the control for removal of
other sources of offset. Output offset correction can be
accomplished with A1, R1, R2, and R3, by applying a voltage 15
to Common (pin 10) through a buffer amplifier. This buffer
INA102 1kΩ 1kΩ
limits the resistance in series with pin 10 to minimize CMR 14
error. Resistance above 0.1Ω will cause the common-mode
~ e CM 10
Common 20 Ω
rejection to fall below 100dB. Be certain to keep this resist-
ance low. OPA177 CMR
Adjust

–VCC
1kΩ
Input Offset Adjust 1kΩ
R4

1 ±15mV adjustment at the output.

100kΩ
16 Procedure:
1. Connect CMV to both inputs.
Output Offset 2. Adjust potentiometer for near zero at the output.
INA102 Adjust
+15VDC
R1 FIGURE 4. Optional Circuit for Externally Trimming CMR.
A1 R3
10
100kΩ
1MΩ
OPA27
–15VDC TYPICAL APPLICATIONS
R2 1kΩ Many applications of instrumentation amplifiers involve the
amplification of low-level differential signals from bridges
and transducers such as strain gages, thermocouples, and
RTDs. Some of the important parameters include common-
FIGURE 3. Optional Offset Nulling.
mode rejection (differential cancellation of common-mode
offset and noise, see Figure 1), input impedance, offset
It is important to not exceed the input amplifiers’ dynamic voltage and drift, gain accuracy, linearity, and noise. The
range. The amplified differential input signal and its associ- INA102 accomplishes all of these with high precision at
ated common-mode voltage should not cause the output of surprisingly low quiescent current. However, in higher gains
A1 or A2 to exceed approximately ±12V with ±15V supplies, (>100), the bias current can cause a large offset error at the
or nonlinear operation will result. To protect against mois- output. This can saturate the output unless the source imped-
ture, especially in high gain, sealing compound may be used. ance is separated, e.g., two 500kΩ paths instead of one 1MΩ
Current injected into the offset pins should be minimized. unbalanced input. Figures 5 through 16 show some typical
applications circuits.

®
 +15V +15V
V
15 12 Optional
+In
Offset Adjust
R 4 x1000 1 100kΩ
R

e2 Shield 16
Resistance 5
e1 11
Bridge INA102
6
R R
∆ e IN
7
10
e1 14
–In e OUT = 1000 (e 2 – e1 )
9
INA102 replaces classical three-op-amp
–15V
instrumentation amplifier.

FIGURE 5. Amplification of a Differential Voltage from a Resistance Bridge.

+15V

15 12
+In

Noise 3
(60Hz Hum) x100
Shield
RG
7 11
INA102
Transducer e OUT
or
6 10
Analog
Signal
14
–In 9
Transformer
Noise
(60Hz Hum) –15V
eOUT = G (∆eIN) RY ≈ 4.4kΩ, 404Ω, or 40Ω in gains Note: Gain drift will be higher than that
G = 1 + (40k/[RG + RY]) of 10, 100, or 1000 respectively. specified with internal resistors only.
RG = (40k – RY[G – 1])/(G – 1)

FIGURE 6. Amplification of a Transformer-Coupled Analog Signal Using External Gain Set.

K
+15VDC
Thermocouple

15 12 +15VDC
+In ISO +15VDC
G = 100 –15VDC
Supply
3 +15VDC
x10
Span
Adjust
7 11 VFC32/ HCPL-
100Ω INA102
320/62 2731
10kΩ Digital
IN914 Opto-
6 10 Coupler
–15VDC
14
–In +15VDC
9
Cold 4990Ω +15VDC
Junction 500Ω
–15VDC OPA27
Compensation 1MΩ 100kΩ
15kΩ Up-Scale Zero Adjust
+V OFFSETTING 1MΩ
Burn-Out
–15VDC Indication –15VDC –15VDC

FIGURE 7. Isolated Thermocouple Amplifier with Cold Junction Compensation.

®
 +15VDC
LA 15
+In 12 G = 1000
RA 4 x1000

5
11
∆ eIN = 1mVp-p INA102
6
e OUT = 1Vp-p
RL to isolation amplifier.
7 10

14 9
–In

–15VDC

FIGURE 8. ECG Amplifier or Recorder Preamp for Biological Signals.

+9V

G = 100

15 12
+In
3
x100 eOUT
7 11
∆ eIN 100kΩ INA102
6
14 10
–In
9 eOUT contains a midscale
100kΩ DC voltage of +4.5V.

FIGURE 9. Single Supply Low Power Instrumentation Amplifier.

Isolation
Barrier
15
+In Isolation
2
x10 Amplifier
3 ISO100
x1 x100
4 11 3650
∆ eIN x1000 INA102
7 or eOUT
6 9 3656 * * Does not require
14 –In external isolation
10
power supply.
Bias Current 12
Return Resistor 1MΩ

–15VDC
+15VDC

–15VDC

+15VDC

–15VDC
Input Common

Output Common

722
Isolation
Power
Note that x1000 gain sense has not Supply
been used to facilitate simple switching.

FIGURE 10. Precision Isolated Instrumentation Amplifier.

®
 e6 INA102
Channel
Select
e5 INA102
Control
Gain
Logic
Select
e4 IN7
INA102
IN6 CP
IN5 CE
IN4
e3 INA102
IN3 PGA100
IN2
eOUT
VREF IN1
e2 INA102
* IN0

e1 INA102

* As shown channels 0 and 1 may be used for auto offset zeroing, and gain calibration respectively.

FIGURE 11. Multiple Channel Precision Instrumentation Amplifier with Programmable Gain.

+24V 20

I O (mA)
+10VREF
16
2N3055
15 15 16
3 12 12 1 4
7 11 4 13 G S –40 0 40
300Ω INA102 XTR110
6 +2V to +10V 3 14 VIN (mV)
14 10 5
±40mV 2
9 +24V 9 D
40kΩ 10
4mA to 20mA RL VL
OPA27
+6V

60kΩ

G = 100

FIGURE 12. 4mA to 20mA Bridge Transmitter Using Single Supply Instrumentation Amplifier.

+15V +15V +15V

12 16
10kΩ D
15 G=1 G = 1, 10, 100
+In
D 6
7
+15V 11 7 15
∆e IN 6 INA102 PGA102 e OUT
–15V 8 5
4
10kΩ D 10
14 3
–In 2
1
D 9 13

–15V –15V –15V

x10 x100
Input Protection: D = FDH300 (Low Leakage) Gain Select

FIGURE 13. Programmable-Gain Instrumentation Amplifier Using the INA102 and PGA102.

®
 e IN
15 +15V

4
x1000
12
5
11
V1 INA102
6
e OUT

7 9

14
10
–15V

Ground Resistance

FIGURE 14. Ground Resistance Loop Eliminator (INA102 senses and amplifies V1 accurately).

+15V

12
15
+In
3
x 100
7 11
∆ e IN INA102
6
10
14
–In
9

–15V
∆ e OUT
+15V

12
15
+In
3
x 100
7 11
INA102
6
10
14
–In
9

Overall Gain = ∆eOUT/∆eIN = 200

–15V

FIGURE 15. Differential Input/Differential Output Amplifier (twice the gain of one INA).

®
 +15V

11
S1 12
15
16 1 +In
3
x 100 S2
1/2 7 11 9 8
∆ e IN DG5043CJ INA102
6 1/2
S3 10 0.1µF
3 4 14 DG5043CJ
–In
S4 e OUT
15 13 14 9 1kΩ 5 6
Reference
10

–15V OPA111
or OPA121 +15V
11
DG5040CJ
S5
16 1

15 13 14
200µs
Control
–15V

CONTROL S1 S2 S3 S4 S5 MODE
All switches shown in
Logic “0” switch state. 1 Closed Closed Open Open Closed Signal Amplification
0 Open Open Closed Closed Open Auto-Zeroing

FIGURE 16. Auto-Zeroing Instrumentation Amplifier Circuit.

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.

®
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