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Birla Institute of Technology and Science, Pilani: Pilani Campus AUGS/ AGSR Division

This document provides information about the Computer Architecture course CS F342 offered at BIRLA INSTITUTE OF TECHNOLOGY AND SCIENCE, Pilani. The course aims to introduce computer architecture concepts and design trends. Students will learn architectural techniques, analyze performance metrics, and design associated computer systems. Topics will include MIPS architecture, computer arithmetic, floating point arithmetic, memory organization, cache memory, pipelining, and hazards. Students will be evaluated through a mid-semester test, lab assignments, and a comprehensive final examination.

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Sharan Thummala
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146 views3 pages

Birla Institute of Technology and Science, Pilani: Pilani Campus AUGS/ AGSR Division

This document provides information about the Computer Architecture course CS F342 offered at BIRLA INSTITUTE OF TECHNOLOGY AND SCIENCE, Pilani. The course aims to introduce computer architecture concepts and design trends. Students will learn architectural techniques, analyze performance metrics, and design associated computer systems. Topics will include MIPS architecture, computer arithmetic, floating point arithmetic, memory organization, cache memory, pipelining, and hazards. Students will be evaluated through a mid-semester test, lab assignments, and a comprehensive final examination.

Uploaded by

Sharan Thummala
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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BIRLA INSTITUTE OF TECHNOLOGY AND SCIENCE, Pilani

Pilani Campus
AUGS/ AGSR Division

SECOND SEMESTER 2019-20


COURSE HANDOUT
Date: 06.01.2020
Course No : CS F342

Course Title : Computer Architecture

Instructors incharge : S Gurunarayanan

Instructors (Lab) : Abheek Gupta, Kanika

1. Scope and Objective:

This course aims at introducing the concept of computer architecture and organization. It involves design aspects, and
deals with the current trends in computing architecture. System resources such as memory technology and I/O
subsystems needed to achieve proportional increase in performance will also be discussed.

2. Learning outcomes:

 Understand various architectural techniques used in implementation of complex logic functions


 Apply these techniques in building different computing architectures
 Analyze different performance metrics of different computing architectures
 Design associated systems resources to achieve proportional increase in performance.

3. Text Book:

(T1) Patterson, David A & J L Hennessy, Computer Organization& Design, Elsevier, 5th Ed., 2017.

(T2) Samir Palnitkar, Verilog HDL: A Guide to Digital Design and Synthesis, Pearson Education Asia, 2nd Ed. 2006.
4. Reference Books:

(i) J.L. Hennessy & D.A. Patterson, Computer Architecture: A Quantitative Approach, Morgan Kauffmann, 6th Ed,
2019.
5. Course Plan:

Lecture No. Topics to be covered Reference to T1

01 Introduction Ch. 1.1-1.3.

02 Introduction to Performance metrics of Ch. 1.5-1.10

computing architectures

03, 04, 05 MIPS Architecture & Instruction Set Ch. 2

Overview of different classes and formats


of MIPS instruction set

1
BIRLA INSTITUTE OF TECHNOLOGY AND SCIENCE, Pilani
Pilani Campus
AUGS/ AGSR Division

06 Computer Arithmetic: Building hardware Ch. 3.1 – 3.5


structures

07,08 Floating Point Arithmetic: Hardware Ch 3.6 – 3.10


Architectures

09, 10 Role of Performance Ch. 1.4

11,12, 13 Data path Design: Building using Ch. 4.1 – 4.4


functional blocks

14, 15 Control Hardware: FSM based Design Appendix – D

16, 17, 18 Exceptions & Microprogramming Ch. 4.9

19 Memory organization- Introduction Ch5.1

20, 21 Cache Memory Organization: Mapping Ch.5.2


Schemes

22, 23, 24 Cache Performance Ch. 5.3

25, 26 I/O Organization Ch. 6

27, 28 Pipelining – Design Issues Ch. 4.5 – 4.6

29, 30 Data Hazards Ch. 4.7

31, 32 Control Hazards Ch. 4.8

33, 34 Static Branch Prediction notes

35.36 Dynamic Branch Prediction notes

37-40 Advanced Concepts in pipelining Ch. 4.12

6. Evaluation Scheme:

EC Evaluation Duration Maximum


No. Component (Min) marks Date & Time Remarks

1 Mid Semester Test 90 60 4/3 ; 9:00 - 10:30 Closed Book


AM

2 Lab/Assignments ** ----- 60 Will be announced Open Book

2
BIRLA INSTITUTE OF TECHNOLOGY AND SCIENCE, Pilani
Pilani Campus
AUGS/ AGSR Division

3 Comprehensive 180 80 6/5 FN Part A:CB


examination
Part B:OB

** Details will be announced in the class & on course web page.

Text book T2 will be used for Lab Assignments.

7. Chamber Consultation Hours: Mon 4PM to 5 PM

8. Notices: Notices regarding the course will be put up on the EEE notice board.

Instructor - in - charge

CS F342

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