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Latches: LCST - Logic Circuits and Switching Theory

The document discusses different types of latches including the S-R latch, gated S-R latch, and gated D latch. Latches are bistable devices that can reside in one of two states and are different from flip-flops in how their state is changed. The latches can be implemented using logic gates or programmed in a programmable logic device using VHDL.
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0% found this document useful (0 votes)
59 views18 pages

Latches: LCST - Logic Circuits and Switching Theory

The document discusses different types of latches including the S-R latch, gated S-R latch, and gated D latch. Latches are bistable devices that can reside in one of two states and are different from flip-flops in how their state is changed. The latches can be implemented using logic gates or programmed in a programmable logic device using VHDL.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Latches

Module 50

LCST – Logic Circuits and Switching


th
Theory
Source: Digital Fundamentals by Floyd, T. 11 Edition

Module 50 - Latches 1
Prepared by: fscjr.
Introduction
 The latch is a type of temporary storage device that has two
stable states (bistable) and is normally placed in a category
separate from that of flip-flops.

 Latches are similar to flip-flops because they are bistable


devices that can reside in either of two states using a feedback
arrangement, in which the outputs are connected back to the
opposite inputs.

 The main difference between latches and flip-flops is in the


method used for changing their state.

Module 50 - Latches 2
Prepared by: fscjr.
Learning Objectives
 After completing this module, the learners
should be able to:

1. Explain the operation of a basic S-R latch

2. Explain the operation of a gated S-R latch

3. Explain the operation of a gated D latch

4. Implement an S-R or D latch with logic gates

5. Describe the 74HC279A and 74HC75 quad latches

Module 50 - Latches 3
Prepared by: fscjr.
The S-R (SET-RESET) Latch

 A latch is a type of bistable logic device or multivibrator.

 In normal operation, the outputs of a latch are always


complements of each other.

 SET means that the Q output is HIGH. RESET means that the Q
output is LOW.

Module 50 - Latches 4
Prepared by: fscjr.
The S-R (SET-RESET) Latch cont’d

Module 50 - Latches 5
Prepared by: fscjr.
The S-R (SET-RESET) Latch cont’d

Module 50 - Latches 6
Prepared by: fscjr.
The S-R (SET-RESET) Latch cont’d

Module 50 - Latches 7
Prepared by: fscjr.
An Application

 The Latch as a Contact-Bounce Eliminator

Module 50 - Latches 8
Prepared by: fscjr.
IMPLEMENTATION: S’-R’ LATCH cont’d

 Fixed-Function Device

Module 50 - Latches 9
Prepared by: fscjr.
IMPLEMENTATION: S’-R’ LATCH

 Programmable Logic Device (PLD)

 An S’-R’ latch can be described using VHDL and implemented as


hardware in a PLD.

 VHDL statements and keywords not used in previous chapters


are introduced in this chapter.

 These are library, use, std_logic, all, and inout.

Module 50 - Latches 10
Prepared by: fscjr.
IMPLEMENTATION: S’-R’ LATCH cont’d

 Programmable Logic Device (PLD)

Module 50 - Latches 11
Prepared by: fscjr.
The Gated S-R Latch

 A gated latch requires an enable input, EN (G is also used to


designate an enable input).

Module 50 - Latches 12
Prepared by: fscjr.
The Gated S-R Latch cont’d

Module 50 - Latches 13
Prepared by: fscjr.
The Gated D Latch

 Another type of gated latch is called the D latch. It differs from


the S-R latch because it has only one input in addition to EN.
This input is called the D (data) input.

Module 50 - Latches 14
Prepared by: fscjr.
The Gated D Latch cont’d

Module 50 - Latches 15
Prepared by: fscjr.
IMPLEMENTATION: GATED D LATCH

 Fixed-Function Device

Module 50 - Latches 16
Prepared by: fscjr.
IMPLEMENTATION: GATED D LATCH cont’d

 Programmable Logic Device (PLD)

 The gated D latch can be described using VHDL and


implemented as hardware in a PLD.

Module 50 - Latches 17
Prepared by: fscjr.
Mastery Exercises cont’d

S-R, gated S-R, and gated D.

SR = 00, NC
SR = 01, Q=0
SR = 10, Q=1
SR = 11, invalid

Q=1

18

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