ASM 8085 Cheat Sheet

by Deathtitan77 (Deathtitan77) via cheatography.com/122246/cs/22644/

Registers Flag Registers (cont) Memory Registers (cont) Addressing Modes

A (Accum​​ul​ator) Z (Zero Flag) PSW (Program Status Word) Direct Addressing

After performing arithm​etical If an operation performed in It combines the Accumu​lator In this addressing mode, the
or logical operat​ions, the A results 0 value of entire 8- register with all the flag address of the operand (data)
result is stored here bits then zero flag is set, else registers in a 16-bit format is given in the instru​ction
it resets. itself.
BC Note: A stack is nothing but a
Genera​l-p​urpose register that AC (Auxiliary Carry Flag) portion of RAM (Random access Register Addressing
is capable of storing 16-bit If an operation performed in memory). In register addressing mode,
data (B - 8-bit) (C - 8-bit) A generates the carry from Each time when the data is the operand is in one of the
lower nibble (D0 to D3) to loaded into stack, Stack pointer general purpose registers.
DE
upper nibble (D4 to D7) AC gets decrem​ented. The opcode specifies the
Genera​l-p​urpose register that
flag is set, else it resets. Conversely it is increm​ented address of the regist​er(s) in
is capable of storing 16-bit
when data is retrieved from addition to the operation to be
data (D - 8-bit) (E - 8-bit) P (Parity Flag)
stack. performed.
If the result contains even no.
HL A stack is treated as a 16-bit
of ones this flag is set and for Register Indirect Addressing
Usually used to store a entry and it consumes 2
odd no. of ones this flag is In Register Indirect mode of
memory address Ex. (00 - H) locations from a memory for 1
reset. addres​sing, the address of
(36 - L). It also creates a entry.
the operand is specified by a
hypoth​etical register labeled CY (Carry Flag) A stack requires a 16-bit register
register pair.
as 'M' If an operation performed in to be pointed to.
A generates the carry from Immediate Addressing
Note: The general purpose
D7 to next stage then CY flag Machine Cycles In this addressing mode, the
registers in 8085 processors are
is set, else it is reset. Opcode Fetch Machine Cycle operand is specified within
B, C, D, E, H and L.
the instru​ction itself.
Each register can hold 8-bit Note – The Auxiliary Carry flag 4T or 6T
data. register in 8085 is the only flag Implicit Addressing
Memory Read Machine Cycle
They can work in pairs such as not accessible by the user. There are certain instru​ctions
3T
B-C, D-E and H-L to store 16-bit which operate on the content
data. Memory Registers Memory Write Machine Cycle
of the accumu​lator. Such
The H-L pair works as a 3T instru​ctions do not require the
PC (Program Counter)
memory pointer. address of the operand.
Stores the address of the I/O Read Machine Cycle
next instru​ction to be 3T Examples:
Flag Registers
executed. 1. Direct Addres​sing:
I/O Write Machine Cycle
S (Sign Flag) STA 2400H
SP (Stack Pointer) 3T
If MSB bit = 0 then the 2. Register Addres​sing:
Stack pointer maintains the
number is positive, else it is Most of the time, it's just 4T for MOV A, B
address of the last byte that
negative. the Opcode Fetch, there are 3. Register Indirect Addressing
is entered into stack.
only a few commands that LXI H, 2500 H
require 6T MOV A, M
4. Immediate Addressing
LXI H, 2500
5. Implicit Addressing
CMA, RAL, RAR, etc.

By Deathtitan77 Published 6th May, 2020. Sponsored by CrosswordCheats.com

(Deathtitan77) Last updated 13th May, 2020. Learn to solve cryptic crosswords!
Page 1 of 1. http://crosswordcheats.com

cheatography.com/deathtitan77/