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Application Note AFD006 Registered

R/2R LADDER NETWORKS

361-992-7900
361-992-7900

Written By Jerry Seams References:

Copyright 1998 IRC R/2R Data Sheet
International Resistive Company, Inc. IRC QS009 Data Sheet
Advanced Film Division
Telephone: 512/985-3132
361-985-3132
Email: seamsj@irctt.com
jerry.seams@irctt.com

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APPLICATION NOTE IRC/AFD006
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R/2R Ladder Networks

V out
Issue
R/2R ladder networks provide a simple means to
convert digital information to an analog output. 2 N -1 R 4R 2R R
Although simple in design and function, applying
an R/2R resistor network to a real application Bit N B it 3 B it 2 B it 1
requires attention to how the device is specified. LS B M SB
Output errors due to resistor tolerances are of-
ten overlooked in the design of the digital to ana- Figure 2. Binary Weighted Ladder
log conversion (DAC) circuit and in the selection
of the R/2R ladder itself. This application note
identifies these issues, provides methods for cal-
The binary weighted ladder shown in Figure 2
culating R/2R resolution and accuracy and a
requires double multiples of R as the number of
means to better specify R/2R ladder networks.
bits increase. As the ratios of the resistors be-
come more and more obtuse in a binary weighted
Background network, the ability to trim the resistors to ac-
Resistor ladder networks provide a simple, inex- curate ratio tolerances becomes diminished.
pensive way to perform digital to analog conver- More accurate ratios can be obtained in a resis-
sion (DAC). The most popular networks are the tor network with consistent, similar values as
binary weighted ladder and the R/2R ladder. Both in the R/2R network. The R/2R network pro-
devices will convert digital voltage information to vides the most accurate method of digital to ana-
analog, but the R/2R ladder has become the most log conversion.
popular due to the network’s inherent accuracy
superiority and ease of manufacture.
Discussion
Figure 1 is a diagram of the basic R/2R ladder
network with N bits. The “ladder” portrayal comes R/2R Function
from the ladder-like topology of the network. Note Let’s take a look at how an R/2R ladder works.
that the network consists of only two resistor Term. is the termination resistor and is con-
values; R and 2R (twice the value of R) no matter nected to ground. The termination resistor as-
how many bits make up the ladder. The particu- sures that the Thevenin resistance of the net-
lar value of R is not critical to the function of the work as measured to ground looking toward the
R/2R ladder. LSB (with all bits grounded) is R as shown in
Figure 3. The Thevenin resistance of an R/2R
ladder is always R – regardless of the number of
bits in the ladder.

T erm .

2R
R R R R
Vo u t

2R 2R 2R 2R 2R

Bit N B it N -1 B it 3 B it 2 B it 1
LSB M SB

Figure 1. R/2R Ladder of N Bits

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R thevenin = R R thevenin = R R thevenin = R R thevenin = R R thevenin= R

R R R R
V out

2R
2R 2R 2R 2R 2R
(T e rm .)
B it N B it N -1 B it 2 B it 1 B it 0

Figure 3. Thevenin Resistance

Digital information is presented to the ladder as effect of individual bit locations to the Nth bit.
individual bits of a digital word switched between Notice that since bit 1 has the greatest effect on
a reference voltage (Vr) and ground (Figure 4). the output voltage it is designated the Most Sig-
nificant Bit.
Depending on the number and location of
the bits switched to Vr or ground, Vout will Bit # Vout
Since an R/2R ladder is a linear circuit, we
vary between 0 volts and Vr. If all inputs can apply the principle of superposition to
1 MSB Vr/2
are connected to ground, 0 volts is produced calculate Vout. The expected output volt-
at the output, if all inputs are connected to 2 Vr/4 age is calculated by summing the effect of
Vr, the output voltage approaches Vr, and 3 Vr/8
all bits connected to Vr. For example, if bits
if some inputs are connected to ground and 1 and 3 are connected to Vr with all other
4 Vr/16
some to Vr then an output voltage between inputs grounded, the output voltage is cal-
0 volts and Vr occurs. These inputs (also 5 Vr/32 culated by:
called bits in the digital lingo) range from 6 Vr/64
the Most Significant Bit to the Least Sig- Vout = (Vr/2)+(Vr/8)
7 Vr/128
nificant Bit. As the names indicate, the
MSB, when activated, causes the greatest 8 Vr/256 which reduces to
change in the output voltage and the LSB, 9 Vr/512
when activated, will cause the smallest Vout = 5Vr/8.
10 Vr/1024
change in the output voltage. If we label
the bits (or inputs) bit 1 to bit N the output 11 Vr/2048 The R/2R ladder is a binary circuit. The
voltage caused by connecting a particular 12 Vr/4096 effect of each successive bit approaching the
bit to Vr with all other bits grounded is: LSB is 1/2 of the previous bit. If this se-
N LSB Vr/2N
quence is extended to a ladder of infinite
Vout = Vr/2 N
bits, the effect of the LSB on Vout ap-
proaches 0. Conversely, the full-scale output of
where N is the bit number. For bit 1, Vout =Vr/2, the network (with all bits connected to Vr) ap-
for bit 2, Vout = Vr/4 etc. The table shows the proaches Vr as shown in equation (1).

T e rm .

2R
R R R R
V ou t

2R 2R 2R 2R 2R
B it N B it 1
B it N -1 B it 3 B it 2
LS B MSB

Vr

Figure 4. R/2R Ladder of N Bits

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lim it (V r) 3
N
_1 = V r (1 )
the least significant bit. For a 10bit R/2R there
are 2N or or 1024 possible binary combinations at
N 64 2i the inputs. The resolution of the network is
i=1 1/1024 or .0009766. A change in state at the
LSB input should change the output of the ladder
The full-scale output is less than Vr for all practi- by .09766% of the full scale output voltage.
cal R/2R ladders, and for low pin count devices
the full-scale output voltage can be significantly The output accuracy of the R/2R ladder is typi-
below the value of Vr. Equation (2) can be used to cally specified in terms of full-scale output
calculate the full-scale output of an R/2R ladder ± some number of least significant bits. R/2R lad-
of N bits. ders are usually specified with output accuracies
of ±1 LSB or ±1/2 LSB. For example, a ±1/2 LSB
specification on a 10 bit ladder is exactly the same
F u ll S c a le = (V r) 3
N
_1 (2 )
as ±0.04883% full-scale accuracy.
O u tp u t Vo lta g e 2i
i-1
R/2R Ladders are
usually specified with
output accuracies of ±1
An R/2R ladder of 4 bits would have a full-scale or ±½ LSB.
output voltage of 1/2 +1/4 + 1/8 + 1/16 =
15Vr/16 or 0.9375 volts (if Vr=1 volt) while a 10
bit R/2R ladder would have a full-scale output
voltage of 0.99902 (if Vr=1 volt).
The ladder function is not affected by the value of
R (within normal resistance ranges). This would
Resolution and Accuracy indicate that the absolute tolerances of the resis-
The number of inputs or bits determines the reso- tors making up the ladder are of minimal impor-
lution of an R/2R ladder. Since there are two pos- tance. Then what controls the accuracy of the
sible states at each input, ground or Vr, (also des- ladder output?
ignated as “0” or “1” in digital lingo for positive
logic) there are 2N combinations of Vr and ground The ladder operates as an array of voltage divid-
to the inputs of an R/2R ladder. The resolution of ers whose output accuracies are solely dependent
the ladder is the smallest possible output change on how well each resistor is matched to the oth-
for any input change to the ladder and is given by ers. Ideally, resistors within the ladder are
1/2N where N is the number of bits. This is the matched so that the voltage ratio for a given bit is
output change that would occur for a change in exactly half of that for the preceding bit.

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Term.

2R
R R R R
V ou t

2R -R sw 2R -R sw 2R -R sw 2R -R sw 2R -R sw

R sw R sw R sw R sw R sw

Vr
Figure 5. R/2R Ladder with Switch Compensation

Resistors constructed in network form, on the equipment, 2R legs of the ladder can be individu-
same substrate, which are deposited and pro- ally trimmed, even if the swich resistances are dif-
cessed together, have very similar electrical char- ferent for each leg! This allows the DAC circuit
acteristics. R/2R ladders manufactured as thin designer a means to create a much more accurate
film, monolithic networks have an inherent accu- functional circuit.
racy advantage over discrete solutions because of
the tight ratio tolerances and nearly identical re-
sistor characteristics achieved.
Summary:
When specifying an R/2R ladder, consideration
Consider an 8-bit ladder specified so that there is must be given to the accuracy of the ladder out-
solely a ±1.0% absolute tolerance on the resistors. put as well as the resolution of the ladder in bits.
The full resolution of the ladder may not be real- Both the ratio tolerances of the individual resis-
ized. Ratios within the network could be as poor tors within the ladder and the resistance of the
as almost ±2.0% yielding a ladder, which, although switches used at the ladder inputs can affect DAC
manufactured with 8 bits, may only provide output accuracy. R/2R ladders have inherent ac-
accurate outputs to the 6th or 7th bit. Adding an curacy advantages over other digital to analog con-
accuracy specification in terms of ±1 or ±1/2 LSB version circuits such as binary weighted ladders.
would ensure 8-bit performance. Thin film monolithic R/2R networks are intrinsi-
cally superior to discrete R/2R solutions due to
the tight ratio tolerances that can be achieved with
Switch Resistance resistors on the same substrate. IRC offers R/2R
networks in several different bit counts and pack-
R/2R inputs are switched between ground and Vr
ages.
in order to create the digital word that is converted
to an analog voltage output. In real applications,
these switches (usually solid state) carry some Solutions:
nominal resistance as shown in Figure 5. Actual IRC offers monolithic R/2R ladders in 8 bit, 10 bit
switch resistances can be as high as 50 ohms in and 12 bit resolution in 16 pin SOIC, 20 pin QSOP
some CMOS devices. Since the switch is connected and 20 pin DIP packages. Other packages, bit
in series to the 2R resistor, the switch resistance counts and schematics are available upon request.
(Rsw) affects the value of the 2R leg of the circuit
and thus, the output accuracy of the ladder. The For more information on ceramic or silicon based
2R legs of the ladder can be adjusted during the devices or to discuss your particular application,
manufacturing process to compensate for the ef- check out the IRC web site at www.irctt.com or
fect of Rsw. Using highly automated laser trim contact the factory at 512-992-7900.
361-992-7900.

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