PH 210 Electronics Laboratory I

Instruction Manual

Index
Page No

Experiment 1 Transistor characteristics - BJT and JFET 4

Experiment 2 Common Emitter (CE) Amplifier 5

Experiment 3 Common Base (CB) Amplifier 6

Experiment 4 Multistage amplifier: Cascade of two CE stages 7

Experiment 5 Push pull amplifier 8

Experiment 6 OP Amp & Feed back circuits 9

Experiment 7 Filters 11

Experiment 8 Multivibrators 13

Experiment 9 Unregulated and Regulated Power Supply 15

Experiment 10 Modulations 20

DEPARTMENT OF PHYSICS
INDIAN INSTITUTE OF TECHNOLOGY, GUWAHATI
January-July 2008
General Instructions to Students

1. On the very first day of the lab familiarize yourself with the power supply, function
generator, oscilloscope, bread board, and digital multimeter (DMM). You may request for
the copies of respective manual. You may also request the Teaching Assistant or the
instructor to guide you in learning these basic operations.

2. With the help of DMM learn to check the diode and transistors and to measure the value of
resistance.

3. The instruction manual provides the necessary information to perform the experiments.
However alternate circuits exist for most cases and students are encouraged to try out
circuits other than given in this manual (with prior permission from the instructor). The
procedure given is brief. Instructions given in italics are for self-study. Do try them if you
want proficiency in electronic circuitry.

4. Before attending the lab read the instruction manual THOROUGHLY and
CAREFULLY for analyzing the circuits to be used. You should consult any of the good text
or reference books on the subject in advance. This will help you to have tentative estimates
of the voltages and currents you are going to handle and enable you to set the measuring
instrument without trouble.

5. Derive the relevant formula or workout the relevant waveforms expected from the
experiment.

6. You should bring with you sufficient number of A4 size white papers, graph sheets, tracing
paper, for compiling the report and other stationery items required for data recording and
analyses.

7. The format of the report should be:

(a) Name Roll No. Date of Experiment

(b) Experiment title:
(c) Objective/Aim:
(d) Formulas, if any, with brief description
(e) Equivalent Circuit(s) if necessary
(f) Expected waveform as a function of input if applicable
(g) Observation Table(s)
(h) Input/Output waveform traces wherever necessary
(i) Graph(s) with proper labeling
(j) Calculations, if any
(k) Summary of results
(l) Brief discussion of results
(m) Suggestion(s) / New circuit idea pertaining to the experiment / Specific precautions

8. You are expected to come prepared with points (a) to (f) of above and get it signed by the
instructor before starting the experiment. Five marks are reserved for the same.

9. You have to complete the report and submit in your FOLDER FILE on the scheduled date of
experiment

10. Observations should be signed by either TA or the instructor available

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11. The performance in this course will be evaluated on the basis of DAY-to-DAY lab
activities, a theory exam / Quiz, and the final end-semester exam. (40 Marks are for lab
reports, 10 marks for Viva, 20 marks for theory exam/Quiz and 30 marks for the end-
semester exam).

12. Any kind of feedback on the improvement of this course is always welcome.

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 1. Transistor Characteristics - BJT and JFET

Aim:
1. To study the input and output characteristics of NPN/PNP transistor in common emitter
configuration and to learn the use of characteristic curves for graphical analysis of an
amplifier by drawing load line and finding Q point.
2. To obtained the drain characteristics of a JFET and draw the load line.

mA RC
1k

RB uA
470k
+
VCC
+
VBB

Fig. 1.1 Common Emitter Configuration

mA

G 1k
S
100k

VDS +
VGS VDD
VGG
+

Fig: 1.2 JFET – circuit for drain characteristics

Procedure:

1. Make the common emitter (CE) circuit as shown in Fig. 1.1. Measure the output
characteristics i.e. IC versus V for different values of base currents IB = 0, 0.1, 0.2 mA. Do not
CE

exceed VCE beyond 10V. Similarly measure the input characteristic IB versus VBE for VCE =0, 0.3,
0.6 and 0.9V. Plot the input and output characteristic curves for CE configurations. From the
plots determine the current gain β. Draw the static load line and determine the Q point. Obtain
transfer characteristics ie., IB vs. IC and determine current gain .

2. To study the I-V characterization of the JFET, make the circuit as shown in Fig.1.2. Initially
set VGS to zero, by shorting the gate-to-source terminals or by setting VGG=0. By varying the
bias voltage VDD from 0 to 15V in steps, measure the drain current I D as a function of the voltage
drop across drain to source, VDS. Repeat the above ID versus VDS measurements for different
values of VGS namely VGS = + 0.5, -0.5, -1, -1.5, -2.0 (negative sign implies the reverse biasing
of gate terminal). Plot ID versus VDS for different values of VGS. Determine the pinch-off
voltage from the plots and the safe limit of VDS.

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 Single Stage Amplifier

The objectives of this experiment are to observe the operating characteristics of the two
fundamental single –stage amplifiers: (a) common emitter (CE) and (b) common-base (CB)
configuration and to learn how it can be used for small signal amplification. A properly biased
BJT amplifier circuit has been provided. Two amplifier stages can be achieved by injecting a
signal into one terminal and extracting a signal from another.

Experiment 2. Common Emitter (CE) Amplifier:

Aim: To (i) calculate Gain of the amplifier (ii) find out the clipping voltages for positive and
negative polarity peaks of the output signal, (iii) study the frequency response to calculate
bandwidth for sinusoidal, square and triangular waves, (iv) compare the input and output
frequency spectrum.
Vcc
15V

R1 RC
470k 4.7k C2
22uF
C +
C1
22uF
+
B Q1
V1 2N2222
-20m/20mV RL
4.7k
E
R2 RE
1kHz 33k 220

Fig. 2.1. CE Amplifier

Procedure:

1. Connect the input sinusoidal signal at point B as shown in Fig. 2.1 using DC blocking
capacitor. Connect load resistance at C with another DC blocking capacitor as shown in
the circuit to take output across the load.
2. Connect input and output signal to the oscilloscope. Calculate the gain of this amplifier
by taking the ratio of the output and the input amplitude. Make sure that both the input
and output sine waves are not clipped or distorted in any way. If they are reduce the
amplitude of the input sine wave until nice clean looking sine waves are present at both
input and output terminals. Also note the polarity of output sine wave relative to the
applied input signal.
3. Slowly increase the amplitude of the input sine wave until the output sinusoidal wave
begins to clip. Note the voltage at which clipping is on the positive or negative polarity
peaks.
4. Keep increasing the input voltage until the other polarity peak of the sine wave output
begins to clip and not down the voltage at which it occurs.
5. Tabulate the variation of voltage gain with frequency of the input sinusoidal, square and
triangular waves and plot frequency vs gain curve. Calculate the bandwidth and lower
and upper cut off frequency.

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B C
E
Experiment 3. Common Base (CB) Amplifier:

Aim: To (i) calculate Gain of the amplifier (ii) find out the clipping voltages for positive and
negative polarity peaks of the output signal, (iii) study the frequency response to calculate
bandwidth for sinusoidal, square and triangular waves, (iv) compare the input and output
frequency spectrum.
Vcc
15V

R1 RC
470k 4.7k C2
22uF
C +
C1
22uF
+ B Q1
2N2222 RL
4.7k
E
R2 RE
33k V1
220k C3 -5m/5mV
100uF
+

2MHz

Fig.2.2 CB Amplifier

Procedure:

1. Connect the input sinusoidal signal at point E as shown in Fig. 2.2 using DC blocking
capacitor. Connect load resistance at C with another DC blocking capacitor as shown in
the circuit to take output across the load.
2. Connect input and output signal to the oscilloscope. Calculate the gain of this amplifier
by taking the ratio of the output and the input amplitude. Make sure that both the input
and output sine waves are not clipped or distorted in any way. If they are reduce the
amplitude of the input sine wave until nice clean looking sine waves are present at both
input and output terminals. Also note the polarity of output sine wave relative to the
applied input signal.
3. Slowly increase the amplitude of the input sine wave until the output sinusoidal wave
begins to clip. Note the voltage at which clipping is on the positive or negative polarity
peaks.
4. Keep increasing the input voltage until the other polarity peak of the sine wave output
begins to clip and not down the voltage at which it occurs.
5. Tabulate the variation of voltage gain with frequency of the input sinusoidal, square and
triangular waves and plot frequency vs gain curve. Calculate the bandwidth and lower
and upper cut off frequency

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 4. Multistage amplifier: Cascade of two CE stages

Aim: To construct a high gain amplifier by cascading two gain stages: (i) calculate gain and (ii)
study the frequency response of the amplifier.

V2
15V
+V

R6
2.2k C2
1uF
+
R2
R1 4.7k
100k
Q2
V1 PNP
-1/1V R8 C1
10k 1uF
+ Q1 C3
NPN 1uF
1kHz + Output

R7 R4 R5
+

R3 C4 R9
10 47k 3.3k 3.3k 3.3k
100uF

Fig. 3 Two-stage amplifier

Procedure:

1. Construct the circuit shown in Fig.3. Measure and record the mid-band AC voltage gain
with a sinusoidal signal.
2. Study the frequency response of this circuit to draw frequency vs gain curve. Determine
the lower and higher frequency cut off.

Question:1. What are the advantages and disadvantages of cascading gain stages
2. Explain how the transistor Q2 has been biased in the above circuit.

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 5. Push Pull Amplifier

Aim: To obtain the maximum power output of the given push pull amplifier, find its efficiency
and to draw load versus power output curve and to study the cross over distortion.

Q1
SL100
R3
560

V1 10
-1/1V Vcc
R2 12V RL
Tr1 Tr2
12-0-12 V
+

1kHz 12-0-12 V

10

Q2
SL100

Fig.4 Push Pull Amplifier

Procedure:
1. Connect the DC supply (12 V) to the circuit form the source.
2. A sinusoidal signal of frequency 1 kHz with amplitude say 5mV is applied to the input of
power amplifier.
3. Connect a loud speaker at the output across the secondary of output transformer Tr2
4. Adjust the resistance R2 to hear proper sound. If the sound is heard the circuit is said to
be under working.
5. Replace the loud speaker with a variable load (RL) impedance.
6. Tabulate the load impedance and output voltage.
7. Draw the graph between load impedance (RL) and output power (PO).
8. Find the maximum power for the optimum loud. Calculate the % efficiency.

Exercise: Design a push pull circuit diagram to overcome the crossover distortion.

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 6. Operational Amplifier Circuits

Aim: To construct (a) inverting OR non inverting amplifier and perform (b) addition, (c)
subtraction (d) integration and (e) differentiation of analog signals using an operational
amplifier (IC 741).

(Note: Draw all the equivalent circuits and work out the expressions for the output
voltages and the voltage gain of the amplifier, final values of gain can be worked out
after measuring the actual resistances used).

Circuit diagrams:

Fig: 5.1 Non inverting Amplifier Fig: 5.2 Inverting Amplifier

Fig: 5.3 Adder circuit Fig: 5.4 Subtractor Circuit

Fig: 5.5 Integrator Circuit Fig: 5.6 Differentiator circuit

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 1. Make the non-inverting amplifier circuit as shown in fig.5.1. Give a d.c. input of say 2 V
and measure V0. Repeat the above step for different R2/R1 ratio and verify the function of
the non-inverting amplifier as a scale changer. Now give a sinusoidal input signal ‘V i’
with frequency 1 kHz and peak to peak voltage 5 V. Trace the input and output signals.
Measure the peak to peak voltage of output signal V0. Repeat for various input
frequencies.

2. Make the inverting amplifier circuit as shown in fig. 5.2. Give a d.c. input of say 2 V
and measure V0. Repeat the above step for different R2 and R1 values and verify the
function of the inverting amplifier as a scale changer. Now give a sinusoidal input signal
‘Vi’ with frequency 1 kHz and peak to peak voltage 5 V. Trace the input and output
signals. Measure the peak to peak voltage of output signal V0. Repeat for various input
frequencies.

3. Make the adder circuit as shown in fig. 5.3. Set V1= +1V and V2=0. Measure the output
voltage. Repeat the measurement for V2 = 1, 2, 3 and 4V. Check the output voltage and
compare it with V0 = -(V1+V2), the theoretical value. Tabulate the experimental output
voltage and the excepted (theoretical) values. Can you construct appropriate inverter
circuit such that the output is V0=V1+V2

4. Make the subtractor circuit as shown in Fig. 5.4. Set V1=0, and measure the output
voltage V0 for V2= 0, ±1, ±2, ±3, and ±4V. Tabulate the input and output voltages.
Compare the measured output voltage with the expected (theoretical) voltage.

5. Connect the integrator circuit as shown in Fig. 5.5. Apply a sinusoidal input signal ‘V i’
with frequency 1 kHz and peak to peak voltage 5V. Trace the input and output signals.
Measure the peak to peak voltage of output signal V0. Tabulate the readings. Repeat the
experiment for square and triangular waves. Repeat for C= 0.047µF and 0.1µF.
Calculate the output voltage theoretically and compare with the experimental data.

6. Connect the differentiator circuit as shown in Fig. 5.6. For sine wave, square wave and
triangular wave inputs Vi (1 kHz and Vpp = 5V), measure the peak to peak output voltage.
Trace the input and output signals. Calculate the theoretical output data.

Exercise:
Design the circuit diagram to calculate the off-set voltages, CMRR for op-amp.

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 7. Filters

Aim: To study (a) the voltage gain as a function of frequency for low pass filter, (b) the
voltage gain as a function of frequency for high pass filter and (c) determine the phase shift
in an all pass filter.

Equipments: DC power supply, +-15Volts, bread board, CRO, DMM, function generator.

Circuit diagram: (a)

Fig: 6.1 Low Pass Filter

(b)

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 Fig: 6.2 High Pass Filter
(c)

Fig: 6.3 All Pass Filter

Procedure:

1. For the low pass filter, make the circuit as shown in Fig. 6.1 Study and plot the voltage
gain as a function of the frequency. Calculate the allowed frequency band for the low
pass filter.
2. For the high pass filter, make the circuit as shown in Fig. 6.2 Study and plot the voltage
gain as a function of the frequency. Calculate the allowed frequency band for the high
pass filter.
3. For the all pass filter, make the circuit as shown in Fig. 6.3 Study and plot the phase shift
as a function of the frequency.

Pin-out diagrams for IC741 chip are given in Appendix I.

Precaution: list out precautions taken by you. Write down the special techniques or simpler
circuits followed by you if any.

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 8. Multivibrators

Aim: To construct a (a) astable and (b) monostable multivibrator using IC 555.

Circuit Diagram: (a) Astable Multivibrator

Fig: 7.1 Astable M.V.

(RA=1kΩ, RB=3.3kΩ, 10kΩ, 18kΩ)

(b) Monostable Multivibrator

Fig: 7.2 Monostable M.V.

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 Procedure: (a) Assemble the astable circuit shown in Fig. 7.1. Trace the output waveform.
Try to use the control voltage terminal and vary the output pulse width and observe the
output waveform. Calculate the frequency of the output waveform and the duty cycle.The
square wave output will have frequency f= 1.4/[C (R +2R )] . Repeat for different R , R and
A B A B

C values.
Compile the results and enclose the traced waveform.

Try-out: Redesign the circuit for operation at approximately 1 kHz with an approximate duty
cycle of 50%. Show the calculations for R_A, R_B and C.

(b) Construct the circuit as shown in Fig 7.2. Connect the circuit output to the CRO. Trace the
output wave form. Calculate the width of the output pulse. What should be the value of R
for the in the same monostable circuit that generates pulses with width half the value.

Precaution: List out the precaution and any special steps followed by you.

Pin-out diagram for each IC555 chip is given in Appendix I.

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 9. Unregulated and Regulated Power Supply

Aim:
a. To construct an unregulated dc power supply (using full wave and Bridge rectifier and
different filter circuits) and study the voltage regulation, ripple factor& efficiency.
Compare the performance of different configurations.
b. To construct and study an IC regulated Power supply.

Equipment & components required: step down transformer with centre tap, C.R.O., diodes
(IN4007), capacitors (100 F and others), resistors (10K and others), inductors and IC 7808, IC
7909.

Working formula:

Ripple factor ( g ):

V
g = rms
Vdc
Efficiency of rectifier (h ):

P (d .c.) Output Power(d.c)

h= =
P( a.c) Input Power(a.c)

For full wave centre tapped rectifier

0.812
h=
r
1+
RL

For bridge rectifier

0.812
h=
2r
1+
RL

Where r = diode resistance, RL = Load resistance

Voltage regulation:

VNL - VFL
% regulation = ´ 100
VFL

Where VNL = no-load or open circuit terminal voltage of the supply

VFL = full load terminal voltage of the supply

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 Circuits:

D1 D2
230V
50Hz

RL
O/P
D3 D4

Fig: 1 Bridge Rectifier Circuit

D1 D2
230V
50Hz

RL
C O/P
D3 D4

Fig.: 2 Bridge Rectifier Circuit with Capacitor filter

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 R4
2N3055
1Ω

2 kΩ
R5
20Ω 360Ω
2N3904

2N3904

1 kΩ

RL
R6
180Ω
To
Bridge
rectifier O/P

100Ω

2N3904

620Ω

5.6 V

Fig.3 Voltage regulator uses Darlington pass transistor and fold back current limiting

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 R4
Q2
1Ω

R3

R5

Q3

RS
R1

RL

R6
To +
Bridge
rectifier O/P

Q1

R2

Fig.4 Voltage regulator with fold back current limiting

Procedure:

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 10. Modulation

Aim: To study the (a) Amplitude Modulation and demodulation of a sine wave signal (b)
Pulse Width Modulation and demodulation of a square wave signal.

Circuits:
(a)

Fig. 10.1 Amplitude Modulation

Fig. 10.2 Amplitude Demodulation

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 (b)

Fig. 10.3 Pulse Width Modulation

Procedure:

1) Make the circuit as shown in Fig. 10.1. Trace the modulated output and calculate the
percent of modulation.

2) For the pulse width modulation, make the circuit as shown in Fig. 10.2. Adjust the
carrier and signal inputs to generate a pulse width modulated signal of frequency 1kHz,
20kHz and 50 kHz and duty cycle of 40%. Trace the modulated signal, note the
frequencies of the input signals.

Try Out:

1) Design the demodulation circuit for pulse width modulation.

2) Design the circuit for frequency modulation.

Pin-out diagrams for each IC chip are given in Appendix I.

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 Appendix I:

Pin diagram of IC 741

Pin diagram of IC 555

Pin diagram of IC 7400

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 Pin diagram of IC 7404

Pin diagram of IC 7408

Pin diagram of IC 7427

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 Pin diagram of IC 7476

Bread board layout

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