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DSE 20.1F Computer Architecture and Networks

The document contains four questions regarding computer architecture and networks for a diploma exam. Question 1 covers CPU components, bus systems, microprocessor architecture, and software control units. Question 2 relates to instruction formats, micro-operations, assembly and machine code programs. Question 3 is about memory hierarchy, RAM types, BIOS, EEPROM, and memory module construction. Question 4 discusses I/O interfaces, addressing methods, data transfer techniques, DMA units, and interrupt types. An attachment provides an instruction set reference.

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156 views3 pages

DSE 20.1F Computer Architecture and Networks

The document contains four questions regarding computer architecture and networks for a diploma exam. Question 1 covers CPU components, bus systems, microprocessor architecture, and software control units. Question 2 relates to instruction formats, micro-operations, assembly and machine code programs. Question 3 is about memory hierarchy, RAM types, BIOS, EEPROM, and memory module construction. Question 4 discusses I/O interfaces, addressing methods, data transfer techniques, DMA units, and interrupt types. An attachment provides an instruction set reference.

Uploaded by

pakaya tama
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
You are on page 1/ 3

NATIONAL INSTITUTE OF BUSINESS MANAGEMENT

Diploma in Software Engineering -20.1F


Computer Architecture and Networks

Time allowed: Two hours 04 August 2021, 9am-11am

• Additional material: Attachment 01

Question 01 (25 Marks)


1. Briefly explain, what are the main components of a CPU (03 Marks)
2. What is the Bus System of a Computer (03 Marks)
3. Draw the schematic diagram of internal microprocessor architecture and explain MBR
and SP registers used in a microprocessor. (08 Marks)
4. What is STACK memory? (04 Marks)
5. Explain the Software approach used to implement the control unit. (07 Marks)

Question 02 (25 Marks)

1. Explain the instruction format (04 Marks)


2. Write the micro operations and corresponding control signals for fetch and execution
cycles of LDA (XX) instruction (06 Marks)
3. Assume that initial values of memory locations 20, 21 and 22 are X, Y and Z respectively.
Write an Assembly program and Machine program for the following high-level
statement. (06 Marks)
Z = (X2-Y3) * (X – 2Y)
4. Explain Indirect Addressing Modes used by CPU. (04 Marks)
5. Draw the AND gate band diagram for the fetch and execution cycles of STA (XX)
instruction. (05 Marks)

Question 03 (25 Marks)

1. Draw the memory hierarchy associated with a computer system. (04 Marks)
2. Both ‘Static’ and ‘Dynamic’ random access memories are used to form Random Access
Memories (RAMs). State the differences between SRAM and DRAM. (06 Marks)
3. Write short notes on the following; (06 Marks)
a. BIOS
b. EEPROM

Page 1 of 3
4. In a given memory with 4GB capacity, Block Size is given as 2Bytes. What should be the
Address Bus Width (ABW) of the system? (04 Marks)
5. Construct a memory module of 32X128MB using memory chips of 16X32MB by clearly
showing the Address Bus Width (ABW) and Data Bus Width (DBW) (05 Marks)

Question 04 (25 Marks)

1. Draw a general block diagram of a typical input-output interface. Briefly explain the
function of each block in your diagram. (04 Marks)
2. What are the two types of input-output addressing methods used in input-output
interfaces? Compare and contrast these two methods. (06 Marks)
3. Explain the two types of Data transfer techniques used with IO interfaces. (05 Marks)
4. What is DMA unit? (05 Marks)
5. Describe three types of interrupts possible in a computer system. (05 Marks)

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Attachment 01: Instruction Set

Machine Instruction Assembly Instruction Operation

0000 ------ HLT End

0001 xxxxxx LDA XX Acc(XX)

0010 xxxxxx STA XX (XX)  Acc

0011 xxxxxx ADA XX AccAcc+(XX)

0100 xxxxxx SUB XX AccAcc-(XX)

0101 xxxxxx MUL XX AccAcc*(XX)

0110 xxxxxx DIV XX AccAcc/(XX)

0111 xxxxxx JMP XX Jump to XX

1000 xxxxxx JM0 XX Jump to XX if Acc=0 else skip

1001 xxxxxx JMN XX Jump to XX if Acc<0 else skip

1010 xxxxxx J() XX Indirect jump first 6 LSB are considered

1011 ------ INP -- Input to Acc

1100 ------ OUT -- Output from Acc

1101 xxxxxx CALL XX Start subprogram staring from XX

1110 ------- RETURN -- Return to previous subprogram

1111 0------ PUSH -- ToSAcc

1111 1------ POP -- AccToS+1

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