Quadrature Phase Shift Keying

Preliminary discussion
As its name implies, quadrature phase shift keying (QPSK) is a variation of binary phase shift
keying (BPSK). Recall that BPSK is basically a DSBSC modulation scheme with digital
information for the message. Importantly though, the digital information is sent one bit at a time.
QPSK is a DSBSC modulation scheme also but it sends two bits of digital information a time
(without the use of another carrier frequency).
As QPSK sends two bits of data at a time, it’s tempting to think that QPSK is twice as fast as
BPSK but this is not so. Converting the digital data from a series of individual bits to a series of
bit-pairs necessarily halves the data’s bit-rate. This cancels the speed advantage of sending two
bits at a time.
So why bother with QPSK? Well, halving the data bit rate does have one significant advantage.
The amount of the radio-frequency spectrum required to transmit QPSK reliably is half that
required for BPSK signals. This in turn makes room for more users on the channel.
Figure 1 below shows the block diagram of the mathematical implementation of QPSK.
At the input to the modulator, the digital data’s even bits (that is, bits 0, 2, 4 and so on) are
stripped from the data stream by a “bit-splitter” and are multiplied with a carrier to generate a
BPSK signal (called PSKI). At the same time, the data’s odd bits (that is, bits 1, 3, 5 and so on)
are stripped from the data stream and are multiplied with the same carrier to generate a second
BPSK signal (called PSKQ). However, the PSKQ signal’s carrier is phase-shifted by 90° before
being modulated. This is the secret to QPSK operation.
The two BPSK signals are then simply added together for transmission and, as they have the
same carrier frequency, they occupy the same portion of the radio-frequency spectrum. While
this suggests that the two sets of signals would be irretrievably mixed, the required 90º of phase
separation between the carriers allows the sidebands to be separated by the receiver using phase
discrimination (introduced in Experiment 8).
Figure 2 below shows the block diagram of the mathematical implementation of QPSK
demodulation.

Notice the arrangement uses two product detectors to simultaneously demodulate the two BPSK
signals. This simultaneously recovers the pairs of bits in the original data. The two signals are
cleaned-up using a comparator or some other signal conditioner then the bits are put back in
order using a 2-bit parallel-to-serial converter.
To understand how each detector picks out only one of the BPSK signals and not both of them,
recall that the product detection of DSBSC signals is “phase sensitive”. That is, recovery of the
message is optimal if the transmitted and local carriers are in phase with each another. But the
recovered message is attenuated if the two carriers are not exactly in phase. Importantly, if the
phase error is 90º the amplitude of the recovered message is zero. In other words, the message is
completely rejected (this issue is discussed in Part E of Experiment 7).
The QPSK demodulator takes advantage of this fact. Notice that the product detectors in Figure 2
share the carrier but one of them is phase shifted 90°. That being the case, once the phase of the
local carrier for one of the product detectors matches the phase of the transmission carrier for one
of the BPSK signals, there is automatically a 90º phase error between that detector’s local carrier
and the transmission carrier of the other BPSK signal. So, the detector recovers the data on the
BPSK signal that it’s matched to and rejects the other BPSK signal.
The experiment
In this experiment you’ll use the Emona Telecoms-Trainer 101 to generate a QPSK signal by
implementing the mathematical model of QPSK. Once generated, you’ll examine the QPSK
signal using the scope. Then, you’ll examine how phase discrimination using a product detector
can be used to pick-out the data on one BPSK signal or the other.
It should take you about 1 hour to complete this experiment.
Equipment
 Emona Telecoms-Trainer 101(plus power-pack)
 Dual channel 20 MHz oscilloscope
 Three Emona Telecoms-Trainer 101 oscilloscope
 Assorted Emona Telecoms-Trainer 101patch leads
Procedure
Part A - Generating a QPSK signal
1. Gather a set of the equipment listed on the previous page.
2. Set up the scope per the instructions in Experiment 1.
3. Set the scope's Trigger Source control to the EXT position.
4. Set the scope's Trigger Source Coupling control to the HFREJ position.
5. Set the scope's Channel 1 and Channel 2 Input Coupling controls to the DC position.
6. Set the scope's Timetiose control to the 0.5ms/div position.
7. Locate the Divider module and set it up to divide by 2 by pushing the left-side switch up and
the right-side switch down.
Tip: The Divider module is underneath the Sequence Generator module.
8. Connect the set-up shown in Figure 3 below.
Note: Insert the black plugs of the oscilloscope leads into a ground (6ND) socket.

The set-up in Figure 3 can be represented by the block diagram in Figure 4 below. The Sequence
Generator module is used to model digital data. The 2-bit Serial-to-Parallel Converter module is
used to split the data bits up into a stream of even bit and odd bits.
As mentioned in the preliminary discussion, splitting the data up this way halves the bit rate of
the two new sets of data. That being the case, the Sequence Generator module's SYNC output
must be halved for it to be used as the triggering signal for the scope.
9. Set the scope's Mode control to the DUAL position to view the Serial-to-Parallel Converter
module's two outputs.
10. Compare the signals. You should see two digital signals that are different to each other.
Question 1
What is the relationship between the bit rate of these two digital signals and the bit rate of the
Sequence Generator module's output? Tip: If you're not sure, see the preliminary discussion.
Answer:
The bit rate of generated two digital signals is half than that of sequence generator
module’s output, because converting the individual bit series to double-bit series takes double
time compared to individual bit generation.
11. Modify the set-up as shown in figure 5 below.

Excluding the digital data modelling, the set-up in Figure 5 can be represented by the block
diagram in Figure 6 below. Notice that the bit-splitter’s two outputs are connected to
independent Multiplier modules. The other input to the Multiplier modules is a 100 kHz sine
wave. However, the signals are out of phase with each other by 90° which is a requirement of
QPSK.
12. Compare the even bits of data with the Multiplier module’s output (PSKI).
13. Set the scope’s Time base control to the 0.2 ms /div position.
14. Activate the scopes Sweep Multiplier to view the signals more closely.
15. Use the scopes Horizontal Position control to locate a transition in the data sequence.
16. Examine the carrier and note in what way it changes at the sequence's transition.
Question 2
What feature of the Multiplier's output suggests that it’s a BPSK signal?
Answer:
The multiplier output shows the modulated carrier signal, i.e. the phase of carrier signal
modulates by even and odd bits. In QPSK generation, even bits modulate the carrier signal and
odd bits modulate the carrier signal having same frequency but differ by 90o phase shift.
For PSKI

Output1 = − Ac sin ( ω c t ) × sin ( φ ( t ) )

For PSKQ

Output2 = Ac cos ( ω c t ) ×cos ( φ ( t ) )

17. Deactivate the scopes Sweep Multiplier.

18. Move the scopes connections to the set-up as shown in Figure 7 on the next page.

This change can be represented by the block diagram in figure 8 below

19. Activate the scope's Sweep Multiplier to view the signals more closely.
20. Use the scope's Horizontal Position control to locate a transition in the data sequence.
21. Examine the carrier and note in what way it changes at the sequence's transition.
Question 3
What type of signal is present on the Multiplier's output?
22. Deactivate the scope's Sweep Multiplier and return the scope's Time base control to the
0.5ms/div setting.
23. Modify the set-up as shown in Figure 9 below.
The set-up in Figure 9 can be represented by the block diagram in Figure 10 below. The Adder
module is used to add the P5KI and P5Kg signals. This turns the set-up into a complete QPSK
modulator.

24. Turn the Adder module's G control fully anti-clockwise. Note: This removes the BPSKI
signal from the signal on the Adder module's output.
25. Adjust the Adder's g control to obtain a 4Vp-p output.
26. Disconnect the patch lead to the Adder module's B input.
Note: This removes the BPSKQ signal from the signal on the Adder module's output.
27. Adjust the Adder's G control to obtain a 4Vp-p output.
28. Reconnect the patch lead to the Adder's B input.
Question 4
According to the theory, what type of digital signal transmission is now present on the Adder's
output?
Answer:
At adder’s output, we have QPSK digital signal transmission, i.e.
Output = PSKI + PSKQ
Adder Output = Ac cos ( ω c t ) ×cos ( φ ( t ) ) −A c sin ( ωc t ) ×sin ( φ (t ) )

Adder Output = Ac cos ( ω c t +φ ( t ) )

29. Set the scope's Time base control to the 0.2ms/div position.
30. Activate the scopes Sweep Multiplier to view the signal more closely.
31. Use the scopes Horizontal Position control to examine the signal from beginning to end.
Question 5
Why is there only one sine wave when the QPSK signal is made up of two BM signals?
Answer:
In QPSK, as two bits are transmitting at the same time, so the carrier signals for even and
odd bits should be different. Thus, carrier signals are differed by phase difference, i.e. one carrier
signal is cosine wave and other is sine wave (i.e. 90o phase difference with other carrier signal
while both carrier signals possessing same frequency).
Part B - Using phase discrimination to pick-out one of the QPSK signal's BPSK signals
It's not possible to implement both a QPSK modulator and demodulator with one Emona
Telecoms-Trainer 101. However, it is possible to demonstrate how phase discrimination is used
by a QPSK demodulator to pick-out one or other of the two BPSK signals that make up the
QPSK signal. The next part of the experiment lets you do this.
32. Deactivate the scope's Sweep Multiplier and return the scope's Time base control to the 1
ms /div setting.
33. Locate the Tuneable LPF module and turn its Cut-off Frequency Adjust control fully
clockwise.
34. Set the Tuneable LPF module's Gain control to about the middle of its travel.
35. Locate the Phase Shifter module and set its Phase Change control to the 0° position.
36. Modify the set-up as shown in Figure 11 below.
Note: As there are a lot of connections, you may find it helpful to tick them off as you add them.

The additions to the set-up can be represented by the block diagram in Figure 12 below. If you
compare it to Figure 2 in the preliminary discussion, you'll notice that it implements most of one
arm of a QPSK demodulator (either I or Q).
37. Compare the even data bits on the Serial-to-Parallel Converter modules X/ output with the
Bandpass LPF module's output.
38. Vary the Phase Shifter module's Phase Adjust control left and right and observe the effect on
the demodulated signal. You are aiming to recover a bipolar (2-level) signal like the original X1
or X2 signals from the Serial-to-Parallel Converter module.
39. Set the Phase Shifter module's Phase Change control to the 180° position and repeat step 36.
Question 6
What is the cause of the 3 and 4 level signals out of the Tuneable LPF during the phase
adjustments above? How many different Phase Adjust control positions will give you a bipolar
signal?
Answer:
The main cause of 3 and 4 level signals out of Tune able LPF is change of phase on
Phase Shifter. While changing the phase shift position, the intermediate position phase angle
gives the 3 and 4 level signals. Two Phase Shift Adjust control positions give the bipolar
required signal.
40. Modify the set-up as shown in figure 13 below.
The addition of the Comparator on the Utilities module can be represented by the block diagram
in Figure 14 below. If you compare this block diagram with Figure 2 in the preliminary
discussion, you'll notice that this change completes one arm of a QPSK demodulator.

41. Set the Phase Shifter module's Phase Change control to the O position.
42. Compare the even data bits on the Serial-to-Parallel Converter modules X/ output with the
Bandpass LPF module's output.
43. Adjust the Phase Shifter module's Phase Adjust control until you have recovered the even
data bits (ignoring any phase shift).
Question 7
What is the present phase relationship between the local carrier and the carrier signals used to
generate the PSKI and PSKQ signals?
Answer:
Currently, the local carrier signal and carrier signal used to generate the PSKI are in
phase, while local carrier signal and carrier signal used to generate the PSKQ are out of phase by
90o.
44. Unplug the scope's Channel 1 input from the Serial-to-Parallel Converter module's X/ output
and connect it to its X2 output to view the odd data bits.
45. Compare the odd data bits with the recovered data. They should be different.
46. Set the Phase Shifter module's Phase Change control to the 180° position.
47. Adjust the Phase Shifter module's Phase Adjust control until you have recovered the odd data
bits (ignoring any phase shift).
Question 8
What is the new phase relationship between the local carrier and the carrier signals used to
generate the PSKE and PSKQ signals?
Answer:
Now, the local carrier signal and carrier signal used to generate the PSKI are 180o out of
phase. And the local carrier signal and carrier signal used to generate the PSKQ are 90o out of
phase.
Question 9
Why is your demodulator considered to be only one half of a full QPSK receiver?
Answer:
Demodulator is considered to be only one half of a full QPSK receiver because there are
bit-pairs (even and odd bits) at the input of receiver. As there are two bits, so we need two
demodulators to get the complete data serial.

Conclusion:
There are basically two parts of this lab. In first part, we create QPSK modulation scheme
based transmission signal. In order to create QPSK modulated signal, we need to split the digital
serial bits into even and odd bits. Then modulate the even and odd bits separately, this
modulation gives us the BPSK signal. Then adding two BPSK modulated signals gives the
QPSK signal.
In second part, we retrieve the original digital serial bits. To retrieve the original data,
first of all we demodulate the incoming QPSK signal. To get the even and odd bits separately,
we introduce the phase difference of 90o between carriers of both demodulators. Then
demodulated even and odd bits are added together to obtain the original serial bits.