Power Ece Pawan
Power Ece Pawan
Moh’d Gharbieh
Electrical Engineering Student
University of Jordan
September 2014
3
CHAPTER 1: Introduction
1.1 The Interdisciplinary Nature
The demand for control of electric power for electric motor drive systems and
industrial control existed for many years, and this led to early development of the Ward-
leonard system to obtain a variable dc voltage for the control of dc motor drives. Power
electronics have revolutionized the concept of power control for power conversion and
for control of electrical drives.
Power electronics combine power, electronics, and control. Control deals with the
steady-state and dynamic characteristics of closed-loop systems. Power deals with the
static and rotating power equipment for the generation, transmission, and distribution of
electric power. Electronics deal with the solid-state devices and circuits for signal
processing to meet the desired control objectives. Power electronics may be defined as the
application of solid-state electronics for the control and conversion of electric power. The
interrelationship of power electronics with power, electronics and control is showen in
Fig.1-1 .
4
The discussion in this introductory shows that the study of power electronics
encompasses many fields within electrical engineering, as illustrated by Fig. 1-2. These
include power systems, solid-state electronics, electrical machines, analog/digital
control and signal processing, electromagnetic field calculations, and so on.
Combining the knowledge of these diverse fields makes the study of power electronics
challenging as well as interesting. There are many potential advances in all these fields
that will improve the prospects for applying power electronics to new applications.
The early years of the commercial use of electricity were marked by competition
between Edison’s DC and Tesla’s AC distribution technologies, a battle that the latter
ultimately won. Whereas many applications are well suited to AC, there are also uses
for which DC remains indispensable, thus requiring a means of converting AC to DC.
From an early stage in the development of electrical systems, inventors were seeking to
convert AC to DC (rectification) and DC to AC (inversion), as well as to create variable
output from fixed input (e.g. for variable-speed drives). Most power electronic
applications today can still be placed in one of these three categories. Precursor
technologies for AC to DC conversion were the motor-generator (a motor and a
generator fixed to a common drive shaft) and the contact converter (a converter
featuring fast-moving externally-activated mechanical contacts). One notable weakness
was that the waveform of the AC output was not a sine wave but a rectangle. This
drawback was shared with many power-electronic circuits. Overcoming this was to be
one of the major points of progress in the area of modern power electronics.
5
Power MOSFET
, IGBT
The power electronic controllers have some drawbacks also. They are as follows:
6- Special steps are to be taken for correcting line supply power factor.
Figur e 1-5
Based on the form (frequency) on the two sides, converters can be divided
into the following broad categories:
1-AC to DC converter
(a) Diode rectifiers (uncontrolled rectifiers).
(b) Line commutated converters or AC to DC converters (controlled rectifiers)
Applications:
• Speed control of DC motor in DC drives ,UPS ,HVDC transmission and Battery
Chargers.
9
+
AC Line DC Output
Input Commutated V0(QC)
Voltage Converter
-
Figure 1.6
Example :
2- AC to AC converter
(a) AC voltage (RMS voltage) controllers
V0(RMS)
AC Vs AC Variable AC
Input Voltage RMSO/P Voltage
Voltage fs Controller
fs fS
Example :
Figure 1.10
Applications :
• AC pumps.
11
Type pf input: AC supply (fixed voltage & frequency ) Type of output :Vairable frequency AC voltage.
Applications :
Example :
Figure 1.13
12
Applications :
4- DC to AC converters (inverters):
+ Inverter
DC AC
Supply (Forced Output Voltage
- Commutation)
Figure 1.14
Example :
Figure 1.15
13
Applications :
2- Uninterrupted power supplies (UPS system) used for computers, computer labs.
High efficiency is essential in any power processing application. The primary reason for
this is usually not the desire to save money on one’s electric bills, nor to conserve energy, in spite
of the nobility of such pursuits. Rather, high efficiency converters are necessary because
construction of low-efficiency converters, producing substantial output power, is impractical. The
efficiency of a converter having output power 𝑃𝑜𝑢𝑡 and input power 𝑃𝑖𝑛 is
𝑃𝑜𝑢𝑡
=
𝑃𝑖𝑛
(1.1)
The power lost in the converter is
1
𝑃𝑙𝑜𝑠𝑠 = 𝑃𝑖𝑛 − 𝑃𝑜𝑢𝑡 = 𝑃𝑜𝑢𝑡 � − 1� (1.2)
Increasing the efficiency is the key to obtaining higher output powers. For example, if the
converter efficiency is 90%, then the converter loss power is equal to only 11% of the output
power. Efficiency is a good measure of the success of a given converter technology. Figure 1.18
illustrates a converter that processes a large amount of power, with very high efficiency. Since
very little power is lost, the converter elements can be packaged with high density, leading to a
converter of small size and weight, and of low temperature rise.
How can we build a circuit that changes the voltage, yet dissipates negligible power? The
various conventional circuit elements are illustrated in Fig. 1.19. The available circuit elements
fall broadly into the classes of resistive elements, capacitive elements, magnetic devices including
inductors and transformers, semiconductor devices operated in the linear mode (for example, as
class A or class B amplifiers), and semiconductor devices operated in the switched m ode (such as
in logic devices where transistors operate in either saturation or cutoff). In conventional signal
processing applications, where efficiency is not the primary concern, magnetic devices are usually
avoided wherever possible, because of their large size and the difficulty of incorporating them
into integrated circuits. In contrast, capacitors and magnetic devices are important elements of
switching converters, because ideally they do not consume power. It is the resistive element, as
well as the linear-mode semiconductor device, that is avoided [2]. Switched-mode semiconductor
devices are also employed. When a semiconductor device operates in the off state, its current is
zero and hence its power dissipation is zero. When the semiconductor device operates in the on
(saturated) state, its voltage drop is small and hence its power dissipation is also small. In either
event, the power dissipated by the semiconductor device is low. So capacitive and inductive
elements, as well as switched-mode semiconductor devices, are available for synthesis of high
efficiency converters.
(a)
(b)
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(c)
It is always desired to have the power switches perform as close as possible to the ideal
case. Device characteristically speaking, for a semiconductor device to operate as an ideal switch,
it must possess the following features:
1-No limit on the amount of current (known as forward or reverse current) the device can
carry when in the conduction state (on-state).
2-No limit on the amount of the device-voltage ((known as forward or reverse blocking
voltage) when the device is in the non-conduction state (off-state).
3-Zero on-state voltage drop when in the conduction state.
4-Infinite off-state resistance, i.e. zero leakage current when in the non-conduction state.
5-No limit on the operating speed of the device when changes states, i.e. zero rise and fall
times.
The switching waveforms for an ideal switch is shown in Fig. 1.20, where 𝑖𝑠𝑤 and 𝑣𝑠𝑤 are
the current through and the voltage across the switch, respectively.
Both during the switching and conduction periods, the power loss is zero, resulting in a
100% efficiency, and with no switching delays, an infinite operating frequency can be achieved.
In short, an ideal switch has infinite speed, unlimited power handling capabilities, and 100%
efficiency. It must be noted that it is not surprising to find semiconductor-switching devices that
can almost, for all practical purposes, perform as ideal switches for number of applications.
17
1- Dc to Dc converter :
Let us now consider how to construct the simple dc-dc converter example illustrated in
Fig. 1.21. The input voltage 𝑉𝑔 is 100 V. It is desired to supply 50 V to an effective 5Ω load, such
that the dc load current is 10 A.
obtained. The load current flows through the variable resistor. For the specified voltage and
current levels, the power 𝑃𝑙𝑜𝑠𝑠 dissipated in the variable resistor equals the load power
𝑃𝑜𝑢𝑡 = 500 W. The source 𝑉𝑔 supplies power 𝑃𝑖𝑛 = 1000 𝑊. Figure 1.21(b) illustrates a more
practical implementation known a s the linear seriespass regulator. The variable resistor of
Fig. 1.21(a) is replaced b y a linear-mode power transistor, whose base current is controlled by a
feedback system such that the desired output voltage is obtained. The power dissipated by the
linear-mode transistor of Fig. 1.21(b) is approximately the same as the 500 W lost by the variable
resistor in Fig. 1.21(a). Series-pass linear regulators generally find modern application only at low
power levels of a few watts.
Figure 1.22 insertion of SPDT switch which changes the dc component of the voltage.
Thus, the switch changes the dc voltage, b y a factor equal to the duty cycle D. To convert
the input voltage into 𝑉𝑔 = 100𝑉 the desired output voltage of V = 50 V, a duty cycle of D = 0.5
is required.
Again, the power dissipated by the switch is ideally zero. When the switch contacts are
closed, then their voltage is zero and hence the power dissipation is zero. When the switch
contacts are open, then the current is zero and again the power dissipation is zero. So we have
succeeded in changing the dc voltage component, using a device that is ideally lossless.
In addition to the desired dc component 𝑉𝑔 the switch output voltage waveform 𝑣𝑔 (𝑡) also
contains undesirable harmonics of the switching frequency. I n most applications, these harmonics
must be removed, such that the output voltage 𝑣(𝑡) is essentially equal to the dc component
𝑉 = 𝑉𝑠 .A low-pass filter can be employed for this purpose. Figure 1.24 illustrates the introduction
of a single-section L–C low-pass filter. If the filter corner frequency 𝑓𝑜 is sufficiently less than the
switching frequency 𝑓𝑠 then the filter essentially passes only the dc component of 𝑣𝑠 (𝑡) .To the
extent that the switch, inductor, and capacitor elements are ideal, the efficiency of this dc–dc
converter can approach 100%.
Figure 1.24
20
In Fig. 1.25, a control system is introduced for regulation of the output voltage. Since the
output voltage is a function of the switch duty cycle, a control system can be constructed that
varies the duty cycle to cause the output voltage to follow a given reference. Figure 1.25 also
illustrates a typical way in which the SPDT switch is realized using switched-mode
semiconductor devices. The converter power stage developed in Figs. 1.22 to 1.25 is called the
buck converter, because it reduces the dc voltage.
Converters can be constructed that perform other power processing functions. For
example, Fig 1.26 illustrates a circuit known as the boost converter, in which the positions of the
inductor and SPDT switch are interchanged. This converter is capable of producing output
voltages that are greater in magnitude than the input voltage. In general, any given input voltage
can be converted into any desired output voltage, using a converter containing switching devices
embedded within a network of reactive elements.
2- DC to AC inverter
Figure 1.27(a) illustrates a simple inverter circuit. As illustrated in Fig. 1.27(b), the switch
duty cycle is modulated sinusoidally. This causes the switch output voltage 𝑣𝑠 (𝑡) to contain a
low-frequency sinusoidal component. The L–C filter cutoff frequency 𝑓𝑜 is selected to pass the
desired low-frequency components of 𝑣𝑠 (𝑡) but to attenuate the high-frequency switching
harmonics. The controller modulates the duty cycle such that the desired output frequency and
voltage magnitude are obtained.
Figure 1.27 A bridge-type dc to ac inverter (a) ideal inverter circuit, (b) typical pulse-width-modulated switch
voltage waveform 𝑣𝑠 (𝑡), and its low-frequency component.
It’s astonishing to realise that there is hardly a home , office block, factor, car, sport hall,
hospital or theatre without an application, and sometimes many applications of power electronic
equipment as cleared in figure 1.28. Some typical applications are listed in Table 1.1
Figure 1.28
22
The power levels encountered in high-efficiency switching converters range from (1) less
than one watt, in dc–dc converters within battery-operated portable equipment, to (2) tens,
hundreds, or thousands of watts in power supplies for computers and office equipment, to (3)
kilowatts to Megawatts, in variable-speed motor drives, to (4) roughly 1000 Megawatts in the
rectifiers and inverters that interface dc trans-mission lines to the ac utility power system. The
converter systems of several applications are illustrated in this section.
A power supply system for a laptop computer is illustrated in Fig. 1.29. A lithium battery
powers the system, and several dc–dc converters change the battery voltage into the voltages
required by the loads. A buck converter produces the low-voltage dc required by the
microprocessor. A boost converter increases the battery voltage to the level needed by the disk
drive. An inverter produces high-voltage high-frequency ac to drive lamps that light the display.
A charger with transformer isolation converts the ac line voltage into dc to charge the battery. The
converter switching frequencies are typically in the vicinity of several hundred kilohertz; this
leads to substantial reductions in the size and weight of the reactive elements. Power management
is used, to control sleep modes in which power consumption is reduced and battery life is
extended. In a distributed power system, an intermediate dc voltage appears at the computer
backplane. Each printed circuit card contains high-density dc–dc converters that produce locally-
regulated low voltages.
23
Figure 1.31 illustrates an electric vehicle power and drive system. Batteries are charged
by a converter that draws high power-factor sinusoidal current from a single-phase or three-phase
ac line. The batteries supply power to variable-speed ac motors to propel the vehicle. The speeds
of the ac motors are controlled by variation of the electrical input frequency. Inverters produce
three-phase ac output voltages of variable frequency and variable magnitude, to control the speed
of the ac motors and the vehicle. A dc–dc converter steps down the battery voltage to the lower dc
levels required by the electronics of the system. Applications of motor drives include speed
control of industrial processes, such as control of compressors, fans, and pumps; transportation
applications such as electric vehicles, subways, and loco-motives; and motion control applications
in areas such a s computer peripherals and industrial robots.
24
Power computations are essential in analyzing and designing power electronics circuits.
Basic power concepts are reviewed in this chapter, with particular emphasis on power
calculations for circuits with nonsinusoidal voltages and currents. Extra treatment is given
to some special cases that are encountered frequently in power electronics..
Energy
Energy, or work, is the integral of instantaneous power. Observing the passive
sign convention, energy absorbed by a component in the time interval from
t1 to t2 is
t2
W p(t) dt (2-2)
3
t1
If v(t) is in volts and i(t) is in amperes, power has units of watts and energy has
units of joules.
Average Power
Periodic voltage and current functions produce a periodic instantaneous power
function. Average power is the time average of p(t) over one or more periods.
Average power P is computed from
t0 T t0 T
1 1
P p(t) dt v(t)i(t) dt
T3 T3
t0 t0
(2-3)
where T is the period of the power waveform. Combining Eqs. (2-3) and (2-2),
power is also computed from energy per period.
W
P
T (2-4)
Average power is sometimes called real power or active power, especially in
ac circuits. The term power usually means average power. The total average
power absorbed in a circuit equals the total average power supplied.
EXAMPLE 2-1
v(t)
20 V
0 t
10 ms 20 ms
i(t) (a)
20 A
0 t
6 ms 20 ms
−15 A
(b)
p(t)
400 W
0 t
6 ms 10 ms 20 ms
−300 W
(c)
Figure 2-2 Voltage, current, and instantaneous power for Example 2-1.
(b) Energy absorbed by the device in one period is determined from Eq. (2-2).
T 0.006 0.010 0.020
0.020 P 3 Q
1 1
P p(t) dt 400 dt 300 dt 0 dt
T3 3 3
0 0 0.006 0.010
2.4 1.2 0
60 W
0.020
Average power could also be computed from Eq. (2-4) by using the energy per period
from part (b).
W 1.2 J
P 60 W
T 0.020 s
A special case that is frequently encountered in power electronics is the power absorbed or supplied by
a dc source. Applications include battery-charging cir- cuits and dc power supplies. The average power
absorbed by a dc voltage source v(t) = Vdc that has a periodic current i(t) is derived from the basic
definition of average power in Eq. (2-3):
t0 T t0 T
1 1
Pdc v(t)i(t) dt V i(t) dt
T 3 T 3 dc
t0 t0
28
The term in brackets is the average of the current waveform. Therefore, average power absorbed by a dc
voltage source is the product of the voltage and the average current.
Pdc = Vdc Iavg (2-5)
For a periodic voltage across a resistor, effective voltage is defined as the voltage that is as effective as
the dc voltage in supplying average power. Effective volt- age can be computed using the equation
2
𝑉𝑒𝑓𝑓 (2-8)
𝑃=
𝑅
Equating the expressions for average power in Eqs. (2-8) and (2-9) gives
T T
V 2eff 1 1 1
P C v 2(t) dt S or V 2eff v 2(t) dt
R R T3 T3
0 0
29
The effective value is the square root of the mean of the square of the voltage
hence the term root mean square.
Similarly, rms current is developed from P = I2rmsas
T
1 (2-11)
Irms i 2(t) dt
CT 3
0
The usefulness of the rms value of voltages and currents lies in the computing power absorbed by
resistances. Additionally, ac power system voltages and currents are invariably given in rms values.
Ratings of devices such as transformers are often specified in terms of rms voltage and current
EXAMPLE 2-2
Vm
DT T t
■ Solution
The voltage is expressed as
Vm 0 t DT
v(t) e
DT t T 0
Using Eq. (2-10) to determine the rms value of the waveform gives
T DT T
1 1 1 2
Vrms v 2 (t) dt a V 2m dt 0 2 dtb (V m DT )
CT 3 CT 3 3 AT
0 0 DT
yielding Vrms Vm 2D
30
EXAMPLE 2--3
1 Vm
Vrms V 2m sin2( t) d( t)
F 2
3 12
0
(b) Equation (2-10) can be applied to the full-wave rectified sinusoid, but the results of part (a) can
also be used to advantage. The rms formula uses the integral of the square of the function. The square
of the sine wave is identical to the square of the full-wave rectified sine wave, so the rms values of the
two waveforms are identical: 𝑉𝑚
𝑉𝑟𝑚𝑠 =
√2
(c) Equation (2-10) can be applied to the half-wave rectified sinusoid.
2
1 1
Vrms £ V 2m sin2( t) d( t) 0 2 d( t)≥ V 2m sin2( t) d( t)
F 2
3 3 F 2
3
0
0
The result of part (a) will again be used to evaluate this expression. The square
of the function has one-half the area of that of the functions in (a) and (b).
That is,
2
1 1 1
Vrms V 2m sin2( t) d( t) a b V 2m sin2( t) d( t)
F 2
3 F 2 2
3
0 0
1 1
Vrms a b V 2m sin2( t) d( t)
A 2 F 2
3
0
The last term on the right is the rms value of a sine wave which is known to be
Vm / 12, so the rms value of a half-wave rectified sine wave is
1 Vm Vm
Vrms
A 2 12 2
31
i(t) i(t)
0 0
(b)
(a)
i2(t)
(c)
EXAMPLE 2-4
ia
ib
ic
+ + +
van vbn vcn
- - -
in
(a)
van, ia
vbn, ib
vcn, ic
in
(b)
i2a
i2n
(c)
If a periodic voltage is the sum of two periodic voltage waveforms, v(t) = v1(t) +v2(t), the rms
value of v(t) is determined from Eq. (2-10) as
T T
A v1 v2 B 2 dt A v 21 2v1v2 v 22 B dt
1 1
V 2rms
T3 T3
0 0
or
T T T
1 1 1
V 2rms v 21 dt 2v1v2 dt v 22 dt
T3 T3 T3
0 0 0
33
The term containing the product v1v2 in the above equation is zero if
the functions v1 and v2 are orthogonal. A condition that satisfies that requirement
occurs when v1 and v2 are sinusoids of different frequencies. For orthogonal
functions,
T T
1 1
V 2rms v 2(t) dt v 2(t) dt
T3 1 T3 2
0 0
Noting that
T T
1 1
v 2(t) dt V 21, rms and v 22(t) dt V 22, rms
T3 1 T3
0 0
then
If a voltage is the sum of more than two periodic voltages, all orthogonal, the rms
value is
N
Vrms 2V 21, rms V 22, rms V 23, rms Á V n, 2
B a rms
n1
(2-12)
Similarly , N
Irms 2I 21, rms I 22, rms I 23, rms Á I 2n, rms
Ba
n=1 (2-13)
Note that Eq. (2-13) can be applied to Example 2-4 to obtain the rms value of the neutral current.
EXAMPLE 2-5
(b)For sinusoids of the same frequency, Eq. (2-39) does not apply because the integral of the cross product over
one period is not zero. First combine the sinusoids using phasor addition:
25.2⬔50 12.3⬔10 5⬔8
12.3 2
The rms value of this voltage is determined from Eq. (2-12) as Vrms 42 a b 9.57 V
C 12
34
EXAMPLE 2-6
RMS Value of Triangular Waveforms
(a) A triangular current waveform like that shown in Fig. 2-6a is commonly encountered in dc
power supply circuits. Determine the rms value of this current
(b) Determine the rms value of the offset triangular waveform in Fig. 2-6b
■ Solution
(a) The current is expressed as 2Im
t Im 0 t t1
t1
i(t) μ
2Im I (T t 1)
t m t1 t T
T t1 T t1
The details of the integration are quite long, but the result is simple: The rms value of a triangular
current waveform is
𝐼𝑚
𝐼𝑟𝑚𝑠 =
√3
(b) The rms value of the offset triangular waveform can be determined by using the result of part (a).
Since the triangular waveform of part (a) contains no dc component, the dc signal and the triangular
waveform are orthogonal, and Eq.(2-13) applies.
Im 2 2 2
Irms 2I 21, rms I 22, rms a b I 2dc a b 32 3.22 A
C 13 C 13
Im
t
t1 T 2T
-Im
(a)
5
Im
3 Idc
35
Power Factor
The power factor of a load is defined as the ratio of average power to apparent
power:
P P
pf ⫽ ⫽ (2-15)
S Vrms Irms
In sinusoidal ac circuits, the above calculation results in pf ⫽ cos where is the
phase angle between the voltage and current sinusoids. However, that is a special
case and should be used only when both voltage and current are sinusoids. In
general, power factor must be computed from Eq. (2-15).
2.5POWER COMPUTATIONS FOR SINUSOIDAL
AC CIRCUITS
In general, voltages and/or currents in power electronics circuits are not sinu-
soidal. However, a nonsinusoidal periodic waveform can be represented by a
Fourier series of sinusoids. It is therefore important to understand thoroughly
power computations for the sinusoidal case. The following discussion is a review
of power computations for ac circuits.
For linear circuits that have sinusoidal sources, all steady-state voltages and
currents are sinusoids. Instantaneous power and average power for ac circuits are
computed using Eqs. (2-1) and (2-3) as follows:
For any element in an ac circuit, let
v(t) ⫽ Vm cos (t ⫹ )
(2-16)
i(t) ⫽ Im cos (t ⫹ )
Then instantaneous power is
p(t) ⫽ v(t)i(t) ⫽ [Vm cos (t ⫹ )][Im cos (t ⫹ )] (2-17)
Using the trigonometric identity gives
1
(cos A)(cos B) ⫽ [cos (A ⫹ B) ⫹ cos (A ⫺ B)] (2-18)
2
VmIm
p(t) ⫽ a b [cos (2t ⫹ ⫹ ) ⫹ cos ( ⫺ )] (2-19)
2
Average power is
T T
1 VI
P⫽ p(t) dt ⫽ ¢ m m ≤ [cos (2t ⫹ ⫹ ) ⫹ cos( ⫺ )]dt (2-20)
T3 2 3
0 0
har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 44
36
The result of the above integration can be obtained by inspection. Since the firs
term in the integration is a cosine function, the integral over one period is zero
because of equal areas above and below the time axis. The second term in the
integration is the constant cos(
), which has an average value of cos(
).
Therefore, the average power in any element in an ac circuit is
VmIm
P ¢ ≤ cos (
) (2-21)
2
This equation is frequently expressed as
37
Fourier Series
A nonsinusoidal periodic waveform that meets certain conditions can be described
by a Fourier series of sinusoids. The Fourier series for a periodic function f(t) can
be expressed in trigonometric form as
q
where
T>2
1
a0 f(t) dt
T 3
T>2
T>2
2
an f(t) cos (n 0t) dt (2-27)
T 3
T>2
T>2
2
bn f(t) sin (n 0t) dt
T 3
T>2
Sines and cosines of the same frequency can be combined into one sinusoid,
resulting in an alternative expression for a Fourier series:
q
f(t) a0 a Cn cos (n 0t n)
n1
where (2-28)
bn
Cn 2a 2n b 2n and n tan1 a b
an
or
q
f(t) a0 a Cn sin (n 0t n)
n1
where (2-29)
an
Cn 2a 2n b 2n and n tan1 a b
bn
The term a0 is a constant that is the average value of f(t) and represents a dc volt-
age or current in electrical applications. The coefficient C1 is the amplitude of the
term at the fundamental frequency 0. Coefficients C2, C3, . . . are the amplitudes
of the harmonics that have frequencies 2 0, 3 0, . . . .
har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 46
38
The rms value of f(t) can be computed from the Fourier series:
C 2
a 20 a a n b
q q
2
Frms a F n, rms (2-30)
A n0 C n1 12
Average Power
If periodic voltage and current waveforms represented by the Fourier series
q
v(t) V0 a Vn cos (n 0t n)
n1
q
(2-31)
i(t) I0 a In cos (n 0t
n)
n1
exist for a device or circuit, then average power is computed from Eq. (2-3).
T
1
P v(t)i(t) dt
T3
0
The average of the products of the dc terms is V0 I0. The average of voltage and
current products at the same frequency is described by Eq. (2-22), and the
average of voltage and current products of different frequencies is zero.
Consequently, average power for nonsinusoidal periodic voltage and current
waveforms is
q q
or (2-32)
n1 2
Note that total average power is the sum of the powers at the frequencies in the
Fourier series.
39
+
Vm cos(nω0t + θn)
−
i(t)
+
V1 cos(ω0t + θ1) Load
− 5Ω
+
v(t)
−
+
15 mH
Vdc
−
EXAMPLE 2-7
■ Solution
Current at each source frequency is computed separately. The dc current term is
V0 10
I0 2A
R 5
The amplitudes of the ac current terms are computed from phasor analysis:
V1 20∠ (25°)
I1 2.65∠ (73.5°) A
R j 1L 5 j(2
60)(0.015)
V2 30 ∠20°
I2 2.43∠ (46.2°) A
R j 2L 5 j(4
60)(0.015)
Load current can then be expressed as
i(t) 2 2.65 cos (2
60t 73.5°) 2.43 cos (4
60t 46.2°)
.A Power at each frequency in the Fourier series is determined from Eq2-32
dc term: P0 (10 V)(2 A) 20 W
(20)(2.65)
2
60: P1 cos(25° 73.5°) 17.4 W
2
(30)(2.43)
4
60: P2 cos (20° 46°) 14.8 W
2
har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 48
40
then average power absorbed by the load (or supplied by the source) is
computed from Eq. (2-32) as
Vn, max In, max
P V0I0 a a b cos ( n
n)
q
n1 2
V1I1 (0)(In, max)
(0)(I0) a b cos ( 1
1) a
q
cos ( n
n) (2-35)
2 n2 2
V1I1
a b cos ( 1
1) V1, rmsI1, rms cos ( 1
1)
2
Note that the only nonzero power term is at the frequency of the applied voltage.
The power factor of the load is computed from Eq. 2-15
P P
pf
S VrmsIrms
(2-36)
V1, rmsI1, rms cos ( 1
1) I1, rms
pf ¢ ≤ cos ( 1
1)
V1, rms Irms Irms
q q
I 2
Irms a I 2n, rms I 20 a ¢ n ≤ (2-37)
C n0 C n1 12
har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 49
41
I 2n
Aa
THD n2 (2-42)
I1
Another way to express the distortion factor is
1
DF (2-43)
A 1 (THD)2
Reactive power for a sinusoidal voltage and a nonsinusoidal current can be
the expressed as in Eq. (2-23). The only nonzero term for reactive power is at
voltage frequency:
V1I1
Q sin( 1
1) (2-71)
2
With P and Q defined for the nonsinusoidal case, apparent power S must include
a term to account for the current at frequencies which are different from the
har80679_ch02_021-064.qxd 12/15/09 3:01 PM Page 50
42
S 2P 2 Q 2 D 2 (2-45)
where
q
2 V1 q
D V1, rms a I n, rms In (2-46)
A nZ1 2 A na
Z1
Other terms that are sometimes used for nonsinusoidal current (or voltages) are
form factor and crest factor.
Irms
Form factor (2-47)
Iavg
Ipeak
Crest factor (2-48)
Irms
EXAMPLE 2-8
i(t) 8 15 cos (377t 30°) 6 cos [2(377)t 45°] 2 cos [3(377)t 60°]
Determine (a) the power absorbed by the load, (b) the power factor of the load, (c) the
distortion factor of the load current, (d) the total harmonic distortion of the load
current.
■ Solution
(a) The power absorbed by the load is determined by computing the power absorbed at
each frequency in the Fourier series [Eq. 2-32
100 15 6 2
P (0)(8) a ba b cos 30° (0) a b cos 45° (0) a b cos 60°
12 12 12 12
100 15
P a ba b cos 30° 650 W
12 12
43
15 2 6 2 2 2
Irms ⫽ 82 ⫹ a b ⫹a b ⫹a b ⫽ 14.0 A
C 12 12 12
P P 650
pf ⫽ ⫽ ⫽ ⫽ 0.66
S VrmsIrms (70.7)(14.0)
15 2
142 ⫺ a b
I 2rms ⫺ I 21, rms 12
THD ⫽ ⫽ ⫽ 0.86 ⫽ 86%.
I 21, rms 15 2
a b
B
a 12
44
Power semiconductor devices, even diodes, are more complicated in structure and
operational characteristics than their low-power counterparts with which most of us have some
degree of familiarity. The added complexity arises from the modifications made to the simple
low-power devices to make them suitable for high-power applications. These modifications
are essentially generic in nature, that is, the same basic modifications are made to all low-
power semiconductor devices in order to scale up their respective power capabilities. Thus, if
the modifications can be understood in the context of one specific type of device, then it will
be much easier to see the effects of these modifications in the other types of power devices.
Recall that a n-type semiconductor is one in which there are free electrons and the same number
of fixed positive ions. Also recall that a p-type semiconductor is one in which there are fixed
negative ions and the same number of free moving holes.
Consider a crystal, one half of which has p-type impurity added, and the other half has n-type.
Initially the p-type semiconductor has free moving holes, and the n-type has free moving
electrons, hence each region is initially neutral. Because of random movement in nature and due
to the difference in concentration of carriers, some holes will diffuse across to the n-type material.
Likewise some electrons will diffuse across to the p-type material.
The movement of electrons and holes is only restricted to the area immediately around the
junction. Becasue of this some point will be reached when the area of the p-type semiconductor
closest to the junction will have a build-up of electrons repelling the movement of any more
electrons. Similarly, the area of the n-type semiconductor closest to the junction will have a
build up of holes repelling the movement of more holes. These positive and negative charges are
concentrated near the junction and therefore form a potential barrier between the two regions.
Forward Biased Diode : Consider a potential difference applied across the diode, the positive of
the supply connected to the p-type material, and the negative connected to the n-type material.
Once this potential difference is greater than that created by the concentration of holes and
electrons at the junction, the orientation of the magnetic field will produce a drift of holes towards
the n-type conductor and electrons towards the p-type conductor. At the junction, free electrons
and holes will combine. For each combination, at the p-type terminal, an electron is freed and
flows to the supply creating a free hole which moves towards the junction. Similarly at the n-type
terminal an electron enters the region from the supply and moves towards the center junction.With
this in mind a diode is said to be forward biased or conducting when the anode potential is
positive with respect to the cathode. In this state, the diode has a small forward voltage drop
across it. The magnitude of this voltage drop depends on:
1- the manufacturing process and
2- the junction temperature.
Reverse Biased Diode: When the cathode potential is positive with respect to the anode, the
diode is said to be reverse biased. In such a configuration, the holes will be attracted to the
negative electrode, and the electrons will be attracted towards the positive electrode. This will
create an area at the junction void of free holes or electrons. This area is called the depletion layer
in which there are no charge carriers to facilitate current flow.
In practice, due to thermal agitation, some carriers build up sufficient velocity to jump the gap.
This causes a small reverse or leakage current. Since this current is due to the effects of heat, the
higher the temperature, the greater this leagake current will be. In addition, the magnitude of the
reverse current increases in magnitude with reverse voltage until the avalanche or zener voltage is
reached.
The circuit symbol of power diode is shown in Fig. 3.2. It is a two terminal device, and terminal A
is known as the anode whereas terminal K is known as the cathode. If terminal A experiences a
higher potential compared to terminal K, the device is said to be forward biased and a current
called forward current (𝐼𝐹 ) will flow through the device in the direction as shown. This causes a
small volt-age drop across the device (<1 V), which in ideal condition is usually ignored. On the
contrary, when a diode is reverse biased, it does not conduct and a practical diode do experience
a small current flowing in the reverse direction called the leakage current. Both the forward
voltage drop and the leakage current are ignored in an ideal diode. Usually in PE applications a
diode is considered to be an ideal static switch.
Figure 3.2 Power diode (a) symbol ;(b) and (c) types of packaging
46
The characteristics of a practical diode show a departure from the ideals of zero forward
and infinite reverse impedance, as shown in Fig. 3.3a. In the forward direction, a potential barrier
associated with the distribution of charges in the vicinity of the junction, together with other
effects, leads to a voltage drop. This, in the case of silicon, is in the range of 1 V for currents in
the normal range. In reverse, within the normal operating range of voltage, a very small current
flows which is largely independent of the voltage. For practical purposes, the static characteristics
is often represented by Fig. 3.4.
Figure 3.3 𝑣-𝑖 Characteristics of diode Figure 3.4 practical representation of the static
(a) practical (b) ideal characteristic of a power diode
The practical characteristics shown in figure 3.3(a) can be expressed by diode equation,
which is given by:
𝑉𝐷
�𝑛𝑉
𝐼𝐷 = 𝐼𝑠 �𝑒 𝑇 − 1� (3.1)
𝐾𝑇
𝑉𝑇 =
𝑞
Forward-biased Region :In this region, V D > 0. The diode current I D is small if V D is less
than the threshold voltage or cut-in voltage or turn-on voltage written as V TD . This voltage is
small and is usually in the range 0.5V to 0.7V. The diode conducts fully if V D is higher than V TD .
The diode equation can be simplified if V D > 0.1 volts, For V D = 0.1 V, n = 1 and V T = 25.7 mV,
equation 3.1 can be used to obtain the corresponding value of diode current I D .
𝑉𝐷 0.1�
�𝑛𝑉
𝐼𝐷 = 𝐼𝑠 �𝑒 𝑇 − 1� = 𝐼𝑆 �𝑒 (1×0.0257) − 1� = 𝐼𝑆 (48.96 − 1) = 47.96𝐼𝑆
𝑉𝐷
�𝑛𝑉
which can be approximated to 𝐼𝐷 ≈ 𝐼𝑠 �𝑒 𝑇� = 48.96𝐼𝑆 , that is with an error of 2.1%.
For V D > 0.1 volts which is usually the case, 𝐼𝐷 ≫ 𝐼𝑆 Hence the diode equation can be
approximated to within 2.1% error to
𝑉𝐷 𝑉𝐷
�𝑛𝑉 �𝑛𝑉
𝐼𝐷 = 𝐼𝑠 �𝑒 𝑇 − 1� ≈ 𝐼𝑠 �𝑒 𝑇� (3.2)
Reverse-biased Region In this region, V D < 0 volts and if |V D | >> V T , or in other words if the
magnitude of the diode voltage is much greater than the threshold voltage (which is generally the
case), the exponential term in equation 3.1 becomes very small compared to unity and the diode
current I D can be written as:
−|𝑉𝐷 |
�𝑛𝑉
𝐼𝐷 = 𝐼𝑠 �𝑒 𝑇 − 1� ≈ −𝐼𝑆 (3.3)
which indicates that the diode current in the reverse direction is constant and equal to I S .
48
Breakdown Region: When the reverse voltage exceeds the breakdown voltage V BR , the diode is
said to be in the breakdown region. In this region, the reverse current increases rapidly for small
increases in reverse voltage beyond V BR . Diode operation in the breakdown region is not
destructive, provided that the power dissipation is within a safe level as specified by the
manufacturer. It is generally advisable to implement circuitry which will limit the reverse current
in the breakdown region. This is because in this region, although it may be a non-destructive
region, it should be noted that the slightest change in V D would cause a large change in I D which
could damage the device.
The forward drop of a power diode is 𝑉𝐷 = 1.2 𝑉 at 𝐼𝐷 = 300𝐴 .Assume that n=2 and 𝑉𝑇 =
25.7 𝑚𝑉 , find the reverse saturation current 𝐼𝑆 .
-Solution
Applying Eq.(3.1) , we can find the leakage (or saturation ) current 𝐼𝑆 from
1.2�
300 = 𝐼𝑆 �𝑒 (2×25.7×10−3 − 1�
The current in a forward-biased junction diode is made up of Majority carriers and Minority
carriers. Once there is a forward current, there will be free minority carriers. A forward
conducting diode whose forward current has been reduced to zero, will continue to conduct for
some small time after due to minority carriers stored in the pn-junction and carriers stored in the
bulk semiconductor material.
The forward current in a diode goes to zero if the diode goes from forward biased to reverse
biased, or in other words V goes from +ve to -ve. According to the characteristics of a diode,
ignoring the leakage current, when reverse biased there should be no reverse current once the
reverse voltage does not exceed in magnitude to the breakdown voltage. However, in practice, the
diode does exhibit a reverse characteristic for a short space of time due to the free carriers. These
minority carriers require some finite time, the reverse recovery time, to recombine with opposite
charges in order to be neutralized. This time is called the reverse recovery time.
Two reverse recovery characteristics exists .They are : 1-Soft recovery which is the more
common 2-Abrupt recovery as shown in Figure 3.5
49
The reverse recovery time is donated as t rr and is measured as the time between the initial zero
crossing of the diode current to the time when this current reaches 25% of the peak reverse current
𝐼𝑅𝑅 . The t rr consists of two components (1) Variable t a is due to the charge stored in the
depletion region of the junction and represents the time between zero crossing and the maximum
reverse current 𝐼𝑅𝑅 .(2) t b is due to charge stored in the bulk semiconductor material and
represents the time time between maximum reverse current IRR and 25% of the of the maximum
reverse current IRR , The ratio 𝑡𝑏 /𝑡𝑎 is known as the softness factor (SF). Diodes with abrupt
recovery characteristics are used for high frequency switching.
𝑡𝑟𝑟 = 𝑡𝑎 + 𝑡𝑏 (3.4)
2𝑄𝑅𝑅
𝐼𝑅𝑅 ≅
𝑡𝑟𝑟
(3.7)
50
2𝑄𝑅𝑅
𝑡𝑟𝑟 𝑡𝑎 =
𝑑𝑖/𝑑𝑡
(3.8)
If 𝑡𝑏 is negligible as compared to 𝑡𝑎 , which is usually the case , 𝑡𝑟𝑟 ≈ 𝑡𝑎 and Eq.(3.8) becomes
2𝑄𝑅𝑅
𝑡𝑟𝑟 = �
𝑑𝑖/𝑑𝑡
and (3.9)
𝑑𝑖
𝐼𝑅𝑅 = �2𝑄𝑅𝑅
𝑑𝑡
(3.10)
It can be noticed from Eq.(3.9) and (3.10) that the reverse recovery time and the peak reverse
current depend on the storage charge QRR and the reverse (or reapplied) di/dt .the storage charge
is dependent on the forward current . In practice, a design engineer frequently needs to calculate
the reverse recovery time. This is in order to evaluate the possibility of high frequency switching.
As a thumb rule, the lower trr the faster the diode can be switched.
The reverse recovery time of a diode is 𝑡𝑟𝑟 = 3𝜇𝑠 and the rate of fall of the diode current is
di/dt=30 A/ 𝜇𝑠 . determine (a) the storage charge 𝑄𝑅𝑅 . And (b) the peak reverse current 𝐼𝑅𝑅 .
1 𝑑𝑖2
(a) From Eq.(3.9) 𝑄𝑅𝑅 = 2 𝑑𝑡 𝑡𝑟𝑟 = .5 × 30 A/ 𝜇𝑠 × (3 × 10−6 )2 = 135 𝜇𝐶
𝑑𝑖
(b) From Eq (3.10) 𝐼𝑅𝑅 = �2𝑄𝑅𝑅 = √2 × 135 × 10−6 × 30 × 10−6 = 90 𝐴
𝑑𝑡
51
Let us consider two series-connected diodes as shown in Fig. 4.1a. In practice, the
v-i characteristics for the same type of diodes differ due to tolerances in the production
process. Figure 4.2b shows two v-i characteristics for such diodes. In the forward-biased
condition, both diodes conduct the same amount of current and forward voltage drop
of each diode would be almost equal. However, in the reverse blocking condition, each
diode has to carry the same leakage current, and as a result the blocking voltages of
diodes would differ significantly.
A simple solution to this problem, as shown in Fig. 4.2 a, is to force equal voltage
sharing by connecting a resistor across each diode. Due to equal voltage sharing, the
leakage current of each diode would be different and this is shown in Fig. 4.2b. Since the
total leakage current must be shared by a diode and its resistor,
Eq.(4.1) gives the relationship between R1 and R2 for equal voltage sharing as
𝑉𝐷1 𝑉𝐷1
𝐼𝑠1 + 𝑅1
= 𝐼𝑠2 + 𝑅2
(4.2)
If the resistances are equal, 𝑅 = 𝑅1 = 𝑅2 and the two diode voltages would be different
slightly depending on the dissimilarities of the two v-i characteristics. The values of can
be determined from Eqs. (4.3) and (4.4):
𝑉𝐷1 𝑉𝐷2
𝐼𝑠1 + = 𝐼𝑠2 + (4.3)
𝑅 𝑅
The voltage sharings under transient conditions (e.g., due to switching loads, initial applications of
input voltage) are accomplished by connecting capacitors across each diode, which is shown in
Fig. 4 . 3 . Rs limits the rate of rise of the blocking voltage.
54
Two diodes are connected in series, shown in Figure 4.2a to share a total dc reverse voltage of VD =5 k V .
The reverse leakage currents. of the two diodes are 𝐼𝑆1 =30 mA and 𝐼𝑆2 = 35 m A.
(a)Find the diode voltages if the vol tage -sharing resistances are equal 𝑅1 = 𝑅2 = 𝑅 = 100 𝑘Ω.
𝑉𝐷�
(b)Find the voltage –sharing resistances R 1 and R 2 if the diode voltages are
1 equal, 𝑉𝐷1 = 𝑉𝐷2 = 2.
Solution
𝑉𝐷1 𝑉𝐷2
(a) From Eq.(4.3) 30𝑚𝐴 + = 35𝑚𝐴 +
100𝑘Ω 100𝑘Ω
Solving the two equation gives 𝑉𝐷1 = 2.75 𝑘𝑉 𝑎𝑛𝑑 𝑉𝐷2 = 2.25 𝑘𝑉
(b) now we need 𝑉𝐷1 = 𝑉𝐷2 = 𝑉𝐷�2 = 2.5𝑘𝑉 ,by applying Eq.(4.3)
2.5𝑘𝑉 2.5𝑘𝑉
30𝑚𝐴 + = 35𝑚𝐴 +
𝑅1 𝑅2
The resistors of Figure 4.4a help current sharing under steady-state conditions.
Current sharin g under dynamic conditions can be accomplished by connecting coupled
inductors as shown in Figure 4.4b. If the current th rough D1 rises, the L di/dt across L1
increases, and a corresponding voltage of opposite polarity is induced across inductor L 2 .
The result is a low-im pedance path through diode D2 and the current is shifted to D2.
55
The circuit operation can be divided into two modes. Mode1begins when switch 𝑆1 is
close at t=0 and mode 2 begins when the switch is opened. The equivalent circuits for the
modes are shown in Figure 4.7a with 𝑡1 𝑎𝑛𝑑 𝑡2 the durations of the mode 1 and mode 2
respectively .
57
58
Mode 1.. During t his mode switch S1 is closed a t t = 0. Diode D1 is reversed biased
and the current through the diode (secondary curren t ) is 𝑎𝑖2 = 0 𝑜𝑟 𝑖2 = 0. Using the
KVL in Figure 4.7a for mode 1 𝑉𝑠 = (𝑣𝐷 − 𝑉𝑠 )/a , and this gives the reverse diode voltage
as
𝑣𝐷 = 𝑉𝑠 (1 + 𝑎) (4.5)
Assuming that there is no initial current in the circuit, the primary current is the same as the
switch current 𝑖𝑆 and is expressed as
𝑑𝑖1
𝑉𝑠 = 𝐿𝑚
𝑑𝑡
(4.6)
Which gives
𝑉𝑆
𝑖1 (𝑡) = 𝑖𝑆 (𝑡) = 𝑡 𝑓𝑜𝑟 0 ≤ 𝑡 ≤ 𝑡1
𝐿𝑚
(4.7)
This mode is valid for 0 ≤ 𝑡 ≤ 𝑡1 and ends when the switch is opened at 𝑡 = 𝑡1 .At the end of
this mode the primary current becomes
𝑉𝑆
𝐼𝑜 = 𝑡
𝐿𝑚 1
(4.8)
Mode 2. During this mode the switch is opened, the voltage across the inductor is reversed, and
the diode 𝐷1 is forward biased. A current flows through the source. using the KVL and
redefining the time origin at the beginning of this mode, the primary current is expressed as
𝑑𝑖1 𝑉𝑠
𝐿𝑚 + =0
𝑑𝑡 𝑎
(4.9)
Mode 2 is valid for 0 ≤ 𝑡 ≤ 𝑡2 . At the end of this mode at 𝑡 = 𝑡2 , all the energy stored in the
inductor 𝐿𝑚 is returned to the source. The various waveforms for the currents and voltages are
shown in Figure 4.7b for 𝑎 = 10/6.
59
For the energy recovery circuit of Figure 4.6a, the magnetizing inductance of the transformer is
𝐿𝑚 = 250𝜇𝐻 , 𝑁1 = 10 𝑎𝑛𝑑 𝑁2 = 100. The leakage inductance and resistance of the
transformer are negligible. The source voltage is 𝑉𝑆 = 220 𝑉 and there is no initial current in the
circuit. If switch 𝑆1 is closed for a time 𝑡1 = 50 𝜇𝑠 and is then opened , (a) determine the reverse
voltage of diode 𝐷1, (b) calculate the peak value of primary current , (C) calculate the peak value
of secondary current , (d) determine the conduction time of 𝐷1 . And € determine the energy
supplied by the source .
har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 65
60
5.1Resistive load
Creating a DC Component Using an Electronic Switch
A basic half-wave rectifier with a resistive load is shown in Fig. 5-1a. The source is ac, and the objective is
to create a load voltage that has a nonzero dc component. The diode is a basic electronic switch that allows
current in one direction only. For the positive half-cycle of the source in this circuit, the diode is on forward
biased.
Vm
vs
π 2π ωt
vd
+ − −Vm
i Vm
+ +
vs = Vm sin (ω t) R vo
− − vo
π 2π ωt
..
(a) .
vd
π 2π ωt
−Vm
(b)
Figure 5-1 (a) Half-wave rectifier with resistive load; b) Voltage waveforms
Considering the diode to be ideal, the voltage across a forward-biased diode is zero and the current is
positive.
For the negative half-cycle of the source, the diode is reverse-biased, mak-ing the current zero. The
voltage across the reverse-biased diode is the source voltage, which has a negative value.
har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 66
61
The voltage waveforms across the source, load, and diode are shown in Fig. 5-1b. Note that the
units on the horizontal axis are in terms of angle (t). This representation is useful because the values are
independent of frequency.
The dc component Vo of the output voltage is the average value of a half-wave rectified sinusoi
1 Vm
Vo Vavg Vm sin(t)d(t) (5-1)
2 L
0
The dc component of the current for the purely resistive load is
V V
Io o m (5-2)
R R
Average power absorbed by the resistor in Fig. 3-1a can be computed from
P I2rmsR V2rmsR. When the voltage and current are half-wave rectified sine waves
1 V
Vrms [V sin (t)]2 d(t) m
E 2 L m 2
0 (5-3)
Vm
Irms
2R
In the preceding discussion, the diode was assumed to be ideal. For a real diode, the diode voltage
drop will cause the load voltage and current to be reduced, but not appreciably if Vm is large. For
circuits that have voltages much larger than the typical diode drop, the improved diode model may have
only second-order effects on the load voltage and current computations.
8-The output voltage consists of two components an ac component and a dc component. The
effective or (rms) value of the ac component of output voltage is given by
2 − 𝑉2
𝑉𝑎𝑐 = �𝑉𝑟𝑚𝑠 𝑑𝑐
(5-6)
9-The form factor which is a measure of the shape of the output voltage is given by
𝑉𝑟𝑚𝑠
𝐹𝐹 =
𝑉𝑑𝑐
(5-7)
2 2
𝑉𝑎𝑐 �𝑉𝑟𝑚𝑠 − 𝑉𝑑𝑐 𝑉𝑟𝑚𝑠 2
𝑅𝐹 = = = �� � − 1 = �𝐹𝐹 2 − 1
𝑉𝑑𝑐 𝑉𝑑𝑐 𝑉𝑑𝑐
(5-8)
where Vs and Is are the rms voltage and rms current of the transformer secondary respectively.
Consider the waveforms in figure 5.2 , 𝑉𝑆 is the sinusoidal input voltage , 𝑖𝑠 is the
instantaneous input current and 𝑖𝑆1 is the fundamental component of 𝑖𝑆 .
63
12-The displacement angle ∅1 is the angle between fundamental components of input current and
voltage .
14-The total harmonic distortion (THD) is a measure of the distortion of a waveform, given as
𝐼2 − 𝐼2 𝐼2
𝑇𝐻𝐷𝑖 = � 𝑆 2 𝑆1 = � 2𝑆 − 1
𝐼𝑆1 𝐼𝑆1
(5-11)
𝑉2 − 𝑉2 𝑉2
𝑇𝐻𝐷𝑣 = � 𝑆 2 𝑆1 = � 𝑆2 − 1
𝑉𝑆1 𝑉𝑆1
(5-12)
16-The crest factor is a comparison of the peak input current to its rms value. It is given as
𝐼𝑠−𝑝𝑒𝑎𝑘
𝐶𝐹 =
𝐼𝑆
(5-14)
Note that for an ideal rectifier should have ή = 100%, Vac = 0, RF = 0, TUF = 1, THD =0, and
PF= 1.
EXAMPLE 5-1
(b) From Eq. (3-3), the rms voltage across the resistor for a half-wave rectified sinusoid i
Vm 22(120)
Vrms 84.9 V
2 2
The power absorbed by the resistor is
2
V rms 84.9 2
P 1440 W
R 5
The rms current in the resistor is Vm (2R) 17.0 A, and the power could also be
calculated from I2rmsR (17.0)2(5) 1440 W.
(c) The power factor is
P P 1440
pf 0.707
S Vs, rms Is, rms (120)(17)
EXAMPLE 5-2
SOLUTION
1 𝜋 𝑉𝑚 𝑉𝑑𝑐 𝑉𝑚
𝑉𝑑𝑐 = � 𝑉𝑚 sin(𝜔𝑡) 𝑑𝜔𝑡 = 𝐼𝑑𝑐 = =
2𝜋 0 𝜋 𝑅 𝜋𝑅
1 𝜋 𝑉𝑚 𝑉𝑚
𝑉𝑟𝑚𝑠 = � � (𝑉𝑚 sin 𝜔𝑡)2 = 𝐼𝑟𝑚𝑠 =
2𝜋 0 2 2𝑅
𝑉𝑚 𝑉𝑚
𝑃𝑑𝑐 𝑉𝑑𝑐 𝐼𝑑𝑐 ∗
(𝑎) ή = = = 𝜋 𝜋𝑅 = 40.53%
𝑃𝑎𝑐 𝑉𝑟𝑚𝑠 𝐼𝑟𝑚𝑠 𝑉𝑚 ∗ 𝑉𝑚
2 2𝑅
𝑉𝑚�
𝑉𝑟𝑚𝑠 2 = 𝜋 = 1.57
(𝑏) 𝐹𝐹 = =
𝑉𝑑𝑐 𝑉𝑚� 2
𝜋
𝑉𝑎𝑐
(𝑐) 𝑅𝐹 =
𝑉𝑑𝑐
= √𝐹𝐹 2 − 1 = √1.572 − 1 = 1.211
(d) The peak inverse voltage is the peak reverse voltage seen by the diode and is equal to 𝑉𝑚 .
65
The rms value of the transformer secondary current is the same as the rms value of the
load current
0.5𝑉𝑚
𝐼𝑠 = 𝐼𝑟𝑚𝑠 =
𝑅
𝑉𝑑𝑐 𝐼𝑑𝑐
Transformer utilization factor 𝑈𝐹 = 𝑉𝑠 𝐼𝑠
, Note: VsIs = Volt-ampere rating (VA) of the
transformer.
(0.318𝑉𝑚 )2 × 𝑅
𝑇𝑈𝐹 = = 0.286
𝑅 × 0.707𝑉𝑚 × 0.5𝑉𝑚
𝑃𝑎𝑐 0.52
(𝑓) 𝑃𝐹 = = = 0.707
𝑉𝐴 0.707 × 0.5
𝑉𝑚�
𝐼𝑆−𝑝𝑒𝑎𝑘 𝑅 =2
(𝑔) 𝐶𝐹 = =
𝐼𝑆 0.5𝑉𝑚�
𝑅
A simple diode circuit containing a current limiting resistance R can be used to charge a battery of
emf E from a single-phase supply (Fig. 5.4a). The battery opposes the unidirectional flow of
current so that the net driving voltage is 𝑣𝑠 − 𝐸 . Neglecting any voltage drop on the diode (which
is likely to be of the order 1–2 V) the current is therefore
𝛽
𝑣𝑠 − 𝐸 1
𝑖𝐿 = = (𝑉𝑚 sin 𝜔𝑡 − 𝐸)�
𝑅 𝑅 𝛼
(5-15)
66
where α and 𝛽 define the current pulse in Fig.5-4. Current flows only in the positive voltage
direction when 𝑣𝑆 − 𝐸 > 0. Angles α and 𝛽 are defined by
𝐸
𝑉𝑆 − 𝐸 = 𝑉𝑚 sin 𝛼 = 0 𝑡ℎ𝑒𝑟𝑒𝑓𝑜𝑟𝑒, 𝛼 = sin−1
𝑉𝑚
(5-16)
1 2𝜋
𝐼𝑑𝑐 = � 𝑖 (𝜔𝑡)𝑑𝜔𝑡
2𝜋 0 𝐿
Substituting Eq. (5-15) into the above defining integral expression gives
𝛽
1 1
𝐼𝑑𝑐 = � (𝑉𝑚 sin 𝜔𝑡 − 𝐸) 𝑑𝜔𝑡 = [2𝑉 cos 𝛼 + 𝐸(2𝛼 − 𝜋)]
2𝜋𝑅 𝛼 2𝜋𝑅 𝑚
(5-17)
67
Note that 𝛼 in Eq.(5-17) must be substituted in radians .A relevant numerical calculation is given
in Example 5-3 .
EXAMPLE 5-3
An ideal single-phase source, 120 Vrms, 60 Hz, supplies power to a 12V , 100Wh battery via a
single ideal diode through a transformer with turns ratio a=2. If the average current = 5A find (a)
the charge period 𝛿 , (b) value of R , (c) the power rated for the resistor ,(d) power in battery ,and
(e) efficiency .
12
(a) from Eq(5-16) 𝛼 = sin−1 � 2×60
� = 8.13° = .1419 𝑟𝑎𝑑
√
1
5= �2 × √2 × 60 × cos 8.13° + 12 × (.1419 − 𝜋)� → 𝑅 = 4.26 Ω
2𝜋𝑅
(c) the power rated for the resister
1 𝜋−𝛼 𝑉𝑚 sin 𝜔𝑡 − 𝐸 2
𝐼𝑟𝑚𝑠 =� � � � 𝑑𝜔𝑡
2𝜋 𝛼 𝑅
You can solve this integral by a scientific calculator (e.g casio fx-991ES ) assuming
“𝜔𝑡" as one variable with unit of radian which is the same unit of integral’s limits .
(e) efficiency : 𝑤ℎ𝑖𝑐ℎ 𝑖𝑠 𝑡ℎ𝑒 𝑟𝑎𝑡𝑖𝑜 𝑜𝑓 𝑢𝑠𝑒𝑓𝑢𝑙 𝑝𝑜𝑤𝑒𝑟 𝑃𝐸 𝑡𝑜 𝑡ℎ𝑒 𝑝𝑜𝑤𝑒𝑟 𝑜𝑓 𝑡ℎ𝑒 𝑠𝑜𝑢𝑟𝑐𝑒 (𝑃𝐸 + 𝑃𝑅 )
𝑃𝐸 60
ή= = = 17.32%
𝑃𝐸 + 𝑃𝑅 60 + 286.4
har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 67
68
Industrial loads typically contain inductance as well as resistance. As the source voltage
goes through zero, becoming positive in the circuit of Fig. 6-1a, the diode becomes forward-
biased. The Kirchhoff voltage law equation that describes the current in the circuit for the
forward-biased ideal diode is
di(t)
Vm sin(t) Ri(t) L (6-1)
dt
The solution can be obtained by expressing the current as the sum of the
forced response and the natural response:
i(t) i f (t) i n(t) (6-2)
Vm
vs, io 0 ωt
π β 2π
vo 0 ωt
π β 2π
ωt
vR 0
π β 2π
vL 0 ωt
vd π β 2π
+ −
+
i
+
R vR
− v ωt
o
0
+ + π β 2π
vs = Vm sin(ωt) vd
− L vL
−
− -Vm
(a) (b)
69
The forced response for this circuit is the current that exists after the natural response has
decayed to zero. In this case, the forced response is the steady-state sinusoidal current that
would exist in the circuit if the diode were not present. This steady-state current can be found
from phasor analysis, resulting in
Vm
i f (t) sin (t ) (6-3)
Z
L
where Z 2R2 (L)2 and tan 1 a b
R
The natural response is the transient that occurs when the load is energized. It is the solution
to the homogeneous differential equation for the circuit without the source or diode:
di(t)
R i(t) L 0 (6-4)
dt
For this first-order circuit, the natural response has the for
i n(t) Ae t>
(6-5)
where
is the time constant L/R and A is a constant that is determined from the initial condition
Adding the forced and natural responses gets the complete solution.
Vm
i(t) i f (t) i n(t) sin(t ) Ae t>
(6-6)
Z
The constant A is evaluated by using the initial condition for current. The initial
condition of current in the inductor is zero because it was zero before the diode started
conducting and it cannot change instantaneously.
Using the initial condition and Eq. (6-6) to evaluate A yields
Vm
i(0) sin(0 ) Ae0 0
Z
(6-7)
V V
A m sin( ) m sin
Z Z
Substituting for A in Eq. (6-6) gives
Vm V
i(t) sin (t ) m sin () e t>
Z Z
(6-8)
m Csin (t ) sin () e t>
D
V
Z
It is often convenient to write the function in terms of the angle t rather than time. This
merely requires t to be the variable instead of t. To write the above equation in terms of
angle, t in the exponential must be written as t, which requires
to be multiplied by also.
The result is
70
A typical graph of circuit current is shown in Fig. 6-12. Equation (6-9) is valid for positive
currents only because of the diode in the circuit, so current is zero when the function in Eq.
(6-9) is negative. When the source voltage again becomes positive, the diode turns on, and the
positive part of the waveform in Fig. 6-1b is repeated. This occurs at every positive half-cycle of
the source. The voltage waveforms for each element are shown in Fig. 6-1b.
Note that the diode remains forward-biased longer than rad and that the source is negative
for the last part of the conduction interval. This may seem unusual, but an examination of the
voltages reveals that Kirchhoff’s voltage law is satisfied and there is no contradiction. Also note
that the inductor voltage is negative when the current is decreasing (vL L d idt).
The point when the current reaches zero in Eq. (6-9) occurs when the diode turns off. The firs
positive value of t in Eq. (6-9) that results in zero current is called the extinction angle
Substituting t in Eq. (6-9), the equation that must be solved is
There is no closed-form solution for , and some numerical method is required by using a
scientific calculator or Figure 6-2 (sin α = 0) , more on (sin α) later
har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 70
71
To summarize, the current in the half-wave rectifier circuit with RL load (Fig. 6-1) is expressed as
L L
where Z 2R2 (L)2 tan 1 a b and
R R
2
1 1
Irms i 2(t) d(t) i 2(t) d(t) (6-13)
F 2 L F 2 L
0 0
Average current is
1
Io i(t) d(t) (6-14)
2 L
0
EXAMPLE 6-1
■ Solution
For the parameters given,
Z [R2 (L)2]0.5 106.9
tan 1(LR) 20.7
0.361 rad
t LR 0.377 rad
a) Equation (6-12) for current becomes)
i(t) 0.936 sin(t 0.361) 0.331e t>0.377 A for 0 t
Beta is found from Eq. 6-11
sin( 0.361) sin(0.361) e >0.377 0
Using a numerical root-finding program, is found to be 3.50 rad, or 201
(b) Average current is determined from Eq. (6-14).
3.50
72
[100 sin (t)] C 0.936 sin (t 0.361) 0.331e t>0.377 D d(t)
1
2 L
0
22.4 W
(e) The power factor is computed from the definition pf PS, and P is power
supplied by the source, which must be the same as that absorbed by the load.
P P 22.4
pf 0.67
S Vs, rms Irms A100> 12B 0.474
6.2RL-SOURCE LOAD
Supplying Power to a DC Source from an AC Source
Another variation of the half-wave rectifier is sh wn in Fig. 3-5a. The load consists of a
resistance, an inductance, and a dc voltage. Starting the analysis at t 0 and assuming the
initial current is zero, recognize that the diode will remain off as long as the voltage of the
ac source is less than the dc voltage. Letting be the value of t that causes the source
voltage to be equal to Vdc,
Vm sin Vdc
or
Vdc
sin 1 a b (6-15)
Vm
har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 76
73
R L
i +
Vm sin(ωt) + Vdc
− −
(a)
R L R
ifac ifdc +
Vm sin(ωt) +
Vdc
− −
(b) (c)
vs
Vdc
α π β 2π ωt
(d)
Figure 6-3 (a) Half-wave rectifier wit RL source load; (b) Circuit
for forced responce from ac source; (c) Circuit for forced
.responce from dc source; (d) Waveforms
The diode starts to conduct at t . With the diode conducting, Kirchhoff’s voltage law for
the circuit yields the equation
di(t)
Vm sin(t) Ri(t) L Vdc (6-16)
dt
Total current is determined by summing the forced and natural responses:
i(t) if (t) in(t)
The current if (t) is determined using superposition for the two sources. The forced response
from the ac source (Fig. 6-3b) is (Vm/Z) sin(t ). The forced response due to the dc
source (Fig. 6-3c) is Vdc/R. The entire forced response is
Vm V
if (t) sin(t ) dc (6-17)
Z R
har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 77
74
i n(t) Ae t>
(6-18)
Adding the forced and natural responses gives the complete response.
Vm V
sin (t ) dc Ae t>
for t
Z R
i(t) d (6-19)
0 otherwise
The extinction angle is defin d as the angle at which the current reaches zero, as was done earlier
in ,Eq. (6-12). Using the initial condition of i() 0 and solving for A
Vm V
A c sin( ) dc d e >
(6-20)
Z R
Figure 6-3d shows voltage and current waveforms for a half-wave rectif er with RL-source load.
The average power absorbed by the resistor is I2rmsR, where
1
Irms i 2(t) d(t) (6-21)
E 2 L
75
EXAMPLE 6-2
■ Solution
From the parameters given,
Vm 120 12 169.7 V
Z [R2 (L)2]0.5 7.80
tan 1(LR) 1.31 rad
sin 1(100169.7) 36.1
0.630 rad
377(0.022) 3.77 rad
(a) Using Eq. (6-18)
i(t) 21.8 sin(t 1.31) 50 75.3e t>3.77 A
The extinction angle is found from the solution of
i( ) 21.8 sin ( 1.31) 50 75.3e >3.77 0
which results in 3.37 rad (193
) using root-finding software
b) Using the preceding expression for i(t) in Eq. (6-41) and using a numerical)
integration program, the rms current is
3.37
1
Irms i 2(t)d(t) 3.98 A
E 2 L
0.63
resulting in
PR I 2rms R 3.982(2) 31.7 W
(c) The power absorbed by the dc source is IoVdc. Using Eq. (6-23)
3.37
1
Io i(t)d(t) 2.25 A
2 L
0.63
yielding
Pdc IoVdc (2.25)(100) 225 W
(d) The power supplied by the ac source is the sum of the powers absorbed by the load.
Ps PR Pdc 31.2 225 256 W
The power factor is
P P 256
pf 0.54
S Vs, rms Irms (120)(3.98)
har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 81
76
+ io
i D2 R
vs = Vm sin(ωt) +
D2 vo
−
L
−
(a)
+ io + io
R R
+
vs vo = vs vo = 0
−
L L
− −
(b) (c)
Since the voltage across the RL load is the same as the source voltage when the source is
positive and is zero when the source is negative, the load voltage is a half-wave rectified sine
wave.
har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 82
77
When the circuit is first energized, the load current is zero and cannot change
instantaneously. The current reaches periodic steady state after a few periods (depending on the
L/R time constant), which means that the current at the end of a period is the same as the current
at the beginning of the period, as shown in Fig. 6-5. The steady-state current is usually of
greater interest than the transient that occurs when the circuit is first energized. Steady-state
.load, source, and diode currents are shown in Fig. 6-6
The Fourier series for ht e half-wave rectified sine wave for the voltage across the load is
Vm Vm q
2Vm
v(t) sin (0t) a 2 cos (n0t) (6-26)
2 n2,4,6 Á (n 1)
The current in the load can be expressed as a Fourier series by using superposition, taking each
frequency separately. The Fourier series method is illustrated in Example 6-3
vo
io
0 π 2π ωt
iD1
t
Figure 6-5 0 π 2π ωt
Load current reaching steady state after
the circuit is energized
iD2
0 π 2π ωt
Figure 6-6
Figure 3-9 Steady-state load voltage and current
waveforms with freewheeling diode.
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78
EXAMPLE 6-3
■ Solution
The Fourier series for this half-wave rectifi d voltage that appears across the load is obtained from Eq. (6-26)
The average load voltage is the dc term in the Fourier series
Vm 100
Vo 31.8 V
Average load current is
Vo 31.8
Io 15.9 A
R 2
Load power can be determined from I2rmsR, and rms current is determined from the Fourier components of
current. The amplitudes of the ac c urrent components are determined from phasor analysis
Vn
In
Zn
where Zn ƒ R jn0 L ƒ ƒ 2 jn377(0.025) ƒ
The ac voltage amplitudes are determined from Eq. (6-26), resulting in
Vm 100
V1 50 V
2 2
2V
V2 2 m 21.2 V
(2 1)
2V
V4 2 m 4.24 V
(4 1)
2V
V6 2 m 1.82 V
(6 1)
The resulting Fourier terms are as follows:
Irms a Ik,rms L
A k0 C 12 12 12
Notice that the contribution to rms current from the harmonics decreases as n increases, and higher-
order .terms are not significant. Power in the resistor i I2rmsR (16.34)22 534
har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 86
79
Vo V L
i o(t) L Io m : q (6-26)
R R R
A large inductor (L/R W T) with a freewheeling diode provides a means of estab-lishing a nearly
constant load current. Zero-to-peak f uctuation in load current can be estimated as being equal to the
amplitude of the first a c term in the Fourier series. The peak-to-peak ripple is then
Io L 2I1 (6-27)
EXAMPLE 6-4
■ Solution
(a) The voltage across the RL load is a half-wave rectified sine wave, which has a
average value of Vm . The load current is
Vo Vm> A2402 2 B >
i(t) Io 13.5 A L Irms
R R 8
Power in the resistor is
P (Irms)2R (13.5)28 1459 W
Source rms current is computed from
1
Is, rms (13.5)2 d(t) 9.55 A
E 2 L
0
The power factor is
P 1459
pf 0.637
Vs, rms Is, rms (240)(9.55)
har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 87
80
vc
√2 (240) V
ic
13.5 Α
0
π 2π
13.5 Α iD1
0
iD2
13.5 Α
0
Figure 6-7 Waveforms for the half-wave rectifier wit
freewheeling diode of Example 3-8 with L/R → .
Since the 8- resistance is negligible compared to the total impedance, the
inductance can be approximated as
Z1 251
L L 0.67 H
377
The inductance will have to be slightly larger than 0.67 H because Fourier terms
higher than n 1 were neglected in this estimate.
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81
Assuming the capacitor is initially uncharged and the circuit is energized at t 0, the diode
becomes forward-biased as the source becomes positive. With the diode on, the output voltage is
the same as the source voltage, and the capacitor charges.
The capacitor is charged to Vm when the input voltage reaches its positive peak at t /2
As the source decreases after t /2, the capacitor discharges into the load resistor. At
some point, the voltage of the source becomes less than the output voltage, reverse-biasing the
diode and isolating the load from the source. The output voltage is a decaying exponential with time
constant RC while the diode is off. The point when the diode turns off is determined by comparing
the rates of change of the source and the capacitor voltages. The diode turns off when the
downward rate of change of the source exceeds that permitted by the time con-stant of the RC
load.
iC iR +
iD
+ vo
vs = Vm sin(ωt) C R
−
−
(a)
Vm
Vθ
vo ΔVo
vs
pθ 2π 2π + α
2
α
vs
(b)
Figure 6-8 (a) Half-wave rectifier with RC load; (b) Input and
output voltages
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82
The angle t is the point when the diode turns off in Fig. 6-8b. The output voltage is
described by
Vm sin t diode on
vo(t) c (6-28)
Ve (t )>RC diode off
When the source voltage comes back up to the value of the output voltage in the next period,
the diode becomes forward-biased, and the output again is the same as the source voltage. The
angle at which the diode turns on in the second period, t 2 , is the point when the
sinusoidal source reaches the same value as the decaying exponential output:
83
or
The current in the resistor is calculated from iR voR. The current in the capacitor is
calculated from
dvo(t)
i C (t) C
dt
which can also be expressed, using t as the variable, as
dvo(t)
i C (t) C
d(t)
har80679_ch03_065-110.qxd 12/17/09 2:09 PM Page 91
84
Vm sin(2t ) Vm sin
i R (2t ) (6-38)
R R
Peak diode current is
Vm sin sin
ID, peak CVm cos Vm aC cos b (6-39)
R R
The effectiveness of the capacitor f lter is determined by the variation in output voltage.
This may be expressed as the difference between the maximum and minimum output
voltage, which is the peak-to-peak ripple voltage. For the half-wave rectifier of Fig. 6-8a
the maximum output voltage is Vm.
The minimum output voltage occurs at t 2 + , which can be computed from Vm sin .
The peak-to-peak ripple for the circuit of Fig. 6-8a is expressed as
In circuits where the capacitor is selected to provide for a nearly constant dc output voltage, the
.RC time constant is large compared to the period of the sine wave, and Eq. (6-33) applies
Moreover, the diode turns on close to the peak of the sine wave when L /2. The change in
output voltage when the diode is off is described in Eq.(6-28). In Eq. (6-28), if V L Vm and L
/2, then Eq. 6-28 evaluated at /2 is
85
Furthermore, the exponential in the above equation can be approximated by the series expansion:
2
e 2>RC L 1
RC
Substituting for the exponential in Eq. (3-50), the peak-to-peak ripple is approximately
2 V
Vo L Vm a b m (6-42)
RC f RC
The output voltage ripple is reduced by increasing the filter capacitor C. As C increases, the
conduction interval for the diode decreases. Therefore, increasing the capacitance to reduce the
output voltage ripple results in a larger peak diode current.
EXAMPLE 6-5
■ Solution
From the parameters given,
Vm 12022 169.7 V
RC (260)(500)(10) 6 18.85 rad
87
7.1 INTRODUCTION
The objective of a full-wave rectifier is to produce a voltage or current that is purely dc or has some
specified dc component. While the purpose of the full-wave rectifie is basically the same as that of the
half-wave rectifier, full-wave rectifier have some fundamental advantages. The average current in the
ac source is zero in the full-wave rectifier, thus avoiding problems associated with nonzero average
source currents, particularly in transformers. The output of the full-wave rectifier has inherently les
ripple than the half-wave rectifier.
In this chapter, uncontrolled single-phase and three-phase full-wave converters used as rectifier
are analyzed for various types of loads.
1. Kirchhoff’s voltage law shows that only one diode can conduct at a time.
Load current can be positive or zero but never negative.
2. The output voltage is vs1 when D1 conducts and is vs2 when D2 conducts.
The transformer secondary voltages are related to the source voltage by vs1
vs2 vs( N2/2N1).
3. Kirchhoff’s voltage law around the transformer secondary windings, D1, and
D2 shows that the maximum voltage across a reverse-biased diode is twice
the peak value of the load voltage.
4. Current in each half of the transformer secondary is reflected to the primar ,
resulting in an average source current of zero.
5. The transformer provides electrical isolation between the source and the
load.
6. The fundamental frequency of the output voltage is 2 since two periods of
the output occur for every period of the input.
The lower peak diode voltage in the bridge rectifier makes it more suitable
for high-voltage applications. The center-tapped transformer rectifie , in addition
to including electrical isolation, has only one diode voltage drop between the
source and load, making it desirable for low-voltage, high-current applications.
har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 112
88
N1 : N2 D1
+
vS1 io
vs + –
− + – vo +
vS2
–
D2
(a)
vs
Vm
0
π 2π 3π 4π ωt
–Vm
vo
Vm
vD1
0
–2Vm
vD2
–2Vm
io
iD1
iD2
is
(b)
Figure 7-1
Figure 4-2 Full-wave center-tapped rectifier a) circuit;
(b) voltages and currents.
89
EXAMPLE 7-1
The rectifier shown in the figure 7-1a has a purely resistive load. Determine (a) the efficiency
(b) the form factor ,(c) the ripple factor,(d) the transformer utilization factor ,(e) the peak inverse
voltage of the diode D1 and (f) the crest factor of the input current.
Solution
1 𝜋 2𝑉𝑚
𝑉𝑑𝑐 = � 𝑉𝑚 sin 𝜔𝑡 𝑑𝜔𝑡 = = 0.6366𝑉𝑚
𝜋 0 𝜋
1 𝜋 𝑉𝑚
𝑉𝑟𝑚𝑠 = � � (𝑉𝑚 sin 𝜔𝑡)2 𝑑𝜔𝑡 = = 0.707𝑉𝑚
𝜋 0 √2
𝑉𝑟𝑚𝑠 0.707𝑉𝑚
𝐼𝑟𝑚𝑠 = =
𝑅 𝑅
2𝑉𝑚 2𝑉𝑚
𝑃𝑑𝑐 𝑉𝑑𝑐 𝐼𝑑𝑐 ∗
(𝑎) 𝑒𝑓𝑓𝑖𝑐𝑖𝑒𝑛𝑐𝑦 ή = = = 𝜋 𝜋𝑅 = 81.05%
𝑃𝑎𝑐 𝑉𝑟𝑚𝑠 𝐼𝑟𝑚𝑠 𝑉𝑚 𝑉𝑚
∗
√2 √2𝑅
𝑉𝑚
𝑉𝑟𝑚𝑠
(𝑏)𝐹𝑜𝑟𝑚 𝐹𝑎𝑐𝑡𝑜𝑟 𝐹𝐹 = = √2 = 1.11
𝑉𝑑𝑐 2𝑉𝑚
𝜋
𝑉𝑎𝑐
(𝑐)𝑅𝑖𝑝𝑝𝑙𝑒 𝐹𝑎𝑐𝑡𝑜𝑟 𝑅𝐹 = = �𝐹𝐹 2 − 1 = �1.112 − 1 = 0.482
𝑉𝑑𝑐
𝑃𝑑𝑐
(𝑑) 𝑇𝑟𝑎𝑛𝑠𝑓𝑜𝑟𝑚𝑒𝑟 𝑢𝑡𝑖𝑙𝑖𝑧𝑎𝑡𝑖𝑜𝑛 𝑓𝑎𝑐𝑡𝑜𝑟 𝑇𝑈𝐹 =
𝑉𝑆 𝐼𝑆
1 2𝜋
𝑉𝑠 = � � (𝑉𝑚 sin 𝜔𝑡)2 𝑑𝜔𝑡
2𝜋 0
90
This is the value of the transformer secondary voltage for ½ of the secondary winding. Rms value
of transformer secondary voltage associated with this ½ winding secondary voltage is the same as
the (rms) load current for this ½ winding.
91
is
is io
iD1
D4 D1
D1 D3
io +
+ +
vs = vs vo
- – vo + -
–
D2 D3 D4 D2
iD4
(a)
(b)
vs
Vm
wt
0
p 2p
–Vm
vo
Vm
p 2p wt
vD1, vD2
wt
0
p 2p
vD3, vD4
Vm
0
p 2p wt
–Vm
io
0
p 2p wt
iD1, iD2
0
p 2p wt
iD3, iD4
0
p 2p wt
is
wt
0
p 2p
(c)
Figure 7-2
Figure 4-1 Full-wave bridge rectifie . (a) Circuit diagram. (b) Alternative
representation. (c) Voltages and currents.
har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 115
92
The following discussion focuses on the full-wave bridge rectifier but gen-
erally applies to the center-tapped circuit as well.
Resistive Load
The voltage across a resistive load for the bridge rectifier of Fig. 7-2 is expressed
as
Vm sin t for 0 t
vo(t) b (7-1)
Vm sin t for t 2
The dc component of the output voltage is the average value, and load current is
simply the resistor voltage divided by resistance.
1 2V
Vo V sin t d(t) m
3 m
0
(7-2)
Vo 2Vm
Io
R R
Power absorbed by the load resistor can be determined from I2rms R, where Irms
for the full-wave rectified current waveform is the same as for an unrectifie
sine wave,
Im
Irms (7-3)
12
The source current for the full-wave rectifier with a resistive load is a sinu-
soid that is in phase with the voltage, so the power factor is 1.
EXAMPLE 7-2
single-phase diode bridge rectifier has a purely resistive load of R=15 ohms and, Vs=300 sin 314t
and unity transformer ratio. Determine (a) The efficiency, (b) Form factor, (c) Ripple factor, (d)
The peak inverse voltage, (PIV) of each diode , and, (e) Input power factor.
Solution
1
π
2 Vm 2 Vm
I dc = = 12.7324 A
Vdc =
π ∫ Vm sin ωt dωt =
0
π
= 190.956 V
π R
1/ 2
1 π Vm
Vrms = ∫ (Vm sin ωt ) dωt
2
= = 212.132 V
π 0 2
P V I
(a) η = dc = dc dc = 81.06 %
Pac Vrms I rms
93
Vrms
(b) FF = = 1.11
Vdc
2
Vac Vrms −Vdc2 2
Vrms
(c) RF = = = 2
− 1 = FF 2 − 1 = 0.482
Vdc Vdc Vdc
RL Load
For an RL series-connected load (Fig. 7-3a), the method of analysis is similar to
that for the half-wave rectifier with the freewheeling diode discussed in Chap. 6
After a transient that occurs during start-up, the load current io reaches a
periodic steady-state condition similar to that in Fig. 7-3b
For the bridge circuit, current is transferred from one pair of diodes to the
other pair when the source changes polarity. The voltage across the RL load is a
full-wave rectified sinusoid, as it was for the resistive load. The full-wave recti-
fied sinusoidal voltage across the load can be expressed as a Fourier series con-
sisting of a dc term and the even harmonics
q
The current in the RL load is then computed using superposition, taking each
frequency separately and combining the results. The dc current and current
amplitude at each frequency are computed from
V0
I0
R
(7-5)
Vn Vn
In
Zn ƒ R jnL ƒ
Note that as the harmonic number n increases in Eq.(7-4), the voltage
amplitude decreases. For an RL load, the impedance Zn increases as n increases.
The combination of decreasing Vn and increasing Zn makes In decrease rapidly
for increasing harmonic number. Therefore, the dc term and only a few, if any, of
the ac terms are usually necessary to describe current in an RL load.
har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 116
94
+
is io
D1 D4 R
vs(t) = +
Vm sin ωt
vo
−
D3 D2
L
–
(a)
vo, io vo
io
0 π 2π 3π 4π ωt
iD1, iD2
iD3, iD4
vs, is
vs
is
(b)
vo, iD1, iD2
vs, is
(c)
Figure 7-3 (a) Bridge rectifier with an RL load; (b) Voltages and
currents; (c) Diode and source currents when the inductance is
.large and the current is nearly constant
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95
EXAMPLE 7-3
■ Solution
(a) The average load current is determined from the dc term in the Fourier series. The
voltage across the load is a full-wave rectified sine wave that has the Fourier serie
determined from Eq. (7-4). Average output voltage is
2Vm 2(100)
V0 63.7 V
and average load current is
V0 63.7 V
I0 6.37 A
R 10 Æ
,b) Amplitudes of the ac voltage terms are determined from Eq. (7-4). For n 2 and 4)
2(100) 1 1
V2 a b 42.4 V
1 3
2(100) 1 1
V4 a b 8.49 V
3 5
The amplitudes of first two ac current ter s in the current Fourier series are
computed from Eq. 7-5
42.4 42.4 V
I2 3.39 A
| 10 j(2)(377)(0.01) | 12.5 Æ
8.49 8.49 V
I4 0.47 A
| 10 j(4)(377)(0.01) | 18.1 Æ
The current I2 is much larger than I4 and higher-order harmonics, so I2 can be used
to estimate the peak-to-peak variation in load current io L 2(3.39) 6.78 A.
Actual variation in io will be larger because of the higher-order terms.
(c) The power absorbed by the load is determined from I2rms. The rms current is then
determined from Eq. (2-43) as
3.39 2 0.47 2 Á
(6.37)2 a b a b L 6.81 A
C 12 12
Adding more terms in the series would not be useful because they are small and
have little effect on the result. Power in the load is
P I 2rms R (6.81)2 (10) 464 W
har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 118
96
The rms source current is the same as the rms load current. Power factor is
P P 464
pf 0.964
S Vs, rms Is, rms 100
a b (6.81)
12
(d) Each diode conducts for one-half of the time, so
Io 6.37
ID, avg 3.19 A
2 2
and
I 6.81
ID, rms rms 4.82 A
12 12
Another general industrial load may be modeled as a series resistance, inductance, and a dc
voltage source, as shown in Fig. 7-5a. A dc motor drive circuit and a battery charger are
applications for this model. There are two possible modes of operation for this circuit, the
continuous-current mode and the discontinuous-current mode. In the continuous-current
mode, the load current is always positive for steady-state operation (Fig. 7-5b). Discontinuous
load current is characterized by current returning to zero during every period Fig. 7-5c
For continuous-current operation, one pair of diodes is always conducting, and the voltage
across the load is a full-wave rectified sine wave.There is two analysis procedures , the first
one is similar to the analysis that was done for an RL load but with only modification which
is the dc term of the Fourier series. The dc (average) component of current in this circuit is
2Vm
⫺ Vdc
Vo ⫺ Vdc (7-7)
Io ⫽ ⫽
R R
The sinusoidal terms in the Fourier analysis are unchanged by the dc source provided that the
current is continuous,this procedure is useful for steady-state analysis .
har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 119
97
R L
+ io
+
+
vo Vdc
− –
(a)
vo
io
(b) t
vo
Vdc
io
(c) t
Figure 7-5 (a) Rectifier with RL-source load; (b) Continuous current: when
the circuit is energized, the load current reaches the steady-state after a few
periods; (c) Discontinuous current: the load current returns to zero during
every period.
The second procedure which contains the transient component is to write a differential equation
obtained by appling KVL kirchhoff’s law
𝑣𝑆 = √2𝑉𝑆 sin 𝜔𝑡
har80679_ch04_111-170.qxd 12/17/09 2:35 PM Page 120
98
and the load current can be obtained from the solution of the differential equation
𝑑𝑖𝐿
𝐿 + 𝑅𝑖𝐿 + 𝑉𝑑𝑐 = 𝑉𝑆 sin 𝜔𝑡
𝑑𝑡
(7-8)
Now applying the mathematical solution of a first order linear differential equation to equation
(7-8) which is
√2𝑉𝑆 𝑅 𝑉𝑑𝑐
𝑖𝐿 = sin(𝜔𝑡 − 𝜃) + 𝐴1 𝑒 −� �𝐿�𝑡 − (7-9)
𝑍 𝑅
Where Z is the load impedance given by
𝑍 = �𝑅 2 + (𝜔𝐿)2
𝜔𝐿
And 𝜃 = tan−1 𝑅
√2𝑉𝑆 2 𝑅
−� �𝑡 𝑉𝑑𝑐
𝑖𝐿 = �sin(𝜔𝑡 − 𝜃) + 𝑅 𝜋 sin 𝜃 𝑒 𝐿 �−
𝑍 −� �� � 𝑅
1−𝑒 𝐿 𝜔
√2𝑉𝑆 2 𝑅
−� �𝑡 𝑉𝑑𝑐
𝑖𝐿 = �sin(𝜔𝑡 − 𝜃) + 𝑅 𝜋 sin 𝜃 𝑒
𝐿 �−
𝑍 −� �� � 𝑅
1− 𝑒 𝐿 𝜔
𝑓𝑜𝑟 0 ≤ 𝜔𝑡 ≤ 𝜋 𝑎𝑛𝑑 𝑖𝐿 ≥ 0 (7-12)
Equation (7-12) is the equation for the continuous load current of a bridge rectifier with an
inductive load and a battery in series with the load.
1 𝜋2
𝐼𝑟 = � � 𝑖𝐿 𝑑𝜔𝑡
2𝜋 0
(7-13)
and the rms output current can be obtained by combining the rms diode current of diodes D1 and
D2 with that of diodes D3 and D4 and is given by
(7-14)
𝐼𝑟𝑚𝑠𝐿 = �𝐼𝑟2 + 𝐼𝑟2 = √2𝐼𝑟
1 𝜋 (7-15)
𝐼𝑎𝑣𝑔𝑑 = � 𝑖 𝑑𝜔𝑡
2𝜋 0 𝐿
EXAMPLE 7-4
Full-Wave Rectifier with RL-Source Load—Continuous Current
For the full-wave bridge rectifier circuit of Fig. 7-5a, the ac source is 120 V rms at 60
Hz, R 2 , L 10 mH, and Vdc 80 V. Determine the power absorbed by the dc
voltage source and the power absorbed by the load resistor
■ Solution
For continuous current, the voltage across the load is a full-wave rectified sine wave
ewhich has the Fourier series given by Eq. (7-4). Equation (7-7) is used to compute th
average current, which is used to compute power absorbed by the dc source,
2Vm 222(120)
Vdc 80
I0 14.0 A
R 2
Pdc I0Vdc (14)(80) 1120 W
The first few terms of the Fourier series using Eqs. (7-4) and (7-5) are shown in Table
7-1
100
Discontinuous current is analyzed using the mathematical procedure only since the load
voltage is not a full-wave rectified sine wave for this case, so the Fourier series of Eq. (7-4)
does not apply .Under the conditions shown in Figure 7-5c, the load current flows only for
the interval given by 𝛼 ≤ 𝜔𝑡 ≤ 𝛽
𝑎𝑡 𝜔𝑡 = 𝛽, the load current falls to zero and 𝑖𝐿 (𝜔𝑡 = 𝛽) = 0 , Substituting this condition in the
load current equation yields :
√2𝑉𝑆 𝑉𝑑𝑐 √2𝑉𝑆 𝑅 𝛼 𝛽 𝑉𝑑𝑐
� �� − �
0= sin(𝛽 − 𝜃) + � − sin(𝛼 − 𝜃)� 𝑒 𝐿 𝜔 𝜔 −
𝑍 𝑅 𝑍 𝑅
(7-20)
The value of 𝛽 can be determined from Figure 6-2 , Knowing 𝛼, 𝛽 and the load current equation,
the rms current through diodes D1 and D2 is
har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 121
101
1 𝛽 (7-21)
𝐼𝑟 = � � 𝑖𝐿2 𝑑𝜔𝑡
2𝜋 𝛼
EXAMPLE 7-5
Consider single-phase full bridge rectifier with RL-source load as in Figure 7-5a ,if given that
𝑉𝑟𝑚𝑠 = 120𝑉 , 𝑅 = 2Ω, 𝐿 = 10𝑚𝐻 , 𝑉𝑑𝑐 = 80𝑉 . find 𝛼, 𝛽 and determine if the current continuous
or not .
Solution
𝐹𝑟𝑜𝑚 𝐸𝑞. (7-16)
𝑉𝑑𝑐 80
𝛼 = sin−1 = sin−1 = 28.13°
𝑉𝑚 √2120
𝜔𝐿 2𝜋(60)(0.01)
= = 1.885𝑟𝑎𝑑
𝑅 2
Using Figure 6-2 to find the value of 𝛽 gives 𝛽 = 190°
102
+
iC iR
vs(t) = +
vm sin(ωt) C R vo
−
–
(a)
vo
Vm
ΔVo
0 π
–θ π π+α ωt
2 α
(b)
Figure 7-6 (a) Full-wave rectifier with capacitance filter
(b) Source and output voltage
where
is the angle where the diodes become reverse biased, which is the same as that for
the half-wave rectifier and is found using Eq. 6-32
tan1 (RC) tan1(RC) (7-24)
The maximum output voltage is Vm, and the minimum output voltage is determined by
evaluating vo at the angle at which the second pair of diodes turns on, which is at t
. At that boundary point
(Vm sin
)e (
)>RC Vm sin ( )
or
(sin
)e (
)>RC sin 0 (7-25)
103
The minimum output voltage is then approximated from Eq. (4-9) for the diodes off evaluated at
t
vo ( ) Vme (>2>2)>RC Vme >RC
The ripple voltage for the full-wave rectifier with a capacitor filter can then be approximated as
Vo L Vm(1 e >RC)
Furthermore, the exponential in the above equation can be approximated by the
series expansion
e >RC L 1
RC
Substituting for the exponential in the approximation, the peak-to-peak ripple is
Vm Vm
Vo L (7-28)
RC 2f RC
Note that the approximate peak-to-peak ripple voltage for the full-wave rectifie is one-half that
of the half-wave rectifier from Eq. (6-42). As for the half-wave rectifie , the peak diode current
is much larger than the average diode current and Eq. (6-39) applies. The average source current
is zero
EXAMPLE 7-6
104
(b) With the ripple limited to 1 percent, the output voltage will be held close to Vm and
.the approximation of Eq. (7-28) applies
⌬ Vo 1
⫽ 0.01 L
Vm 2fRC
Solving for C,
1 1
C L ⫽ ⫽ 1670 F
2fR( ⌬ Vo>Vm) (2)(60)(500)(0.01)
It can be noticed from Figure7-7b that the current flowing through the secondary winding is
unidirectional and contains a dc component . Only one secondary windings carries current at a
particular time , and as a result the primary must be connected in delta in order to eliminate the dc
component in the input side of the transformer.
if the load is purely resistive , the peak current through a diode is 𝐼𝑚 = 𝑉𝑚 /𝑅 and we can find the
rms value of a diode current (or transformer secondary current) as
1
𝜋 2 1
2 𝑞
2 (cos
1 𝜋 1 2𝜋 2 𝑉𝑟𝑚𝑠
𝐼𝑆 = � � 𝐼𝑚 𝜔𝑡)2 𝑑𝜔𝑡 � = 𝐼𝑚 � � + sin �� = (7-31)
2𝜋 0 2𝜋 𝑞 2 𝑞 𝑅�𝑞
106
For higher power application and where three-phase power supply is available , a three phase
bridge rectifier should be used. In diode rectifiers, the output voltage cannot be controlled. Three
phase Rectifiers can be classified as:
-Three Phase Half wave rectifier
- Three Phase Full wave rectifier
Similarly, the rms value of the output voltage can be found as:
5π / 6
3 1 3* 3
∫ (V sin ωt ) dωt =
2
Vrms = m + Vm = 0.8407 Vm (7-34)
2π π /6
2 8π
0.8407 Vm
The rms value of the output current is : I rms =
R (7-35)
The rms value of the transformer secondary current which is the same of the rms value for each
diode is :
0.8407 Vm V
Ir = IS = = 0.4854 m (7-36)
R 3 R
it can be seen from Fig.(7-8) that the peak inverse voltage (PIV) of each diode is :
2 VLL = 3 Vm (7-37)
(a)
107
(b)
EXAMPLE 7-7
A 3-phase star rectifier is operated from 460 V 50 Hz supply at secondary side and the load
resistance is R=20 Ω . If the source inductance is negligible, determine (a) Rectification
efficiency, (b) Form factor (c) Ripple factor (d) Peak inverse voltage (PIV) of each diode.
Solution :
460
VS = = 265.58 V , Vm = 265.58* 2 = 375.59 V
3
3 3 Vm 3 3 Vm 0827 Vm
Vdc = = 0.827 Vm I dc = =
2π 2π R R
0.8407 Vm
Vrms = 0.8407 Vm I rms =
R
108
Pdc V I
(a) η = = dc dc = 96.767 %
Pac Vrms I rms
Vrms
(b) FF = = 101.657 %
Vdc
Vac V 2 − Vdc2 V2
(c) RF = = rms = rms − 1 = FF 2 − 1 = 18.28 %
Vdc Vdc Vdc2
an bn cn an bn cn iD
iD1
Source iD2
vo iD3
ab ac bc ba ca cb ab ac bc ba iD4
6.1 1.2 2.3 3.4 4.5 5.6 6.1
iD5
iD6
Bridge
ωt
ia
2π vD1
ωt = 0 π
– —
3 3
(b) (c)
Figure 7-9 (a) Three-phase full-bridge rectifier; b) Source and output voltages; (c) Currents for a resistive load
har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 145
109
110
which consists of terms at the fundamental frequency of the ac system and har-
monics of order 6k 1, k 1, 2, 3, . . . .
Because these harmonic currents may present problems in the ac system, fil
ters are frequently necessary to prevent these harmonics from entering the ac
sys-tem. Resonant filters are used to provide a path to ground for the fifth and
seventh harmonics, which are the two lowest and are the strongest in amplitude.
Higher-order harmonics are reduced with the high-pass filte . These filters
prevent the harmonic currents from propa-gating through the ac power system.
Filter components are chosen such that the impedance to the power system
frequency is large.
har80679_ch04_111-170.qxd 12/15/09 3:48 PM Page 147
111
io
iD1
iD2
iD3
iD4
iD5
iD6
ia
ib
ic
Three-Phase Rectifier
The 3-phase bridge in Fig.7-9a rectifier is operated from 460 V , 50 Hz supply and the load
resistance is R=20 Ω. If the source inductance is negligible, determine (a) The efficiency, (b)
Form factor , (c) Ripple factor, (d) transformer utilization factor ,(e) Peak inverse voltage
(PIV) of each diode
Solution:
3 3 Vm 3 3 Vm 1.654Vm
Vdc = = 1.654Vm = 621.226 V I dc = = = 31.0613 A
π π R R
3 9* 3 1.6554 Vm
Vrms = + Vm = 1.6554 Vm = 621.752 V I rms = = 31.0876 A
2 4π R
Pdc V I
(a) η = = dc dc = 99.83 %
Pac Vrms I rms
Vrms
(b) FF = = 100.08 %
Vdc
Vac V 2 −Vdc2 V2
(c) RF = = rms = rms − 1 = FF 2 −1 = 4 %
Vdc Vdc Vdc2
112
𝑉𝑚�
the rms current of the transformer secondary 𝐼𝑆 = 0.7804𝐼𝑚 = 0.7804 × √3 𝑅
the volt-ampere rating of the transformer ,
√3𝑉𝑚
𝑉𝐴 = 3𝑉𝑆 𝐼𝑆 = 3 × 0.707𝑉𝑚 × 0.7804 ×
𝑅
1.65422
𝑇𝑈𝐹 = = 0.9545
3 × √3 × 0.707 × 0.7804
(e) the PIV= √3𝑉𝑚 = 650.54𝑉
Table 7-3 compares the performance between single phase rectifiers and 3-phase rectifier.
Table 7-3
113
Since the load current is assumed to be continuous at least one diode from the top group
(𝐷1 , 𝐷3 , 𝑎𝑛𝑑 𝐷5 ) and one diode from the bottom group (𝐷2 , 𝐷4 , 𝑎𝑛𝑑 𝐷6 ) must conduct at all
time. It can be easily verified that only one diode from each group (either top or bottom) conducts
at a time and two diodes from the same phase leg never conducts simultaneously. Thus the
converter has six different diode conduction modes. These are 𝐷1 𝐷2 , 𝐷2 𝐷3 , 𝐷3 𝐷4 , 𝐷4 𝐷5 , 𝐷5 𝐷6 ,
and 𝐷6 𝐷1 . Each conduction mode lasts for π/3 rad and each diode conducts for 120º.
Fig. 7-11 (b) shows voltages across different diodes and the output voltage in each of these
conduction modes. The time interval during which a particular conduction mode will be effective
can be ascertained from this table. For example the 𝐷1 𝐷2 conduction mode will occur when the
voltage across all other diodes (i.e. 𝑣𝑏𝑎 , 𝑣𝑐𝑎 , 𝑎𝑛𝑑 𝑣𝑐𝑏 ) are negative. This implies that
𝐷1 𝐷2 conducts in the interval 0 ≤ ωt ≤ π/3 as shown in Fig.7-11(c). The diodes have been
numbered such that the conduction sequence is 𝐷1 → 𝐷2 → 𝐷3 → 𝐷4 → 𝐷5 → 𝐷6 → 𝐷1 ⋯ .
When a diode stops conduction its current is commutated to another diode in the same group (top
or bottom). This way the sequence of conduction modes become,𝐷1 𝐷2 → 𝐷2 𝐷3 → 𝐷3 𝐷4 →
𝐷4 𝐷5 → 𝐷5 𝐷6 → 𝐷6 𝐷1 → 𝐷1 𝐷2 ⋯ . The conduction diagram in Fig.7-11(c) is constructed
accordingly.
114
115
The output dc voltage can be constructed from this conduction diagram using appropriate line
voltage segments as specified in the conduction table.
The input ac line currents can be constructed from the conduction diagram and the output current.
For examplee
ia = io for 0 ≤ ωt ≤ π/3 and 5π/3 ≤ ωt ≤ 2π
ia = - io for 2π/3 ≤ ωt ≤ 4π/3 (7-44)
=ia 0 otherwise.
The line current wave forms and their fundamental components are shown in Fig.7-11 (c).
It is clear from Fig 7-11 (c) that the dc voltage output is periodic over one sixth of the input ac
cycle.
𝜋 2𝜋
𝑣𝑎𝑏 (𝑡) = √2 𝑉𝑎𝑏 sin(𝜔𝑡) , ≤ 𝜔𝑡 ≤ (7-45)
3 3
Where 𝑉𝑎𝑏 is the line-to-line rms input voltage .
√2𝑉𝑎𝑏 𝐸 𝑅𝑡
𝑖𝑜 (𝑡) = sin(𝜔𝑡 − 𝜃) − + 𝐴1 𝑒 − 𝐿 (7-47)
𝑍 𝑅
𝜔𝐿
𝑤ℎ𝑒𝑟𝑒 𝑍 = �𝑅 2 + (𝜔𝐿)2 , 𝜃 = tan−1
𝑅
𝜋 2𝜋
Under a steady state condition : 𝑖𝑜 �𝜔𝑡 = � = 𝑖𝑜 �𝜔𝑡 = � = 𝐼𝑜
3 3
2𝜋 𝜋 𝑅 𝜋
−
√2𝑉𝑎𝑏 sin � 3 − 𝜃� − sin �3 − 𝜃� 𝑒 𝐿 3𝜔 𝐸 (7-48)
𝑆𝑜𝑙𝑣𝑖𝑛𝑔 𝑓𝑜𝑟 𝐼𝑜 𝑔𝑖𝑣𝑒𝑠 𝐼𝑜 = × 𝑅 𝜋 −
𝑍 𝑅
1 − 𝑒 − 𝐿 3𝜔
For continuous load current 𝐼𝑜 > 0 , and by substituting Eq.(7-48) into (7-47) yields to :
2𝜋 𝜋
√2𝑉𝑎𝑏 sin � − 𝜃� − sin �3 − 𝜃� − 𝑅 � 𝜋 −𝑡� 𝐸
𝑖𝑜 (𝑡) = �sin(𝜔𝑡 − 𝜃) + 3 𝑒 𝐿 3𝜔 � − (7-49)
𝑍 𝑅 𝜋 𝑅
1 − 𝑒 − 𝐿 3𝜔
Provided that 𝑖𝑜 (𝑡) > 0
116
To find the boundary condition for which the load current is continuous we set 𝐼𝑜 in Eq.(7-48) to
zero
2𝜋 𝜋 𝑅 𝜋
−
√2𝑉𝑎𝑏 sin � 3 − 𝜃� − sin �3 − 𝜃� 𝑒 𝐿 3𝜔 𝐸
× 𝑅 𝜋 − =0
𝑍 − 𝑅
1−𝑒 𝐿 3𝜔
2𝜋 𝜋 𝜋
−
𝐸 sin � 3 − 𝜃� − sin �3 − 𝜃� 𝑒 3 tan 𝜃
� � =� � cos 𝜃 (7-50)
𝜋
𝑉𝑎𝑏 𝑐𝑟𝑖𝑡𝑖𝑐𝑎𝑙 1−𝑒
−
3 tan 𝜃
117
CHAPTER 8: Thyristors
8.1 Introduction
A thyristor is the most important type of power semiconductor devices. Thyristors are
extensively used in power electronic circuits. They are operated as bistable switches from non-
conducting state to conducting state. Although for the development of power conversion tech-
niques in earlier chapters, thyristors are assumed as ideal switches, the practical thyristors exh-
ibits certain characteristics and limitations.
The anode current must be more than a value known as latching current, IL, to maintain the
required amount of carriers flow across the junction; otherwise, the device will revert to the
blocking condition as the anode-to-cathode voltage is reduced. The characteristics of
a thyristor is shown in Figure 8-2b.
Once a thyristor conducts, it behaves like a conducting diode and there is no control
over the device. The device will continue to conduct because there is no depletion layer on
the junction J2 due to the free movements of carriers. However, if the forward anode current
is reduced below a level known as the holding current, I H, a depletion region would develop
around junction J2 due to the reduced number of carriers and the thyristor would be in the
blocking state. The holding current is in order of milliampere and is less than the latching
current, IL.
When the cathode voltage is positive with respect to the anode, the junction J2 is
forward biased and junctions J1 and J3 are reverse biased. This is equivalent to two series-
connected diodes with reverse voltage across them. The thyristor will be in the reverse
blocking state and a reverse leakage current known as reverse current, IR, would flow
through the device.
Although a thyristor can be turned on by increasing the forward voltage beyond VBO
such a turn-on could be destructive. In practice, the forward voltage is maintained below
VBO and the thyristor is turned on by applying a positive voltage between the gate and the
cathode. This is shown in Figure 8-2b. Once a thyristor is turned on by a gate signal and its
anode current is greater than the holding current, the device continues to conduct due to the
positive feedback, even if the gating signal is removed.
119
(8-1)
and the common base current gain is defined as . For transistor Q1, collector current
is the anode current, IA, and the collector current can be found from Eq. (8-1):
(8-2)
where is the current gain and is the leakage current for Q1. For transistor Q2 the
collector current is
(8-3)
where is the current gain and is the leakage current for Q2.By combining and
gives
(8-4)
But for a gating current of IG, and solving Eq. (8-4) for gives
(8-5)
The current gain, varies with the emitter current ; and varies with .
A typical variation of current gain, , with emitter current, , is shown in Figure 8-4.
120
If the gate current , is suddenly increased, say from 0 to 1mA, this would immediately
increase anode current , which would further increase and . would depend on
and . The increase in the values of and would further increase . Therefore, there is
a regenerative or positive feedback effect. If tends to be unity, the dominator of
Eq. (8-5) approaches zero, resulting in a large value of anode current, , and the thyristor
would turn on with small gate current.
Under transient conditions, the capacitances of the pn-junctions, as shown in figure
14-5, will influence the characteristics of the thyristor. If a thyristor is in a blocking state, a
rapidly rising voltage applied across the device would cause high current flow through the
junction capacitors; and the current through capacitor Cj2 can be expressed as
( ) (8-6)
where and are the capacitance and voltage of junction J2, respectively. is the charge
in the junction. If the rate of rise of voltage, is large, then would be large and this
would result in increased leakage currents, and . According to Eq. (8-5), high
enough values of and may cause to tend to unity and results in un-
desirable turn on the thyristor. However, large values of current through junction capacitors
may also damage the device.
121
A thyristor can be turned on by increasing the anode current. This can be accomplish
in one of the following ways.
Thermals. If the temperature of a thyristor is high, there will be an increase in the num-
ber of electron-hole pairs, which would increase the leakage currents. This increase in current
would cause and to increase. Due to the regenerative action, may tend tobe
unity and the thyristor may be turned on. This type of turn-on may cause thermal runway and
is normally avoided.
Light. If the light is allowed to strike the junctions of a thyristor, the electron-hole pairs
will increase; and the thyristor may be turn on. The light-activated thyristors are turned on by
allowing light to strike the silicon wafer.
High voltage. If the forward anode-cathode voltage id greater than the forward break-
down voltage VBO, a sufficient leakage current will flow to initiate regenerative turn-on .
This type of turn-on may be destructive and should be avoided..
dv/dt. It can be noticed from Eq. (4-6) that if the rate of rise of the anode-cathode voltage
is high, the charging current of the capacitive junctions may be sufficient enough to turn on
the thyristor. A high value of charging current may damage the thyristor and the device must
be protected against high dv/dt. The manufacturers specify the maximum allowable of thyristors.
Gate current. If a thyristor is forward biased, the injection of gate current by applying
positive gate voltage between the gate and cathode terminals would turn-on the thyristor. As
the gate current is increased, the forward blocking voltage is increased as shown in Figure
8-6.
122
Figure 8-7 shows the waveform of the anode current, following the application of the gate
signal. There is a time delay known as turn-on time, tON , between the application of gate
signal and the conduction of a thyristor. tON is defined as the time interval between 10% of
steady-state gate current (0.1 ) and 90% of the steady-state thyristor on-state current (0.9 ).
tON is the sum of delay time, td, and rise time, tr . td is defined as the time interval between
10% of gate current ( 0.1 ) and 10% thyristor on-state current ( 0.1 ). tr is the time
required for the anode current to rise from 10% ( 0.1 ) of on-state to 90% of on-state
current ( 0.9 ). These times are depicted in Figure 8-7.
The following points should be considered in designing the gate control circuit:
1. The gate signal can be removed after the thyristor is turned on. A continuous gat-
ing signal would increase the power loss in the gate junction.
2. While the thyristors is reversed biased, there should be no gate signal; otherwise,
the thyristor may fall due to increase leakage current.
3. The width of gate pulse, tG, must be longer than the time required for the anode
current to rise to the holding current value. In practice, the pulse width, tG, is
normally made more than the turn-on time of the thyristor, tON.
A thyristor, which is in the on-state, can be turned off by reducing the forward current
to a level below the holding current, . There are various technique for turning off a thyristor
which are discussed in this section. In all the commutation techniques, the anode current is
maintained below the holding current for a sufficient long time, so that all the excess carrier in
the four layers are swept out or recombined.
Due to two outer pn-junctions J1 and J3, the turn-off characteristics would be similar
to that of the diode, exhibiting reverse recovery time, trr , and peak reverse recovery current
123
. can be much greater than the normal reverse blocking current, . In a line-commutat-
ed circuit where the input voltage is alternating as shown in Figure 8-8a, a reverse voltage
appears across the thyristor immediately after the forward current goes through the zero value.
This reverse voltage will accelerate the turn-off process, by sweeping out the excess carriers
from pn-junctions J1 and J3 . Equations (8-6) and (8-7) can be applied to calculate and
The inner pn-junction, J2, will require a time known as recombination time, to re-
combine the excess carriers. A negative reverse voltage would reduce this recombination time.
is dependent on the magnitude of the reverse voltage. The turn-off characteristics are shown
in Figure8-8a and 8-8b for a line commutated circuit and forced-commutated circuit respectively.
The turn-off time, , is the sum of reverse recovery time, , and recombination time
. At the end of turn-off, a depletion layer develops across junction J2 and the thyristor
recovers its ability to withstand forward voltage. In all the commutation techniques in Chapter
3, a reverse voltage is applied across the thyristor during turn-off process
Real devices, as we intuitively expect, do not have these ideal characteristics and
hence will dissipate power when they are used in the numerous applications already mention-
ed. If they dissipated too much power, the devices can fail and, in doing so, not only will
destroy themselves but also may damage the other system components.
Switching Power loss is proportional to:
switching frequency
On-state current, IT(AV). IT(AV) is the average on-state current at a specific temperature
These data are normally quoted for a half –sine wave. Figures 8-10.1 and 8-10.2 show the
typical variations of average on-state current with the maximum allowable case temperature.
RMS current, IT(RMS). IT(RMS) is the root-mean-square (rms) value of on-state current.
This signifies the heating effect due to i2R dissipation and is limited due to thermal stress on
the device. Figures 8-10.3 and 8-10.4 show the maximum average on-state power loss against
the average on-state current for sinusoidal and rectangular waveforms at various conduction
angles.
Nonrepetitive rate of rise of on-state current, di/dt. di/dt is the maximum value of
the rate of rise of on-state current which the thyristor can withstand without destroying itself.
Maximum repetitive peak reverse voltage, VRRM. VRRM is the maximum permissible
instantaneous value of repetitive applied reverse voltage that a thyristor can block.
Maximum repetitive peak off-state voltage, VDRM. VDRM defines the maximum per-
missible instantaneous value of repetitive applied forward voltage that a thyristor can
withstand.
Maximum non-repetitive peak off-state voltage, VDSM. VDSM is the maximum inst-
antaneous peak value of applied forward voltage under transient conditions and for a specified
time duration. VDSM is typically 15% above VDRM.
Latching current, IL. IL is the minimum anode current which is required to maintain
the thyristor in the on-state immediately after a thyristor has been turned on and the gate signal
has been removed.
Holding current, IH. IH is the minimum anode current to maintain the thyristor in the
on-state. The holding current is less than the latching current.
126
Peak on-state current, IP. IP is the peak instantaneous value of on-state current. It
depends on the di/dt and width of current pulse. The switching losses would depend on the
value of IP, pulse width, and di/dt .
Peak reverse current, IRM. IRM is the peak value of reverse current at the maximum
junction temperature and maximum repetitive peak reverse voltage with gate open. This current
would also cause junction heating.
Peak off-state current, IDM. IDM is the peak value of off-state current at the max-
imum junction temperature and maximum repetitive peak reverse voltage with gate open. This
current would also cause junction heating.
Reverse recovered charge, QRR. QRR is the amount of charge carriers which has to
be recovered during the turn-off process. Its value is determined from the area enclosed by the
path of the reverse recovery current. The value of QRR depends on the rate of fall of on-state
current and the peak value of on-state current before turn-off. QRR causes corresponding energy
loss within the device.
DC gate current to trigger, IGT. IGT is the recommended value of the gate current at
a specified case temperature. The minimum and maximum values of IGT are normally specifi-
ed, namely 70 to 150 mA.
DC gate voltage to trigger, VGT. VGT is the recommended value of the gate voltage
at a specified case temperature. The minimum and maximum values of VGT are normally
specified, namely 1.2 to 2.5 V.
DC gate voltage not to trigger, VGD. VGD is the value of the gate voltage which does
not cause the thyristor (with rated VDRM between anode to cathode) to switch from off-state to
on-state. It is quoted at specified case temperature, say at
On-state voltage drop, VT. VT is the instantaneous value of on-state voltage drop and
is dependent on the junction temperature, TJ. Figure 8-16.5 shows the instantaneous forward
voltage drop against forward current. VT can be considered as being made up of (1) a value
which is independent of the forward current, and (2) a value which is proportional to the instan-
taneous forward current.
Maximum peak on-state voltage, VTM. VTM is the maximum on-state voltage drop at
a specified on-state current and junction temperature.
Critical rate of rise of off-state voltage, dv/dt. is the minimum value of the
rate of rise of the forward voltage which may cause switching from off-state to on-state.
temperature to allowable range. This peak permissible value varies with the number of repeti-
127
tions. Figure 8-10.6 shows the maximum value of peak surge current with the number of
current pulses.
Turn-off time, tq. tq is the minimum value of time interval between the instant when
the on-state current has decreased to zero and the instant when the thyristor is capable of with-
standing forward voltage without turning on. tq depends on the peak value of on-state current
and the instantaneous on-state voltage. Figure 8-10. 7 shows the variation of turn-off time
against instantaneous on-state voltage.
128
Phase-Control Thyristors
This type of thyristors generally operates at the line frequency and is turned off by
natural commutation. The turn-off time, , is of order of 50 to 100 s. This is most suited
for low- speed switching applications and is also known as converter thyristor. Since the
thyristor is basically a silicon-made controlled device, it is also known as silicon-controlled
rectifier (SCR).
The on-state voltage, VT, varies typically from about 1.15 V for 600 V to 2.5 V for
4000-V devices; and for a 5500-A, 1200-V thyristor it is typically 1.25 V. The modern thyrsi-
tors use an amplifying gate, where an auxiliary thyristor, TA, is gated on by a gate signal and
then the amplified output of TA is applied as agate signal to the main thyristor, TM. This is
shown in Figure 8-11. The amplifying gate permits high dynamic characteristics with typical
dv/dt of 1000 V/ s and di/dt of 500 A/ s and simplifies the circuit design by reducing or
minimizing di/dt limiting inductor and dv/dt protection circuits.
129
Fast-Switching Thyristors
These are used in high-speed switching applications with forced commutation ( e.g.,
choppers and inverters). They have fast turn-off time, generally in the range 5 to 50 s,
depending on the voltage range. The on-state forward drop varies approximately as an inver-
se function of the turn-off time, . This type of thyristors is also known as an inverter thyristor.
These thyristors have high dv/dt typically 1000 V/ s and di/dt of 1000 A/ s. The
fast turn-off and high di/dt are very important to minimize the size and weight of commuta-
ting and/or reactive circuit components. The on-state voltage of a 2200-A 1800-V thyristor
is typically 1.7 V. Inverter thyristor with a very limited reverse blocking capability, typical-
ly 10 V, and a very fast turn-off time between 3 and 5 s are commonly known as asymm-
etrical thyristors (ASCRs). Fast-switching thyristors of various sizes are shown in Figure
8-12.
A TRIAC can conduct in both directions and is normally used in ac phase control
(e.g., ac voltage controllers). It can be considered as two SCRs connected in antiparallel with
a common gate connection as shown in Figure 8-13a. The characteristics are shown in
Figure 8-13c
130
Gate-Turn-Off Thyristors
The circuit symbol of the GTO is shown in Figure 8-14a and its steady-state i-v char-
acteristic is shown in Figure 8-14b.
Like the thyristor, the GTO can be turned on by a short-duration gate current pulse
and once in the on-state, the GTO may stay on without any further gate current. However, un-
like the thyristor, the GTO can be turned off by applying a negative gate-cathode voltage,
therefore causing a sufficiently large negative gate current to flow. This negative gate current
need only flow for a few microseconds (during the turn-off time), but it must have a very large
magnitude, typically as large as one-third the anode current being turned off. The GTOs can
block negative voltages whose magnitude depends on the details of the GTO design. Idealized
characteristics of the device operating as a switch are shown in Figure 8-14c.
Even though the GTO is controllable switch in the same category as MOSFETs and
BJTs, its turn-off switching transient is different from one for MOSFETs and BJTs. This is
because presently available GTOs cannot be used for inductive turn-off such as illustrated in
MOSFETs and GTOs unless a snubber circuit is connected across the GTO (See Figure 8-14a)
This is a consequence of the fact that a large dv/dt that accompanies inductive turn-off can-
not be tolerated by present-day GTOs. Therefore a circuit to reduce dv/dt at turn-off that con-
sist of R, C, and D, as shown in Figure 8-14a must be used across the GTO. The resulting
waveforms are shown in Figure 8-14b, where dv/dt is significantly reduced compared to the
dv/dt that would result without the turn-off snubber circuit.
The GTOs have advantages over SCRs: (1) elimination of commutating components
in forced commutation, resulting in reduction in cost, weight, and volume; (2) reduction in
acoustic and electromagnetic noise due to the elimination of communication chocks; (3) faster
turn-off, permitting high switching frequencies ; and (4) improved efficiency of converters.
131
In low power applications, GTOs have the following advantages over bipolar
transistors: (1) higher blocking voltage capability; (2) high ratio of peak controllable current
to average current; (3) high ratio of peak surge current to average current, typically 10:1;
(4) high on-state gain (anode current / gate current), typically 600; and (5) pulsed gate signal
of short duration. Under surge conditions, a GTO goes into deeper saturation due to regener-
ative action. On the other hand, a bipolar transistor tends to come out of saturation.
Reverse-Conducting Thyristors
This device is turned on by direct radiation of silicon with light. Electron-hole pairs
which are created due to the radiation produce triggering current under the influence of
electric field. The gate structure is designed to provide sufficient gate sensitivity for triggering
from practical light sources (e.g. , LED and to accomplish high di/dt and dv/dt capabilities).
The LASRCs are used in high-voltage and high-current applications [e.g., high-
voltage ( HVDC ) transmission and static reactive power or volt-ampere reactive ( VAR )
compensation]. An LASCR offers complete electrical isolation between the light-triggering
source and the switching device of the power converter, which floats at a potential of as high
as a few hundred kilovolts. The voltage rating of an LASCR could be as high as 4 kV at
1500A with light-triggering power of less than 100mW. The typical di/dt is 250 A/ s and
the dv/dt could be as high as 2000 V/ s.
FET-Controlled Thyristors
MOS-Controlled Thyristors
The MOS-controlled thyristor (MCT) is a new device that has just appeared on the
commercial market. Its circuit symbol is shown in Figure 8-18a, and its i-v characteristic is
shown in Figure 8-18b. The two slightly different symbols for the MCT denote whether the
device is a P-MCT or an N-MCT. The difference between the two arises from the different
locations of the control terminals.
From the i-v characteristic it is apparent that the MCT has many of the properties of
a GTO, including a low voltage drop in the on state at relatively high currents and a latching
characteristic (the MCT remains on even if the gate drive is removed). The MCT is a voltage-
controlled device like the IGBT and the MOSFET, and approximately the same energy is re-
quired to switch an MCT as for a MOSFET or an IGBT.
The MCT has two principal advantages over the GTO, including much simpler drive
requirements (no large negative gate current required for turn-off like the GTO) and faster
switching speeds (turn-on and turn-off times of a few microseconds).The MCTs have smaller
on-state voltage drops compared to IGBTs of similar ratings and are presently available in
voltage ratings to 1500 V with current ratings of 50 A to a few hundred amperes. Devices
with voltage ratings of 2500-3000 V have been demonstrated in prototypes and will be avail-
able soon. The current ratings of individual MCTs are significantly less than those of GTOs
because individual MCTs cannot be made as large in cross-sectional area as a GTO due to
their more complex structure.
A cross-section of an MCT containing MOSFETs for control of the turn-on and turn-
off transitions is illustrated in Figure 8-19. An equivalent circuit which explains the operation
of this structure is given in Figure 8-20. To turn the device on, the gate-to-anode voltage is
driven negative. This forward-biases p-channel MOSFETs Q3,forward-biasing the base-emit-
ter junction of BJT Q1. Transistor Q1 and Q2 then latch in the on-state. To turn the device off,
the gate-to-anode voltage is driven positive. This forward-biased n-channel MOSFET Q4,
which in turn reverse-biases the base-emitter junction of BJT Q2, The BJTs then turn off. It is
important that the on-resistance of the n-channel MOSFET be small enough that sufficient
134
influence on the cathode current is exerted—this limits the maximum controllable on state
current (i.e., the maximum current that can be interrupted via gate control).
High-voltage MCTs exhibit lower forward voltage drops and higher current densities
than IGBTs of similar voltage rating and silicon area. However, the switching times are
longer. Like the GTO, the MCT can conduct considerable surge currents; but again, the
maximum current that can be interrupted via gate control is limited. To obtain a reliable turn-
off transition, external snubbers are required to limit the beak anode-to-cathode voltage. A
sufficiently fast gate-voltage rise time is also required. To some extent, the MCT is still an
emerging device—future generation of MCTs may exhibit considerable improvements in
performance and rating.
The circuit symbol for an NPN BJT is shown in Figure 8-21a, and its steady-state i-v
characteristics are shown in Figure 8-21b. As shown in the i-v characteristics, a sufficiently
large base current (dependent on the collector current) results in the device being fully
onThis requires that the control circuit provide a base current that is sufficiently large so that
(8-7)
The on-state voltage VCE(sat) of the power transistors is usually in the 1-2 V range, so
that the conduction power loss in the BJT is quite small. The idealized i-v characteristics of the
BJT operating as a switch are shown in Figure 8-21c.
Bipolar junction transistors are current-controlled devices, and base current must be
supplied continuously to keep them in the on state. The dc current gain hFE is usually only 5-10
in high-power transistors, and so these devices are sometimes connected in a Darlington or
triple Darlington configuration, as is shown in Figure 8-22, to achieve a larger current gain.
Some disadvantages accrue in this configuration including slightly higher overall VCE(sat) values
and slower switching speeds.
Whether in single units or made as a Darlington configuration on a single chip [a
monolithic Darlington (MD)], BJTs have significant storage time during the turn-off transition.
Typical switching times are in the range of a few hundred nanoseconds to a few microseconds.
Including MDs, BJTs are available in voltage ratings up to 1400 V and current ratings
of a few hundred amperes. In spite of a negative temperature coefficient of on-state resistance,
modern BJTs fabricated with good quality control can be paralleled provided that care is taken
in the circuit layout and that some extra current margin is provided, that is, where theoretically
four transistors in parallel would suffice based on equal current sharing, five may be used to
tolerate a slight current imbalance.
At voltage levels below 500V, the BJT has been almost entirely replaced by the MOSFET
in power applications. It is also being displaced in higher voltage applications, where new designs
utilize faster IGBTs or other devices.
Power MOSFETs
The power MOSFET is a modern power semiconductor device having gate lengths
close to one micron. The power device is comprised of many small parallel-connected enhan-
cement-mode MOSFET cells, which cover the surface of the silicon die. A cross-section of
one cell is illustrated in Figure 8-24. Current flows vertically through the silicon wafer; the
metallized drain connection is made on the bottom of the chip, while the metallized source
connection and polysilicon gate are on the top surface. Under normal operating condition, in
–
which VDS 0, both the pn- and pn -junctions are reverse-biased. Figure 8-25a illustrate the
operation of the device in the off state. The applied drain-to-source voltage then appears across
the depletion region of the pn-junction. The n – region is lightly doped, such that the desired
breakdown voltage rating is attained. Figure 8-25b illustrate operation in the on state, with a
sufficiently large positive gate-to-source voltage. A channel then forms at the surface of the
p-region, underneath the gate. The drain current flows through the n – region, channel, n-region
and out through the source contact. The on-resistance of the device is the sum of the resistance
of the n- region, the channel, the source and drain contacts, etc. As the breakdown voltage is
increased to several hundred volts and beyond.
137
The pn-junction is called the body diode; as illustrated in Figure 8-25c, this junction
forms an effective diode in parallel with the MOSFET channel. The body diode can become
forward-biased when the drain-to-source voltage VDS is negative. This diode is capable of
conducting the full rated current of the MOSFET. However, most MOSFETs are not optimized
with respect to the speed of their body diodes, and the large peak currents that flow during the
reverse recovery transition of the body diode can cause device failure. Several manufacturers
produce MOSFETs that contain fast recovery body diodes; these devices are rated to withstand
the peak currents during the body diode reverse recovery transition.
Typical n-channel MOSFET static switch characteristics are illustrated in Figure 8-26.
The drain current is plotted as function of the gate-to-source voltage, for various values of
drain-to-source voltage. When the gate-to-source voltage is less than the threshold voltage VTh,
the device operates in the off-state. A typical value of VTh is 3V. When the gate-to-source
is greater than 6 or 7V, the device operates in the on-state; typically, the gate is driven to 12 or
15V to ensure minimization of the forward voltage drop. In the on- state, the drain-to-source
voltage VDS is roughly proportional to the drain current ID. The MOSFET is able to conduct
peak currents well in the excess of its average current rating, and the nature of the static char-
acteristics is unchanged at high currents levels. Logic-level power MOSFETs are also avail-
able, which operate in the on-state with a gate-to-source voltage of 5V. A few p-channel
138
devices can be obtained, but their properties are inferior to those of equivalent n-channel
device.
Unlike other power devices, MOSFETs are usually not selected on the basis of their
rated average current. Rather, on-resistance and its influence on conduction loss are the limit-
ing factors, and MOSFETs typically operate at average currents somewhat less than the rated
value.
MOSFETs are usually the device of choice at voltages less than or equal to approxi-
mately 400 to 500V. At these voltages, the forward voltage drop is competitive or superior to
the forward voltage drops of minority-carrier devices, and the switching speed is significantly
faster. Typical switching times are in the range 50 ns to 200 ns. At voltages greater than 400
to 500V, minority-carrier devices having lower forward voltages drops, such as the IGBT, are
usually preferred. The only exception is in applications where the high switching speed over-
rides the increased cost of silicon required to obtain acceptably low conduction loss.
A bipolar junction transistor (BJT) is a current controlled device and requires base
current for current flow in thee collector. Since the collector current is dependent on the input
(or base)current, the current gain is highly dependent on the junction temperature.
A power MOSFET is a voltage-controlled device and requires only a small input
current. The switching speed is very high and the switching times are of the order of nano-
seconds. Power MOSFETs are finding increasing applications in low-power high-frequency
converters. MOSFETs do not have the problem of second breakdown phenomena as do BJTs.
However, MOSFETs have the problems of electronic discharge and require special care in
handling. In addition, it is relatively difficult to protect them under short-circuited fault con-
ditions.
MOSFETs are two types: (1) depletion MOSFETs, and (2) enhancement MOSFETs.
An n-channel depletion-type MOSFETs is formed on p-type silicon substrate as shown in
Figure 8-24a, with two heavily dopped n+ silicon for low-resistance connections. The gate is
isolated from the channel by a thin oxide layer. The three terminals are gate, drain, and source.
The substrate is normally connected to the source. The gate-to-source voltage, VGS, could be
139
either positive or negative. If VGS is negative, some of the electrons in the n-channel area
will be repelled and a depletion region will be created below the oxide layer, resulting in a
narrower effective channel and high resistance from the drain to source, RDS. If VGS is made
negative enough, the channel will be completely depleted, offering a high value of RDS, and
there will be no current flow from the drain to source, IDS = 0. The value of VGS when this
happens is called pinch-off voltage, Vp. On the other hand, VGS is made positive, the channel
becomes wider, and IDS increases due to reduction in RDS. With a p-channel depletion-type
MOSFET, the polarities of VDS, IDS, and VGS are reversed.
An n-channel enhancement-type MOSFET has no channel, as shown in Figure 8-25
If VGS is positive, an induced voltage will attract the electrons from the p-substrate and
accumulate them at the surface beneath the oxide layer. If VGS is greater than or equal to a
value known as threshold voltage, VT, a sufficient number of electrons are accumulated to
form a virtual n-channel and the current flows from the drain to source. The polarities of
VDS, IDS, and VGS are reversed for a p-channel enhancement-type MOSFET.
140
When thyristors are connected in parallel, the total load current is not shared equally
due to differences in their characteristics. If a thyristor carries more current than that of others,
its power dissipation increases, thereby increasing the junction temperature and decreasing the
internal resistance. This ,in turn, will increase its current sharing and may damage the thyristor
This thermal runway may be avoided by having a common heat sink so that all units operate at
the same temperature.
Although small resistance, as shown in Figure 8-17a, may be connected in series with
each thyristor to force equal current sharing, there will be considerable power loss in series re-
sistances. A common approach which is similar to the technique for current sharing of transis-
tor is to use magnetically coupled inductors as shown in Figure 8-17b. If the current through
thyristor T1 increases, a voltage of opposite polarity will be in the windings of thyristor T2 and
the impedance through the path of T2 will be reduced, thereby increasing the current flow
through T2.
141
The circuit symbol for an IGBT is shown in Figure 8-26a and its characteristics are
shown in Figure 8-26b. The IGBTs have some of the advantages of the MOSFET, the BJT, and the
GTO combined. Similar to the MOSFET, the IGBT has a high impedance gate, which requires only
a small amount of energy to switch the device. Like the BJT, the IGBT has a small on-state voltage
even in devices with large blocking voltage ratings (for example, VON is 2-3 V in a 1000V device).
Similar to the GTO, IGBTs can be designed to block negative voltages, as their idealized switch
characteristics shown in Figure 8-26c indicate.
Insulated gate bipolar transistors have turn-on and turn-off times on the order of 1 ps and are
available in module ratings as large as 1700 V and 1200 A. Voltage ratings of up to 2-3 kV are
projected.
A cross-section of the IGBT is shown in Figure 8-27. Comparison with the power
MOSFETs reveals that the IGBT and power MOSFET are very similar in construction. The key
difference is the p-region connected to the collector of the IGBT. So the IGBT is a modern four-
layer power semiconductor device having a MOS gate.
142
The function of the added p-region is to inject minority charges into the n— region while the
device operate in the on-state, as illustrated in Figure 8-27. When the IGBT conducts, the pn—
junction is forward-biased, and the minority charges injected into the n— region cause conductivity
modulation. This reduces the on-resistance of the n— region, and allows high-voltage IGBTs to be
constructed which have low forward voltage drops. As of 1999, IGBTs rated as low as 600V and as
high as 3300V are readily available. The forward voltage drops of these devices are typically 2 to
4V, much lower than would be obtained in equivalent MOSFETs of the same silicon area.
Several schematic symbols for the IGBT are in current use; the symbol illustrated into
Figure 8-28a is the most popular. A tow-transistor equivalent circuit for the IGBT is illustrated in
Figure 8-28b. The IGBT functions effectively as an n-channel power MOSFET, cascaded by a PNP
emitter-follower BJT. The physical locations of the two effective devices are illustrated in Figure
8-29. It can be seen that there are two effective currents: the effective MOSFET channel current ,
and the effective PNP collector current
The price paid for the reduced voltage drop of the IGBT is its increased switching times,
especially during the turn-off transition. In particular, the IGBT turn-off transition exhibits a
phenomenon known as current trailing. The effective MOSFET can be turned-off quickly, by
removing the gate charge such that the gate-to-emitter voltage is negative. This causes the channel
current to quickly become zero. However, the PNP collector current continues to flow as long
—
as minority charge is present in the n region. Since there is no way to actively remove the stored
minority charge, it slowly decays via recombination. So slowly decays in proportion to the
minority charge, and a current tail is observed.
143
The length of the current tail can be reduced by introduction of recombination centers in the
—
n region, at the expense of a somewhat increased on-resistance. The current gain of the effective
PNP transistor can be also minimized, causing to be greater than . Nonetheless, the turn-off
switching time of the IGBT is significantly longer than that of the MOSFET, with typical turn-off
times in the range 0.5 to 5 . The switching frequencies of PWM converters containing IGBTs
are typically in the range 1 to 30 kHz.
The added pn— diode junction of the IGBT is not normally designed to block significant
voltage. Hence, the IGBT has negligible reverse voltage-blocking capability.
Since the IGBT is four-layer device, there is a possibility of SCR-type latchup, in which the
IGBT cannot be turned off by gate voltage control. Recent devices are not susceptible to this
problem. These devices are quite robust, hot-spot and current crowding problems are nonexistent,
and the need for external snubber circuit is minimal.
The on-state forward voltage drop of the IGBT can be modeled by a forward-biased diode
junction, in series with an effective on-resistance. The temperature coefficient of the IGBT forward
voltage drop is complicated by the fact that the diode junction voltage has a negative temperature
coefficient, while the on-resistance has a positive temperature coefficient. Fortunately, near rated
current the on-resistance dominates, leading to an overall positive temperature coefficient. In
consequence, IGBTs can be easily connected in parallel with a modest current derating. Large
modules are commercially available, containing multiple parallel-connected ships.
Figure 8.30 shows a photograph of a 1200-A, 3300-V IGBT module fabricated by Mitsubishi.
144
Only a few definite statements can be made in comparing these devices since a number of properties
must be considered simultaneously and because the devices are still evolving at a rapid pace.
However, the qualitative observations given in Table 8-2 can be made.
It should be noted that in addition to the improvements in these devices, new devices are being
investigated. The progress in semiconductor technology will undoubtedly lead to higher power
ratings, faster switching speeds, and lower costs. A summary of power device capabilities is shown
in Figure 8-31.
On the other hand, the forced-commutated thyristor, which was once widely used in circuits for
controllable switch applications, is no longer being used in new converter designs with the possible
exception of power converters in multi-MVA ratings. This is a pertinent example of how the
advances in semiconductor power devices have modified converter design.
145
a pulse train as show in Figure 8-34d . In practice, the AND gate cannot drive transistor Q1
directly ,and a buffer stage is normally connected before the transistor.
There are different methods of gate triggering of the thyristors which are:
R-triggering method.
RC-triggering method.
UJT-triggering method.
Design
With, R2 = 0 we need to ensure that, where is the maximum or peak gate current
of the SCR. Therefore . Also with R2 = 0, we need to ensure that the voltage drop
across resistor ‘R’ does not exceed , the maximum gate voltage
( )
Operation
Case 1:
, the peak gate voltage is less then since is very large. Therefore, current ‘I’ flowing
through the gate is very small. SCR will not turn on and therefore the load voltage is zero and
is equal to . This is because we are using only a resistive network. Therefore, output will
be in phase with input.
When is set to an optimum value such that , we see that the SCR is triggered at
(since reaches its peak at only). The waveforms shows that the load voltage is zero
till and the voltage across the SCR is the same as input voltage till it is triggered at .
The triggering value is reached much earlier than . Hence the SCR turns on earlier than
VS reaches its peak value. The waveforms as shown with respect to .
At
Therefore ( )
151
But
Therefore * +
RC Half Wave
Capacitor ‘C’ in the circuit is connected to shift the phase of the gate voltage. D1 is used to
prevent negative voltage from reaching the gate cathode of SCR. See Figure 8-36 and Figure
8-37.
In the negative half cycle, the capacitor charges to the peak negative voltage of the supply
through the diode . The capacitor maintains this voltage across it, till the supply voltage
crosses zero. As the supply becomes positive, the capacitor charges through resistor ‘R’ from
initial voltage of , to a positive value.
When the capacitor voltage is equal to the gate trigger voltage of the SCR, the SCR is fired
and the capacitor voltage is clamped to a small positive value.
152
Operation
Case 1: R Large.
When the resistor ‘R’ is large, the time taken for the capacitance to charge from to is
large, resulting in larger firing angle and lower load voltage.
Case 2: R Small
When ‘R’ is set to a smaller value, the capacitor charges at a faster rate towards resulting in
early triggering of SCR and hence is more. When the SCR triggers, the voltage drop across
it falls to 1 – 1.5V. This in turn lowers, the voltage across R & C. Low voltage across the SCR
during conduction period keeps the capacitor discharge during the positive half cycle.
Design Equation
From the circuit. . Considering the source voltage and the gate circuit, we can
write SCR fires when That is
Therefore. The RC time constant for zero output voltage that is
The following table summarizes the procedures of using various gate terminations
154
Gate characteristics of SCRs vary from device to device and even in devices within
the same family. For this reason, the specifications provided in the manufacturers’ data
sheet provide a range of values in the form of characteristics diagrams. Such a diagram,
shown in Figure 8-38, defines the limits of dc or static gate currents and voltages that may
be used to trigger a device of a given family. The boundary lines of the maximum and
minimum gate impedances on the characteristic diagram represent the loci of all possible
triggering points of SCRs of a particular family.
The magnitude of gate voltage and gate current to trigger an SCR varies inversely as the
junction temperature as shown in Figure 8-38. The lower the junction temperature, the worse is
the condition to trigger. There is a minimum gate voltage below which the SCR cannot be
triggered at any temperature. This voltage is sometimes called the gate non-trigger voltage Vgn,
defined as the maximum dc gate voltage that may be applied between gate and cathode o an SCR
for which the device can maintain its rated blocking voltage. This voltage is usually specified at
the junction temperature of 100 . The noise signal should therefore, be kept below this voltage
to avoid spurious firing. Through it is the simplest to apply a dc voltage for triggering an SCR, for
precise and reliable triggering, the SCR gate is overdriven by a pulse current much larger value
than the dc gate current required to trigger the device. In modern devices, the maximum gate
current and voltage which may be applied safely greatly exceed the values required to trigger
under dc condition. This enables the designer to have a much lager triggering area without the
risk of damage. But n no case should the maximum allowable gate dissipation be exceeded. In
order to avoid exceeding the maximum continuous power rating of the gate when applying a high
peak signal, it must be applied as a pulse and not as a continuous signal. With smaller pulse
width, the peak current and voltage required to trigger an SCR are larger. This effect is more
pronounced with a pulse width shorter than 20 as shown in Figure 8-39.
155
For shorter pulses, the SCR may be generally considered to be a charge-controlled device,
such as a transistor. The free charge stored within the gate p-layer of the SCR may be considered to
be the difference between the incoming gate current and the recombination rate. For a
constant , i.e. for dc gate current, the free stored charge is a direct function of gate current for a
given recombination rate. The SCR triggers when this free charge at the gate junction reaches a
certain level. This requires a finite time which depends on the recombination rate. If this time is to be
shortened, a higher value of gate voltage and current is required for triggering as shown in Figure 8-
39. For triggering an SCR, the current must also build up rapidly at least up to the latching current
during the period of presence of the gate pulse. For a highly inductive circuit, it is, therefore,
necessary to increase the pulse width of the gate pulse.
The use of a large current pulse reduces variation in turn-on time by minimizing the effect of
temperature on the triggering characteristics and switching time is reduced. Atypical forward gate
characteristic is shown in the Figure 8-40.
156
Figure 8-40 shows the maximum allowable pulse widths for various peak values of gaste
input power. The area XYZ shows the ideal drive area to initiate the turn-on of an SCR. The line YZ,
donated by e, indicates the limiting gate dissipation boundary for a pulse width of 10ms. The gate
signal pulse width is determined by the relationship that exist between the gate power input and the
increase in the temperature of the SCR due to it. For larger device, wider gate trigger pulse can be
used than in the smaller devices because of larger thermal capacities.
The total average dissipation owing to gate trigger pulse is the sum of the average forward
and reverse losses. The total dissipation must be less than the maximum specified limit for a given
pulse width provided in the manufacturers` data sheet. For the selection of SCRs for particular
application, the gate dissipation must be taken into account if it exceed 5% of the total SCR losses. If
the SCR gate dissipation is likely to exceed the maximum value published in the data sheet due to
high forward gate trigger pulses or reverse bias condition, it must be compensated for by reducing
the forward conduction current to maintain the junction temperature within the safe operating limit.
In order to ensure reliable operation of power semiconductor devices, such as diodes and
SCRs for a long period, care must be taken during design that the junction temperature of the device
does not exceed the safe limiting value under any condition of normal or abnormal operating
condition. The following factors are responsible for increase of junction temperature:
1. Sustained overload
2. Transient overload
3. Short-circuit either at the load or in the one of the devices
4. Large
5. Surge voltage
6. Large
7. Excessive gate power in case of SCRs
8. Insufficient gate drive in case of SCRs
Under normal operating conditions with occasional load surges, the maximum current
ratings and peak repetitive voltage of the device are rather important factors. But under abnormal
conditions such as a short-circuit, very high line surge, or high and developed in the
circuit itself, some protective measures are to be adopted to limit them within the respective safe
operating value of the device. Current and voltage transients are generated in SCR circuits by the
switching action of the devices. Turn-on of SCRs is accompanied by the rate of rise of current
that may destroy the SCR, the rate of rise of voltage that may cause undesired turn-on
of other SCRs. The abrupt interruption of current during reverse recovery may cause transient over-
voltages that may destroy the SCR and also cause excessive on other SCRs. Therefore,
snubber circuits made of resistors, capacitors and inductors are used to limit overvoltage peaks,
and within safe values. Quick acting circuit breakers are used to protect the circuit
sustained overloads, and fast rupturing fuses are incorporated for pro-impedance, or adding
reactance in series with the supply lines. Sometimes, current limiting bypass switches (crowbars) are
also used for the same purpose.
157
8.18 Snubbers
With all types of power semiconductors, switching loss is an important consideration. Static-
state losses can be addressed directly with circuit models, but switching losses usually need to be
considered separately. The switching trajectory represents voltage and current evolution. In this
section, auxiliary circuits intended to alter the switching trajectory and reduce losses are considered.
Ehen a semiconductor switch acts alone , the inductance in converter can impose high transient
voltages, especially during turn-off. Excessive voltage ratings might be required to avoid failures.
Alternatively, resonant methods avoid changes in voltages or currents during switching.
Auxiliary circuits intended to manipulate the switching trajectory are termed snubbers since
their primary function is often to suppress the overshoot in voltages and currents.
Snubber is a circuit connected around a power semiconductor device for the purpose of
altering its switching trajectory. Snubbers usually have the objective of reducing power loss in the
semiconductor device.
Snubber circuits act to prevent fast change of voltage and current during switching, so that
the commutation process can become more nearly linear. A simple example is shown in Figure 8-41.
In this case, a parallel capacitor prevent the switch voltage from rising rapidly during turn-off. The
effect on trajectory is to avoid the voltage overshoot caused by the inductor. The circuit is too
simple, however: At turn-on, the charge stored in the capacitor is dissipated through the switch, and
the turn-on trajectory develops a high current overshoot. Trajectories with and without the capacitor
are compared in Figure 8-42.
158
The turn-on overshoot can be avoided by making the snubber unidirectional, as in Figure----
-, to form a turn-off snubber. The resistor has been added to make the capacitor discharge process
gradual and to ensure that the discharge energy is dissipated outside the semiconductor. The circuit
in Figure 8-43 represents a lossy snubber, since energy is dissipated in the resistor. It trades off
resistor loss and semiconductor loss. If the capacitor is chosen correctly, the total loss will be less
than with no snubber in place.
The capacitor and resistor selection process must address two requirements: The capacitor
must be sufficient to avoid voltage overshoot during the current fall, and the RC time constant must
allow the stored energy to dissipate completely during the switch on-time. The useful way to
approach the design is to assume that the current falls linearly during the switching fall time, tf. The
external inductor acts to maintain constant total flow.
159
If C is positive with respect to E and if G is positive with respect to E greater than the
threshold level, n channel is created, current flows through the channel (D to S) of the MOSFET.
The current flowing through the channel serves as the base current for pnp transistor, which causes
emitter current to flow in this transistor resulting in the large-scale injection of holes across the top
pn junction-these holes are responsible for the conductivity modulation of the middle n zone.
Ron of an IGBT is usually 10 times smaller than that of a power MOSFET of the same size and
voltage capability. This is because of the conductivity modulation process in the drift region.
The major current flow through the drive MOSFET again because of the conductivity modulation of
the drift region.
Vdrift < that of power MOSFET, and IDRchannel ~ that of power MOSFET
Normally, the on-state or saturation voltage drop is used is instead of on-state resistance.
Even in IGBTs with the same structure, the IGBT with a fast switching speed has a larger on-state
voltage drop, and vice-versa.
160
The on-state voltage changes little between room temperature and the maximum junction
temperature. This is because of the combination of positive temperature coefficient of the MOSFET
section and the negative temperature coefficient of the voltage drop across the drift region.
161
Resistive Load
Figure 9-1b shows the voltage waveforms for a controlled half-wave rectifier
with a resistive load. A gate signal is applied to the SCR at 𝜔𝑡 = 𝛼 , where α is
the delay angle. The average (dc) voltage across the load resistor in Fig. 9-1a is
𝜋
1 𝑉𝑚
𝑉𝑜 = � 𝑉𝑚 sin(𝜔𝑡)𝑑(𝜔𝑡) = (1 + cos 𝛼)
2𝜋 2𝜋
𝛼
(9-1)
2
The power absorbed by the resister is 𝑉𝑟𝑚𝑠 /𝑅 , where the rms voltage across
the the resistor is computed from
2𝜋
1
𝑉𝑟𝑚𝑠 = � � 𝑣𝑜2 (𝜔𝑡)𝑑(𝜔𝑡)
2𝜋
0
2𝜋
1
= � � [𝑉𝑚 sin(𝜔𝑡)]2 𝑑(𝜔𝑡)
2𝜋
𝛼
𝑉𝑚 𝛼 sin(2𝛼)
= �1 − +
2 𝜋 2𝜋
(9-2)
162
+ vSCR −
iG +
+
vs = Vm sin(ωt) Gate R vo
Control
− −
(a)
vs
ωt
vo
a ωt
vSCR
a ωt
(b)
2𝜋
= cos −1 �40 � � − 1� = 61.2𝑜 = 1.07 𝑟𝑎𝑑
√2(120)
163
RL Load
A controlled half-wave rectifier with an RL load is shown in Fig. 9-2a. The
analysis of this circuit is similar to that of the uncontrolled rectifier. The
current is the sum of the forced and natural responses:
𝑉𝑚
sin(𝜔𝑡 − 𝜃) + 𝐴𝑒 −𝜔𝑡/𝜔𝜏
𝑖(𝜔𝑡) = 𝑖𝑓 (𝜔𝑡) + 𝑖𝑛 (𝜔𝑡) =
𝑍
𝜔𝑙
𝑤ℎ𝑒𝑟𝑒 𝑍 = �𝑅 2 + (𝜔𝑙)2 𝑎𝑛𝑑 𝜃 = tan−1 � �
𝑅
(9-3)
The constant A is determined from the initial condition i(𝛼)=0:
𝑉𝑚 𝛼
𝑖(𝛼) = 0 = sin(𝛼 − 𝜃) + 𝐴𝑒 −𝜔𝜏
𝑍
𝑉𝑚
𝐴 = �− sin(𝛼 − 𝜃)� = 𝑒 𝛼/𝜔𝜏
𝑍
(9-4)
𝑉𝑚 (𝛼−𝜔𝑡)/𝜔𝜏
𝑖(𝜔𝑡) = � 𝑍 �sin(𝜔𝑡 − 𝜃) − sin(𝛼 − 𝜃)𝑒 � 𝑓𝑜𝑟 𝛼 ≤ 𝜔𝑡 ≤ 𝛽
0 𝑜𝑡ℎ𝑒𝑟𝑤𝑖𝑠𝑒
(9-5)
The extinction angle 𝛽 is defined as the angle at which the current returns to
zero, as in the case of the uncontrolled rectifier. When 𝜔𝑡 = 𝛽 ,
𝑉𝑚
𝑖(𝛽) = 0 = �sin(𝛽 − 𝜃) − sin(𝛼 − 𝜃)𝑒 −(𝛼−𝛽)/𝜔𝜏 �
𝑍
which must be solved numerically for 𝛽. The angle 𝛽 − 𝛼 is called the conduc-
tion angle 𝛾. Figure 9-2b shows the voltage waveforms.
164
at 𝛽 = 𝜔𝑡 𝑖 = 0
(𝛼−𝛽)𝑅
sin(𝛽 − 𝜃) − sin(𝛼 − 𝜃) 𝑒 𝜔𝑙 =0 , 𝑙𝑒𝑡 𝛾 = 𝛽 − 𝛼 𝑠𝑜 𝛽 = 𝛾 + 𝛼
𝛾
−
sin(𝛼 + 𝛾 − 𝜃) = sin(𝛼 − 𝜃)𝑒 𝜔𝑙/𝑅
𝛾
−
sin 𝛾 cos(𝛼 − 𝜃) + sin(𝛼 − 𝜃) cos 𝛾 = sin(𝛼 − 𝜃)𝑒 𝜔𝑙/𝑅
sin 𝛾
tan(𝛼 − 𝜃) = 𝛾
−
𝑒 𝜔𝑙/𝑅 − 𝑐𝑜𝑠𝛾
(9-6)
Equation (9-6) is used in one case when 𝜃 𝑎𝑛𝑑 𝛾 are known and Figure (9-3)
is used to find one of 𝜃, 𝛾, 𝛼 if two of them are known
Figure 9-3
165
vSCR
+ −
+ +
i vR
+
vs −
vo
+
−
vL
− −
(a)
vR
0 ωt
α π β 2π 2π + α
vs
vL
0
α ωt
β 2π + α
vSCR
0 2π ωt
2π + α
α β
(b)
𝛽
1
𝐼𝑟𝑚𝑠 = � � 𝑖 2 (𝜔𝑡)𝑑(𝜔𝑡)
2𝜋
𝛼
(9-9)
166
EXAMPLE 9-2
3.79
RL-Source Load
A controlled rectifier with a series resistance, inductance, and dc source is shown
in Fig. 9-4. The analysis of this circuit is very similar to that of the uncontrolled
half-wave rectifier discussed earlier in chapter 6. The major difference is that
for the uncontrolled rectifier, conduction begins as soon as the source voltage
167
R L
i
+ +
Vm sin(ωt) - Vdc
reaches the level of the dc voltage. For the controlled rectifier, conduction begins
when a gate signal is applied to the SCR, provided the SCR is forward-biased.
Thus, the gate signal may be applied at any time that the ac source is larger than
the dc source:
𝑉𝑑𝑐
𝛼𝑚𝑖𝑛 = sin−1 � � (9-11)
𝑉𝑚
Current is expressed as in Eq. (3-22), with specified within the allowable range:
Vm V
sin (t ) dc Ae t>
for t
Z R
i(t)d (9-12)
0 otherwise
sin( ) de
Z R
EXAMPLE 9-3
(a) First, use Eq. (9-11) to determine if 𝛼 = 5 is allowable. The minimum delay angle is
100
min sin 1 a b 36°
12012
i(t) 21.8 sin (t 1.312) 50 75.0e t>3.77 A for 0.785t3.37 rad
where the extinction angle 𝛽 is found numerically to be 3.37 rad .
2
(b) Power absorbed by the resistor is 𝐼𝑟𝑚𝑠 𝑅 , where 𝐼𝑟𝑚𝑠 is computed from Eq.9-9
using the preceding expression for i(𝜔t).
1
Irms i 2(t)d(t) 3.90 A
E 2 L
P (3.90) 2 (2) 30.4 W
(c) Power absorbed by the dc source is IoVdc, where Io is computed from Eq. (9-8).
1
Io i(t)d(t) 2.19 A
2 L
Pdc IoVdc (2.19)(100) 219 W
Resistive Load
The output voltage waveform for a controlled full-wave rectifier with a resistive load is
shown in Fig.9-5 c. The average component of this waveform is deter-mined from
1 V
Vo V sin (t) d(t) m (1 cos ) (9-13)
3 m
169
+
S1 S3
vs = +
Vm sin ωt vo
−
S4 S2 -
(a)
S1
- vo +
+
−
S2
(b)
vo
0 a π π+a 2π ωt
(c)
EXAMPLE 9-4
• Solution
The average output voltage is determined from Eq. (9-13).
Vo m A 1 cos B A 1 cos 40° B 95.4 V
V 22 (120)
Average load current is
V 95.4
Io o 4.77 A
R 20
Power absorbed by the load is determined from the rms current from Eq. (9-14), remem-
bering to use 𝛼 in radians.
22(120) 1 0.698 sin[2(0.698)]
Irms 5.80 A
20 A 2 2 4
P I 2rms R (5.80)2 (20) 673 W
The rms current in the source is also 5.80 A, and the apparent power of the source is
S Vrms Irms (120)(5.80) 696 VA
Power factor is
P 672
pf 0.967
S 696
C sin (t
) sin (
) e (t)> D
Vm
i o(t) for t
Z
where (9-16)
L L
Z 2R2 (L)2
tan1 a b and
R R
171
io
+
R
vs (𝜔t) =
𝑉𝑚 sin(𝜔𝑡) +
- vo
L
-
(a)
io
0
a π β π+a 𝜔t
Vm
vo
0
π 2π 𝜔t
(b)
io
a π π+a 𝜔t
vo
0
π 2π 𝜔t
(c)
The above current function becomes zero at 𝜔t =𝛽. If 𝛽< π+α , the current
remains at zero until 𝜔t =π+α when gate signals are applied to S3 and S4
which are then forward-biased and begin to conduct. This mode of operation is
called discontinuous current, which is illustrated in Fig.9-6b.
𝛽< α + 𝜋 discontinuous current (9-17)
172
120
Vm 169.7 V
12
Z 2R2 (L)2 210 2 [(377)(0.02)]2 12.5 Æ
L (377)(0.02)
tan 1 a b tan 1 c d 0.646 rad
R 10
L (377)(0.02)
0.754 rad
R 10
60° 1.047 rad
Solving io(𝛽 ) = 0 numerically for 𝛽 , 𝛽 = 3.78 rad (216°). Since 𝜋 + 𝛼= 4.19 > 𝛽,
the current is discontinuous, and the above expression for current is valid.
(b) Average load current is determined from the numerical integration of
1
Io i (t) d (t) 7.05 A
3 o
2
(c) Power absorbed by the load occurs in the resistor and is computed from 𝐼𝑟𝑚𝑠 𝑅 , 𝑤ℎ𝑒𝑟𝑒
1
Irms i (t) d(t) 8.35 A
C 3 o
P (8.35)2(10) 697 W
Since the initial condition for current in the second half-cycle is not zero, the
current function does not repeat. Equation (9-16) is not valid in the steady state
for continuous current. For an RL load with continuous current, the steady-state
current and voltage waveforms are generally as shown in Fig. 9-6c.
The boundary between continuous and discontinuous current occurs when 𝛽
for Eq. (9-16) is 𝜋 + 𝛼. The current at 𝜔𝑡 = 𝜋 + 𝛼 must be greater than zero for
continuous-current operation.
i( ) 0
sin(
) sin(
) e ()> 0
Using
sin(
) sin(
)
sin(
) A 1 e (>) B 0
Solving for ,
Using
L
tan1 a b
R
L
tan1 a b for continuous current
R (9-18)
Either Eq. (9-17) or Eq. (9-18) can be used to check whether the load current
is continuous or discontinuous.
A method for determining the output voltage and current for the continuous-
current case is to use the Fourier series. The Fourier series for the voltage wave-
form for continuous-current case shown in Fig. 9-6c is expressed in general
form as q
Vn 2a 2n b 2n ()()
(9-21)
174
Irms I 2o a
C n2,4,6 Á 12
where
(9-23)
Vo V Vn
Io and In n
R Zn ƒ R jn 0L ƒ
1.0
n=2
0.8
0.6
Vn !Vm
0.4
n=4
n=6
0.2
n=8
0 40 80 120 160
90
Delay Angle
As the harmonic number increases, the impedance for the inductance increases.
Therefore, it may be necessary to solve for only a few terms of the series to be
able to calculate the rms current. If the inductor is large, the ac terms will become
small, and the current is essentially dc.
EXAMPLE 9-6
2Vm 222(120)
V0 cos cos(60°) 54.0 V
The amplitudes of the ac terms are computed from Eqs. (9-21) and (9-22) and are ()
summarized in the following table where,𝑍𝑛 = |𝑅 + 𝑗𝜔𝑙| and In = 𝑉𝑛/𝑍𝑛
n an bn Vn Zn In
0 (dc) — — 54.0 10 5.40
2 -90 -93.5 129.8 76.0 1.71
4 46.8 -18.7 50.4 151.1 0.33
6 -3.19 32.0 32.2 226.4 0.14
P (5.54)2(10) 307 W
Note that the rms current could be approximated accurately from the dc term and
one ac term (n = 2). Higher-frequency terms are very small and contribute little to
the power in the load.
176
The controlled rectifier with a load that is a series resistance, inductance, and dc voltage (Fig.
9-8) is analyzed much like the uncontrolled rectifier discussed earlier in chapter 7. For the
controlled rectifier, the SCRs may be turned on at any time that they are forward-biased,
which is at an angle Vdc
sin1 a b
Vm (9-24)
For the continuous-current case, the bridge output voltage is the same as in
Fig. 9-6c. The average bridge output voltage is
2Vm (9-25)
Vo cos
R L io
+
+
vs (ωt) = +
Vm sin(ωt) − vo Vdc
–
–
The delay angle which will produce a 150 V dc output from the rectifier
is determined from Eq. (9-25).
Vo (150)()
cos1 a b cos1 c d 46°
2Vm 212(240)
(b) Variation in load current is due to the ac terms in the Fourier series.
The load current amplitude for each of the ac terms is
𝑉𝑛
𝐼𝑛 =
𝑍𝑛
where Vn is described by Eqs. (9-21) and (9-22) or can be estimated
from the graph of Fig. 9-7. The impedance for the ac terms is
𝑍𝑛 = |𝑅 + 𝑗𝑛𝜔𝑜 𝐿|
Since the decreasing amplitude of the voltage terms and the increasing
magnitude of the impedance both contribute to diminishing ac currents as
n increases, the peak-to-peak current variation will be estimated from the
first ac term. For n = 2, Vn/Vm is estimated from Fig. 9-7 as 0.68 for α =
46°, making V2 = 0.68Vm =0.68 (240 √2) = 230 V. The peak-to-peak
variation of 2 A corresponds to a 1-A zero-to-peak amplitude. The
required load impedance for n = 2 is then
𝑉2 230 v
𝑍2 = = = 230 Ω
𝐼2 1A
The 5-Ω resistor is insignificant compared to the total 230-Ω required impedance, so 𝑍𝑛 ≈ 𝑛𝜔𝐿.
Solving for L.
𝑍2 230
𝐿≈ = = .31 H
2𝜔 2(377)
A slightly larger inductance should be chosen to allow for the effect of higher-order ac terms.
ac current terms and the bridge is lossless, the power absorbed by the
bridge and transferred to the ac system is
Pbridge = Pac = - loVo
(9-29)
vo
Vm sin ωt –Vm sin ωt
απ ωt
Example 9-8
-Solution
For the solar cell array to supply 1000 W, the average current must be
𝑃𝑑𝑐 1000
𝐼𝑜 = = = 9.09 𝐴
𝑉𝑑𝑐 110
The average output voltage of the bridge is determined from Eq. (9-26).
Power absorbed by the bridge and transferred to the ac system is determined from
Eq. (9-29).
Pac ⫽ ⫺ Vo Io ⫽ (⫺9.09) (⫺105.5) ⫽ 959 W
Power absorbed by the resistor is
PR ⫽ I 2rms R L I 2o R ⫽ (9.09)2(0.5) ⫽ 41 W
Note that the load current and power will be sensitive to the delay angle and the voltage
drops across the SCRs because bridge output voltage is close to the dc source voltage. For
example, assume that the voltage across a conducting SCR is 1 V. Two SCRs conduct at
all times, so the average bridge output voltage is reduced to
Vo ⫽ ⫺105.5 ⫺ 2 ⫽ ⫺107.5 V
Average load current is then
⫺ 107.5 ⫺ (⫺110)
Io ⫽ ⫽ 5.0 A
0.5
Power delivered to the bridge is then reduced to
Pbridge (107.5)(5.0) 537.5 W
Average current in each SCR is one-half the average load current. Power absorbed by
each SCR is approximately
1 1
PSCR ISCRVSCR IoVSCR (5)(1) 2.5 W
2 2
Total power loss in the bridge is then 4(2.5) 10 W, and power delivered to the ac source
is 537.5 10 527.5 W.
Normalized 𝑉𝑜
(9-30)
where only odd harmonics h are present. The rms value of its fundamental-frequency component
is1 , plotted in Fig. 9-11a, is
2
𝐼𝑠1 = √2 𝐼𝑑 = 0.9𝐼𝑑
𝜋
(9-31)
which are plotted in Fig. 9-11b. By applying the basic definition of rms to the
𝑖𝑠 wavefom, the rms value Is can be shown to be equal to the de current:
𝐼𝑠 = 𝐼𝑑
(9-33)
From Eqs. 9-31 and 9-33, the total harmonic distortion can be calculated as
2
�𝐼𝑠2 − 𝐼𝑠1
%𝑇𝐻𝐷 = 100 × = 48.43%
𝐼𝑠1
and 𝑉𝑑𝑐 can be varied from 2𝑉𝑚 /𝜋 to 0 by varying 𝛼 𝑓𝑟𝑜𝑚 0 𝑡𝑜 𝜋 . The maximum average
output voltage is 𝑉𝑑𝑚 = 2𝑉𝑚 /𝜋 and the maximum normalized average output voltage is
𝑉𝑑𝑐
𝑉𝑛 = = 0.5(1 + cos 𝛼)
𝑉𝑑𝑚
(9-37)
The rms output voltage is found from
1/2 1/2
2 𝜋 𝑉𝑚2 𝜋
𝑉𝑟𝑚𝑠 = � � 𝑉𝑚2 𝑠𝑖𝑛2 𝜔𝑡 𝑑𝜔𝑡� = � � (1 − cos 2𝜔𝑡) 𝑑𝜔𝑡�
2𝜋 𝛼 2𝜋 𝛼
𝑉𝑚 1 sin 2𝛼 1/2
= � �𝜋 − 𝛼 + ��
√2 𝜋 2
(9-38)
183
184
Three-phase converters provide higher average output voltage, and in addition the
frequency of the ripples on the output voltage is higher compared to that of single-phase
converters. As a result, the filtering requirements for smoothing out the load current is simpler.
For these reasons, three-phase converters are used extensively in high-power variable-speed
drives. Three single-phase half-wave converters can be connected to form a three-phase half-
wave converter, as shown in Fig10.1a.
For this reason thyristor 𝑇1 in line a of Fig.10.1a cannot be successfully fired until
= 𝜋/6 . Prior to the instant 𝜔𝑡 = 30°, shown in Fig. 10.1, voltage 𝑣𝑎𝑛 (𝑡) is less positive than
𝑣𝑐𝑛 (𝑡) , so that a reverse voltage exists across 𝑇1 . The crossover point of successive phase
voltages (i.e., 𝜔𝑡 = 30°) is therefore taken as the zero or datum from which switching-angle
retardation is measured. The most usual form of control is to switch on each device at an
identical point on wave of its respective anode voltage. This causes equal currents in the supply
lines.
When thyristor 𝑇1 is fired at 𝜔𝑡 = 𝜋/6 +𝜶 , the phase voltage 𝑣𝑎𝑛 appears across the
load until thyristor 𝑇2 is fired at 𝜔𝑡 = 5𝜋/6 + 𝛼 . When thyristor 𝑇2 is fired, thyristor 𝑇1 is
reverse biased, because the line-to-line voltage is negative and 𝑇1 is turned off. The phase
voltage 𝑣𝑏𝑛 appears across the load until thyristor 𝑇3 is fired at 𝜔𝑡 = 3𝜋/2 +𝛼 . When
thyristor 𝑇3 is fired, 𝑇2 is turned off and 𝑣𝑐𝑛 appears across the load until 𝑇1 is fired again at
the beginning of next cycle so each thyristor conducts for 2𝜋/3 radians . Figure 10.1b shows
the v-i characteristics of the load and this is a one-quadrant converter. Figure 10.1c shows the
input voltages, output voltage, and the current through thyristor 𝑇1 for a highly inductive load.
The frequency of output ripple voltage is 3𝑓𝑆 .This converter is not normally used in practical
systems, because the supply currents contain dc components.
If the phase voltage is 𝑣𝑎𝑛 = 𝑉𝑚 sin 𝜔𝑡 𝑑𝜔𝑡 ,the average output voltage for a continuous
load current is
5𝜋
+𝛽
3 6 3√3𝑉𝑚 3𝑉𝐿𝑚
𝑉𝑑𝑐 = � 𝑉𝑚 sin 𝜔𝑡 𝑑𝜔𝑡 = cos 𝛼 = cos 𝛼
2𝜋 𝜋+𝛼 2𝜋 2𝜋
6
(10-1)
185
Where 𝑉𝑚 is the peak phase voltage, and 𝑉𝐿𝑚 = √3𝑉𝑚 is the peak line to line voltage . .
The maximum average output voltage that occurs at delay angle, 𝛼 = 0 is:
3√3𝑉𝑚
𝑉𝑑𝑚 =
2𝜋
and the normalized average output voltage is :
𝑉𝑑𝑐
𝑉𝑛 = = cos 𝛼
𝑉𝑑𝑚
(10-2)
186
5𝜋 1/2
+𝛼 1/2
3 6 1 √3
𝑉𝑟𝑚𝑠 =� � 𝑉 2 𝑠𝑖𝑛2 𝜔𝑡 𝑑𝜔𝑡� = √3𝑉𝑚 � + cos 2𝛼�
2𝜋 𝜋+𝛼 𝑚 6 8𝜋
6
(10-3)
Output voltage waveforms for RL load supplied from 3-phase half wave controlled
rectifier at different trigger angles is shown in
α Van Vbn Vcn
↑
V0
α=30
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ωt
30 60 90 120 150 180 210 240 270 300 330 360 390 420
↑
V0 α=60
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ωt
30 60 90 120 150 180 210 240 270 300 330 360 390 420
Fig10.2
187
10.2 Three Phase Half Wave Controlled Rectifier with R load and RL Load
with FWD.
T1 T1
a a
T2 T2
b b +
T3 T3
c c
R R V0
V0
L
n n −
Figure 10.3
Let the three thyristors in Fig. 10.3 be fired at firing angle 𝛼 = 30°. Each phase current
then begins to flow at the instant 𝜔𝑡 = 𝛼 + 30° = 60° after its positive going anode voltage zero.
Because of the delayed firing of thyristor 𝑇2 the potential 𝑣𝑎𝑛 (𝑡) , at the anode of thyristor 𝑇1
remains the most positive potential in the circuit until 𝜔𝑡 = 180° = 𝜋 . Thyristor 𝑇1 therefore
conducts from 𝜔𝑡 = 𝛼 + 30° 𝑡𝑜 𝜔𝑡 = 180°, at which point thyristor 𝑇2 switches on. The cathode
of 𝑇1 then acquires the potential of point b in Fig. 10.4, so that 𝑇1 is reverse biased. The
combination of reverse anode voltage on 𝑇1 , combined with zero current, causes the commutation
or switch-off of thyristor 𝑇1 .
If the switch-on of the three thyristors is delayed until 𝛼 = 60° = 𝜋/3 (i.e., 90° after their
respective voltage zeros) the load current becomes discontinuous, as shown in Fig. 10.3
α=0
Vs
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ωt
30 60 90 120 150 180 210 240 270 300 330 360 390 420
α=150
V0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ωt
30 60 90 120 150 180 210 240 270 300 330 360 390 420
α=30
0
V0 0
30
0
60
0
90
0
120
0
150
0
180
0
210
0 0
240
0
270
0
300 330
0 0
360 390
0 0
420
ωt
α=600
V0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ωt
30 60 90 120 150 180 210 240 270 300 330 360 390 420
Figure10.4
189
for 0 ≤ 𝛼 ≤ 𝜋/6 the output voltage waveforms is the same of RL Load continuous mode of
operation so Equations 10.1,2,3 are still applied .
π
for /6 ≤ 𝛼 ≤ 5𝜋/6 : T1 is triggered at ω t = + α = ( 300 + α )
6
T1 conducts from ( 300 + α ) to 1800 ;
v=
O v=
an Vm sin ω t
5π
T2 is triggered at ω t =
6
+α =
(150 0
+α )
7π
T3 is triggered at ω t =
6
+α =
( 270 0
+α )
3
0
180
Vdc = ∫ vO .d (ω t )
2π α +300
v=
O = Vm sin ω t ; for ω=
van t (α + 30 ) to (180 )
0 0
180
0
3
Vdc = ∫ Vm sin ω t.d (ω t )
2π α +300
3Vm
1800
Vdc = ∫ sin ω t.d (ω t )
2π α +300
3Vm 1800
=
Vdc − cos ω t
2π
α + 300
𝑉𝑑𝑐 1 𝜋
𝑉𝑛 = = �1 + cos � + 𝛼��
𝑉𝑑𝑚 √3 6
(10-5)
1/2 1/2
𝜋
3 5 𝛼 1 𝜋
𝑉𝑟𝑚𝑠 = �� 𝑉𝑚2 𝑠𝑖𝑛2 𝜔𝑡 𝑑𝜔𝑡� = √3𝑉𝑚 � − + sin � + 2𝛼��
2𝜋 𝜋+𝛼 24 4𝜋 8𝜋 3
6
(10-6)
EXAMPLE 10-1
3√3𝑉𝑚 169.83
𝑉𝑑𝑚 = = 3√3 × = 140.45 𝑉
2𝜋 2𝜋
The average output voltage 𝑉𝑑𝑐 = 0.5 × 140.45 = 70.23 𝑉.
(a) For a resistive load, the load current is continuous if 𝛼 ≤ 𝜋/6 and Eq.(10-2) gives
𝑉𝑛 ≥ cos 𝜋/6 = 86.6%. With resistive load and 50% output , the load current is discontinuous. From Eq
(10-4) 0.5 = �1/√3�[1 + cos(30° + 𝛼)] and the delay angle is 𝛼 = 67.7°.
From Eq.(10-6) ,𝑉𝑟𝑚𝑠 = 94.74 𝑉 and the the rms load current , 𝐼𝑟𝑚𝑠 = 94.74/10 = 9.47𝐴
(c)The average current of a thyristor, 𝐼𝐷𝑇 = 𝐼𝑑𝑐 /3 = 7.02/3 = 2.34𝐴 and the rms current of a
thyristor ,𝐼𝑅𝑇 = 𝐼𝑟𝑚𝑠 /√3 = 9.47/√3 = 5.47 𝐴.
( e)The rms input line current is the same as the thyristor rms current, and the input volt-ampere
rating,𝑉𝐼 = 3𝑉𝑆 𝐼𝑠 = 3 × 120.1 × 5.47 = 1970.84𝑊. 𝑇𝑈𝐹 = (70.23 × 8.02)/1970.84 = 25%
2
(f)The output power,𝑃𝑜 = 𝐼𝑟𝑚𝑠 𝑅 = 9.472 × 10 = 896.81𝑊. The input power factor, 𝑃𝐹 =
896.81/1970.84 = 0.455(𝑙𝑎𝑔𝑔𝑖𝑛𝑔).
Note. Due to the delay angle,α,the fundamental component of input line current is also
delayed with respect to the input phase voltage.
191
Figure.10-5
The frequency of output voltage is 3fs .The delay angle, α , can be varied from
0 𝑡𝑜 𝜋. During the period 𝜋/6 ≤ 𝜔𝑡 ≤ 7𝜋/6 ,thyristor 𝑇1 is forward biased. If 𝑇1 𝑖𝑠 fired at
𝜔𝑡 = (𝜋/6 + 𝛼), 𝑇1 𝑎𝑛𝑑 𝐷1 conduct and the line-to-line voltage 𝑣𝑎𝑐 appears across the load. At
= 7𝜋/6 ,𝑣𝑎𝑐 starts to be negative and the freewheeling diode 𝐷𝑚 conducts. The load current
continues to flow through 𝐷𝑚 ; 𝑎𝑛𝑑 𝑇1 𝑎𝑛𝑑 𝐷1 are turned off .
Figure 10.6 shows the waveforms for input voltages, output voltage, input current,
and the current through thyristors and diodes for 𝜶 > 𝟔𝟎°.
Figure 10-6
193
𝑣𝑎𝑛 = 𝑉𝑚 sin 𝜔𝑡
2𝜋
𝑣𝑏𝑛 = 𝑉𝑚 sin �𝜔𝑡 − �
3
2𝜋
𝑣𝑐𝑛 = 𝑉𝑚 sin �𝜔𝑡 + �
3
For ≥ 𝜋/3 , and discontinuous output voltage ; the average output voltage is found from
7𝜋 7𝜋
3 6 3 6 𝜋 3√3𝑉𝑚
𝑉𝑑𝑐 = � 𝑣𝑎𝑐 𝑑𝜔𝑡 = � √3𝑉𝑚 sin �𝜔𝑡 − � 𝑑𝜔𝑡 = (1 + cos 𝛼)
2𝜋 𝜋+𝛼 2𝜋 𝜋+𝛼 6 2𝜋
6 6
(10-7)
The maximum average output voltage that occurs at a delay angle of 𝛼 = 0 is 𝑉𝑑𝑚 = 3√3𝑉𝑚 /𝜋
and the normalized average output voltage is
𝑉𝑑𝑐
𝑉𝑛 = − 0.5(1 + cos 𝛼)
𝑉𝑑𝑚
(10-8)
7𝜋 1/2
1/2
3 6 𝜋 1
𝑉𝑟𝑚𝑠 = � � 3𝑉𝑚2 𝑠𝑖𝑛2 �𝜔𝑡 − � 𝑑𝜔𝑡� = √3𝑉𝑚 �𝜋 − 𝛼 + sin 2𝛼�
2𝜋 +𝛼
𝜋 6 2
6
(10-9)
194
Figure 10.7 shows the waveforms for input voltages, output voltage, input current,
and the current through thyristors and diodes for 𝛼 ≤ 𝜋/3.
195
Figure 10.7
(10-10)
𝑉𝑑𝑐
𝑉𝑛 = = 0.5(1 + cos 𝛼)
𝑉𝑑𝑚
(10-11)
5𝜋 1/2
+𝛼 1/2
3 6 𝜋 3 1
𝑉𝑟𝑚𝑠 =� � 3𝑉𝑚2 𝑠𝑖𝑛2 �𝜔𝑡 − � 𝑑𝜔𝑡� = √3𝑉𝑚 � �𝜋 − 𝛼 + sin 2𝛼��
2𝜋 𝜋+𝛼 6 4𝜋 2
6
(10-12)
EXAMPLE 10-2
Solution: The phase voltage is 𝑉𝑆 = 208/√3 = 120.1 𝑉 , 𝑉𝑚 = √2𝑉𝑠 = 169.83 , 𝑉𝑛 = 0.5 and
𝑅 = 10Ω .The maximum output voltage is
3√3𝑉𝑚 169.83
𝑉𝑑𝑚 = = 3√3 × = 280.9 𝑉
𝜋 𝜋
196
(a) For 𝛼 ≥ 𝜋/3 and Eq.(10-11) gives 𝑉𝑛 ≤ (1 + cos 𝜋/3)/2=75%. With a resistive load and
50% output , the output voltage is discontinuous . From Eq.(10-11), 0.5 = 0.5(1 + cos 𝛼) ,which
gives the delay angle , 𝛼 = 90°.
140.45
(b) The average output current, 𝐼𝑑𝑐 = 𝑉𝑑𝑐 /𝑅 = = 14.045 𝐴. From Eq.(10-12) ,
10
1/2
3 𝜋
𝑉𝑟𝑚𝑠 = √3 × 169.83 � �𝜋 − + 0.5 sin(2 × 90°)�� = 180.13 𝑉
4𝜋 2
(c) The average current of a thyristor , 𝐼𝐷𝑇 = 𝐼𝑑𝑐 /3 = 14.05/3= 4.86 𝐴 and the rms current of a
thyristor , 𝐼𝑅𝑇 = 𝐼𝑟𝑚𝑠 /√3 = 18.01/√3 = 10.4 𝐴.
140.45 × 14.05
ή= = 68.8%
180.13 × 18.01
(e)The rms input current is 𝐼𝑆 = 𝐼𝑟𝑚𝑠 × �2/3 = 14.71 A. The input volt-ampere rating ,
𝑉𝐼 = 3𝑉𝑆 𝐼𝑆 = 3 × 120.1 × 14.71 = 5300. 𝑇𝑈𝐹 = 140.45 × 14.05/5300 = 0.372 .
2
(f) The output power,𝑃𝑜 = 𝐼𝑟𝑚𝑠 𝑅 = 18.012 × 10 = 3243.6 𝑊.The power factor is
𝑃𝐹 = 3243.6/5300 = .612 (lagging).
Note. The power factor is better than that of three-phase half-wave converters.
Three-phase converters (also known as a 6-pulse converter) are extensively used in industrial
applications up to the 120-kW level, where two-quadrant operation is required. Figure 10-8a
shows a full-converter circuit with a highly inductive load. The thyristors are fired at an interval
of π/3. Harmonics for the output voltage is 6𝑓𝑠 and the filtering requirement is less than that of
three-phase semi- and half-wave converters remain of order , but the amplitudes are functions
of α Figure 10-9 shows the first three normalized harmonic amplitudes. 𝐴𝑡 𝜔𝑡 = 𝜋/6 + 𝛼
,thyristor 𝑇6 is already conducting and thyristor 𝑇1 is turned on. During interval (𝜋/6 + 𝛼)
≤ 𝜔𝑡 ≤ (𝜋/2 + 𝛼) , thyristors 𝑇1 𝑎𝑛𝑑 𝑇6 conduct and the line-to-line voltage 𝑣𝑎𝑏 (= 𝑣𝑎𝑛 − 𝑣𝑏𝑛 )
appears across the load. At 𝜔𝑡 = 𝜋/2 + 𝛼 ,thyristor 𝑇2 is fired and thyristor 𝑇6 is reversed
biased immediately. 𝑇6 is turned off due to natural commutation. . During interval (𝜋/2 +
𝛼) ≤ 𝜔𝑡 ≤ (5𝜋/6 + 𝛼) , thyristors 𝑇1 𝑎𝑛𝑑 𝑇2 conduct and the line-to-line voltage, 𝑣𝑎𝑐
appears across the load. The firing sequence 12, 23, 34, 45, 56, 𝑎𝑛𝑑61. Figure 1 0 - 8 b shows
197
the waveforms for input voltage, output voltage, input current, and currents through
thyristors.
Figure10-8a
Figure 10-8b
198
0.4
n=6
0.3
Vn /Vm
0.2
n = 12
n = 18
0.1
0.0
0 40 80 120 160 200
Delay Angle (degrees)
𝑣𝑎𝑛 = 𝑉𝑚 sin 𝜔𝑡
2𝜋
𝑣𝑏𝑛 = 𝑉𝑚 sin �𝜔𝑡 − �
3
2𝜋
𝑣𝑐𝑛 = 𝑉𝑚 sin �𝜔𝑡 + �
3
From Fig.(10-8b) the output load voltage consists of 6 voltage pulses over a period of 2π radians
which it’s the case for highly inductive load assuming continuous and constant load current,
hence the average output voltage is calculated as
𝜋 𝜋
6 2 +𝛼 3 2 +𝛼 𝜋
𝑉𝑑𝑐 = � 𝑣𝑎𝑏 𝑑𝜔𝑡 = � √3𝑉𝑚 sin �𝜔𝑡 + � 𝑑𝜔𝑡
2𝜋 𝜋+𝛼 𝜋 𝜋+𝛼 6
6 6
3√3𝑉𝑚 3𝑉𝑚𝐿
𝑉𝑑𝑐 = cos 𝛼 = cos 𝛼 (10-13)
𝜋 𝜋
Where 𝑉𝑚𝐿 = √3𝑉𝑚 =Max. line-to-line supply voltage . Eq (10-13) shows that the average
output voltage is reduced as the delay angle increases.
The maximum average dc output is obtained for a delay angle 𝛼 = 0
3√3𝑉𝑚 3𝑉𝑚𝐿
𝑉𝑑𝑚 = =
𝜋 𝜋
and the normalized average output voltage is
𝑉𝑑𝑐
𝑉𝑛 = = cos 𝛼 (10-14)
𝑉𝑑𝑚
The rms value of the output voltage is found from
𝜋 1/2 𝜋 1/2
6 2 +𝛼 2 3 2 +𝛼 2 2 𝜋
𝑉𝑟𝑚𝑠 =� � 𝑣 𝑑𝜔𝑡� =� � 3𝑉𝑚 𝑠𝑖𝑛 �𝜔𝑡 + � 𝑑𝜔𝑡�
2𝜋 𝜋+𝛼 𝑎𝑏 𝜋 𝜋+𝛼 6
6 6
1/2
1 3√3
𝑉𝑟𝑚𝑠 = √3𝑉𝑚 � + cos 2𝛼� (10-15)
2 4𝜋
EXAMPLE 10-3
■ Solution
(a) The required dc component in the bridge output voltage is
Vo Io R (50)(10) 500 V
200
Vo 500
cos 1 a b cos 1 a b 39.5°
3Vm, LL 312(480)
b) Amplitudes of harmonic voltages are estimated from the graph in Fig. 10-9. For
39.5, normalized harmonic voltages are V6 /Vm L 0.21 and V12 /Vm L 0.10.
Using Vm 12(480), V6 143 V, and V12 68 V, harmonic currents are then
V6 143
I6 1.26 A
Z6 110 2 [6(377)(0.05)]2
V12 68
I12 0.30 A
Z12 110 2 [12(377)(0.05)]2
𝑣𝑎𝑛 = 𝑉𝑚 sin 𝜔𝑡
2𝜋
𝑣𝑏𝑛 = 𝑉𝑚 sin �𝜔𝑡 − �
3
2𝜋
𝑣𝑐𝑛 = 𝑉𝑚 sin �𝜔𝑡 + �
3
The corresponding line-to-line voltages are
𝜋
𝑣𝑎𝑏 = 𝑣𝑎𝑛 − 𝑣𝑏𝑛 = √3𝑉𝑚 sin �𝜔𝑡 + �
6
𝜋
𝑣𝑏𝑐 = 𝑣𝑏𝑛 − 𝑣𝑐𝑛 = √3𝑉𝑚 sin �𝜔𝑡 − �
2
5𝜋
𝑣𝑐𝑎 = 𝑣𝑐𝑛 − 𝑣𝑎𝑛 = √3𝑉𝑚 sin �𝜔𝑡 + �
6
201
Figure 10-10
202
If v O1 and v O2 are the output voltages of converters 1 and 2 respectively, the instantaneous
voltage across the current limiting inductor during the interval (π/6 + α 1 ) ≤ ωt ≤ (π/2 + α 1 ) is
3𝑉𝑚 𝜋
= �sin �𝜔𝑡 − � − sin 𝛼1 �
𝜔𝐿𝑟 6
(10-17)
3𝑉𝑚
𝑖𝑟(𝑚𝑎𝑥) =
𝜔𝐿𝑟
(10-18)
The circulating current depends on delay angle and on inductance,𝐿𝑟 .This current
becomes maximum when 𝜔𝑡 = 2𝜋/3 and 𝛼1 .Even without any external load, the converters
would be continuously running due to the circulating current as a result of ripple
voltage across the inductor. This allows smooth reversal of load current during the
change over from one quadrant operation to another and provides fast dynamic
responses, especially for electrical motor drives.
Figure 10-11
203
∎ When the converter 1 is switched on, and for α 1 < 900 the converter 1 operates in the
rectification mode V dc is positive, I dc is positive and hence the average load power P dc is positive
so the power flows from ac source to the load.
∎ When the converter 1 is on, and for α 1 > 900 the converter 1 operates in the Inversion mode V dc
is negative, I dc is positive and the average load power P dc is negative, so the power flows from
load circuit to ac source.
∎ When the converter 2 is switched on, and for α 2 < 900 the converter 2 operates in the
Rectification mode V dc is negative, I dc is negative and the average load power P dc is positive.
Notice that the output load voltage & load current reverse when converter 2 is on ,so the power
flows from ac source to the load .
∎ When the converter 2 is switched on, and for α 2 > 900 the converter 2 operates in the Inversion
mode V dc is positive, I dc is negative and the average load power P dc is negative so the power
flows from load to the ac source (Energy is supplied from the load circuit to the ac supply).
When α 1 < 900, converter 1 operates as a controlled rectifier. α 2 is made greater than 900 and
converter 2 operates as an Inverter., so V dc is positive & I dc is positive and P dc is positive.
When α 2 < 900, converter 2 operates as a controlled rectifier. α 1 is made greater than 900 and
converter 1 operates as an Inverter, so V dc is negative & I dc is negative and P dc is positive.
204
The single-phase full converter in Fig.11-2a is operated with symmetrical angle control. The
load current with an average value of 𝐼𝑎 , is continuous, where the ripple content is negligible.
(a) Express the input current of converter in Fourier series, determine the harmonic factor of
input current, HF; displacement factor, DF; and input power factor, PF. (b) If the conduction
angle is 𝛽 = 𝜋/3 and the peak input voltage is 𝑉𝑚 = 169.83 𝑉, calculate 𝑉𝑑𝑐 , 𝑉𝑟𝑚𝑠 ,HF, DF, and
PF.
Solution
(a) The waveform for input current is shown in Fig.11-3 and the instantaneous input current can
be expressed in Fourier series as
∞
Where
(𝜋+𝛽)/2 (3𝜋+𝛽)/2
1
𝐼𝑑𝑐 = �� 𝐼 𝑑𝜔𝑡 − � 𝐼𝑎 𝑑𝜔𝑡� = 0
2𝜋 (𝜋−𝛽)/2 𝑎 (3𝜋−𝛽)/2
1 2𝜋
𝑎𝑛 = � 𝑖(𝑡) cos 𝑛𝜔𝑡 𝑑𝜔𝑡 = 0
𝜋 0
1 2𝜋 4𝐼𝑎 𝑛𝛽
𝑏𝑛 = � 𝑖(𝑡) sin 𝑛𝜔𝑡 𝑑𝜔𝑡 = sin 𝑓𝑜𝑟 𝑛 = 1,3, … ..
𝜋 0 𝑛𝜋 2
= 0 𝑓𝑜𝑟 𝑛 = 2,4, ….
𝛽
𝐼𝑠 = 𝐼𝑎 � = 0.5774𝐼𝑎
𝜋
1
𝐼𝑠 2 2
𝐻𝐹 = �� � − 1� = 0.803 𝑜𝑟 80.3%
𝐼1
𝐼1
𝑃𝐹 = = 0.7797 (𝑙𝑎𝑔𝑔𝑖𝑛𝑔)
𝐼𝑠
Note. The power factor is improved significantly .However , the harmonic factor is
increased .
If the output voltage of single-phase semi- or full converters is controlled by varying the
delay angle, extinction angle, or symmetrical angle, there is only one pulse per half-cycle in
the input current of the converter, and as a result the lowest-order harmonic is the third. It is
difficult to filter out the lower-order harmonics. In pulse-width-modulation (PWM) control,
the converter switches are turned on and off several times during a half-cycle and the output
voltage is controlled by varying the width of pulses. Figure 11-4 shows the input voltage,
output voltage, and input current. The lower-order harmonics can be eliminated or reduced by
selecting the number of pulses per half-cycle. However increasing the number of pulses would
increase the magnitude of higher-order harmonics, which could easily be filtered out.
The output voltage and the performance parameters of the converter can be determined
in two steps: (1) by considering only one pair of pulses such that if one pulse starts at
𝜔𝑡 = 𝛼1 and ends at 𝜔𝑡 = 𝛼1 + 𝛿1 the other pulse starts at 𝜋 + 𝛼1 and ends at 𝜔𝑡 = (𝜋 +
𝛼1 + 𝛿1 ), and (2) by combining the effects of all pairs. If mth pulse starts at 𝜔𝑡 = 𝛼𝑚 and its
width is 𝛿𝑚 , the average output voltage due to p number of pulses is found from
𝑝
2 𝛼𝑚+𝛿𝑚
𝑉𝑑𝑐 = � � � 𝑉𝑚 sin 𝜔𝑡 𝑑𝜔𝑡�
2𝜋 𝛼𝑚
𝑚=1
𝑝
𝑉𝑚
� [cos 𝛼𝑚 − cos(𝛼𝑚 + 𝛿𝑚 )]
𝜋
𝑚=1
(11-13)
210
If the load current with an average value of 𝐼𝑎 is continuous and has negligible ripple , the
instantaneous input current can be expressed in a fourier series as
∞
1 2𝜋
𝑏𝑛 = � 𝑖(𝑡) sin 𝑛𝜔𝑡 𝑑𝜔𝑡
𝜋 0
𝑝
1 𝛼𝑚+𝛿𝑚 1 𝜋+𝛼𝑚+𝛿𝑚
= �� � 𝐼𝑎 sin 𝑛𝜔𝑡 − � 𝐼𝑎 sin 𝑛𝜔𝑡 𝑑𝜔𝑡�
𝜋 𝛼𝑚 𝜋 𝜋+𝛼𝑚
𝑚=1
𝑝
2𝐼𝑎
= � [cos 𝑛𝛼𝑚 − cos 𝑛(𝛼𝑚 + 𝛿𝑚 )]
𝑛𝜋
𝑚=1
211
References
1-Muhammad Harunur Rashid : Power electronics circuits , Devices , And applications .