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Lecture Note III

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13 views7 pages

Lecture Note III

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Odunayo Akinlade
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CHAPTER Single-Stage Amplifiers Amplification is an essential function in most analog (and many digital) circuits. We amplify an analog or digital signal because it may be too small to drive a load, overcome the noise of a subsequent stage, or provide logical levels (o a digital circuit. Amplification also plays a critical role in feedback systems (Chapter 8). In this chapter, we study the low-frequency behavior of single-stage CMOS amplifiers. Analyzing both the large-signal and the small-signal characteristics of each circuit, we develop intuitive techniques and models that prove useful in understanding more complex systems. An important part of a designer's job is to use proper approximations so as to create a simple mental picture of a complicated cigcut. The intuition thus gained makes it possible to formulate the behavior of most citcuits by inspection rather than by lengthy calculations. Following a brief review of basic concepts, we describe in this chapter four types of amplifiers: common-source and common-gate topologies, source followers, and cascode configurations. In each case, we begin with a simple model and gradually add second-order phenomena such as channel-length modulation and body effect. 3.1 m Applications Do you carry an amplifier? In all iketinood, yes. Your mobile phone, laptop, and digital camera al incorporate various types of amplifies. The receiver in your phone must sense and amplify smal signals received by the antensa thus requiring a “low-noise” amplifier (LNA) atthe frontend (Fig. 3.1). As the signal travels down the receive chain, st must be further amplified by additional stages so as to reach an acceptably high level. This proves dificult because, in addition tothe small desied signal, the antenna picks up other strong signals ("interferers") that are transmitted by various ther users in the same vicinity ‘Your one's ansmiter, oo, employs amplifiers: to amplify te signal generated by the microphone and, eventually, the signal delivered to the antenna. The “power amplifier” (PA) necessary for such delivery dra the most energy from the battery and sill presents interesting challenges 3.2 m General Considerations ‘An ideal amplifier generates an output, (7, that is a linear replica ofthe input, x(1): y= ax) 60) 45 48 Chap. 3 Single-Stage Ampitiers Desired p Interferer ‘Signal Receiver INA ‘Amplifying Stages nee — [> farccnene} >> i PA Mike — Lin Power Dissipation Input/Output 4 supply Impedance Voltage Voltage eed ae Sp ‘Swings Figure 3.3 Analog design octagon. Table 3.1__Ammpiiier categories. Common-Souree Stage Source Follower Commor-Gate Stage __Cassode Win Resistive Load With Resistive Bas Wh Resse Load lscople Wir Diode-Connected Load With Curren Source Blas With Current Source Load Folded With Current Source Load Wit Active Loa With Source Degeneration 3.3 m Common-Source Stage 3.3.1 Common-Source Stage with Resistive Load By virtue of ts transconductance, a MOSFET converts changes ints gate-source voltage to a small-signal drain current, which can pass through a resistor to generate an output voltage. Showa in Fig. 3.4(a), the common-source stage performs such an operation. We study both the large-signal and the small-signal behavior ofthe circuit, Note thatthe input impedance of the circuit is very high at low frequencies, Ifthe input voltage increases from zero, Mj is off and Vou, = Von [Fig. 3.4(b)]. As Vis approaches Vii, Mi begins (o turn on, drawing current from Rp and lowering Vey. Transistor My turns on in saturation regardless of the values of Vpy and Rp (Why), and we have 7 1 ow, 2 Vous = Vow ~ Rotman Vie Vou 6s) where channel-length modulation is neglected. With further increase in Viy, Vous drops more, and the tran- sistor continues to operate in saturation until Vj, exceeds Vea by Vr [point A in Fig. 3.4(6)] Atthis point, tow > Vina — Vr = Vow — Ros teCon-WMin — Vew 3. finn — Vw = Vow ~ RozHteCox gin — Vr) G4) from which Visi — Vrw and hence Vou can be calculated For Vig > Vins, Mi is inthe triode region: Vou = i W ov, — Vout — Vou = Veo — RosHtxCoxre [2 — Ver) Vo 65) ‘The common souree topology is dete as receiving the input atthe gate and producing the ouput atthe drain 48 Chap. 3 Single-Stage Ampitiers Yoo Vou w R Veo| 4 ah Vout j Yori . TV Vint Yin @ ” Yoo ko — oat Von YoCy “Dont SRo C @ Figure 3.4. (a) Common-source stage, (6) input-output characteristic, (¢) equivalent circuit inthe deep tiode region, and (d) small-signal model forthe saturation region, If Vig is high enough to drive My into the deep tiode region, Vou. << 2(Viy — Vr. and, from the equivalent circuit of Fig. 3.4(0), R, Vos = Veo qe 36 Ron + Ro co Yoo a 6 Vo Hau Roy Vin = Vr) Since the transconductance drops in the triode region, we usually ensure that Voy > Vig — Vrw. and hence the current operates to the lel of point A in Fig. .4(b), Using (3.3) a the input-output characteristic and viewing its slope as the small-signal gain, we have Gs) w On — Ven 39) Tie Von) G9) G.10) “This result can be dircetly derived from the observation that Mf converts an input voltage change A Vig toa drain current change gAViq, and hence an output voltage change —@y,RpAViy. The small-signal model of Fig. 3.4(d) yields the same result: Viyy = —@.Vi Rp = —8mVinRo. Note that, as mentioned in Chapter 2, Vin. Vi, and Voge in this figure denote small-signal quantities Even though derived for small-signal operation, the equation A. = —gmRp predicts certain effects if the circuit senses a large signal swing. Since gq itself varies with the input signal according to Sec.3.3 Common-Source Stage Bm = HnCox(W/L)(Vos — Vein), the gain of the circuit changes substantially if the signal is large. In other words. ifthe gain ofthe cicuit varies significantly withthe signal swing, then the cxcuit operates in the large-signal mode. The dependence ofthe gain upon the signal level leads to nonlinearity (Chapter 14). usually an undesirable effect. A key result here is that to minimize the nonlinearity, the gain equation must be a weak function of signal-dependent parameters such as g,,. We present several examples ofthis concept in this chapter and, in Chapter 14 > Example3.1 ‘Sketch the dain curent and transconductance of Min Fig. 3.4(a) asa function ofthe input voltage Solution ‘The drain current bec Vop/Ro if Ron < Ro [Fig. 35a]. Since in satwration, fm = gCou (W/L) Vin — Vii), the transconductance begine (0 rise for Vin > Ver. In the triode region, Bm = nCox W/L)Vps. falling as Vin exe nes signilcant for Vin > Vr, eventually approaching eee 49 How does the CS stage behave in nanometer technologies? The figure es Vint OF. 3.50) Starting Wit epee ee eee Tet ae Bq, (35), the reader can show that, acteristic for W/L = 2 um/40 nm, Ro = kit, and Vop = 1 V. We observe Vows tin CaxdW/L) Ro Vows |, that he circuit provides a gain of about SEATED Teg SV CHD Bintreinputrange oto. Vto0.6V. The 'n sD Ro Win = Vr ‘output swings imitedio about 0.3 V-0.8 Vor the gain not to drop signiicanty. which reaches a maximum if Vour = Vin — Vr (point A. oh - Yop Vin Vin Vint @ ® Figure 3.5 > Example3.2 ACS stages driven by a sinusoid, Viy = Vi cos.ayt + Vp, where Vo is the bias value and Vis large encugh to drive the tiode repions. Sketch the gy ofthe Wansistor as a function of time, str inte the off an Solution ‘etus fist sketch he cutptvoage Fg. 3.6 noting that when Vin = Vs + Vo, Vu is Tow, sin the triode epon, And fy assumes a smal Vale, As Vip falls and Voy andy Hise, My enters saturation at? =f (WED Vig — rip) ad fy taches its maxiznu (by) As Vp falls fre. so dopa i AL! =f, fg aches 20 ‘We observe that (a) since the voltage gain is approximately equal fog Rp. it experiences the saz vasiation 5 he fe, a4 (b) gy vas peiodially "We even express gu ata Fuse erie in more advanced courses 50 Chap. 3 Single-Stage Ampitiers ca 7% Figure 2.6 a How do we maximize the voltage gain of a common-source stage? Writing (3.10) as 5 Veo Aga) 2ta Cor eo 3.12 aC L Ip oe) where Viv denotes the voltage drop across Rp, we have Wap Bena AE 3.13) 0 G13) Thus, the magnitude of A, canbe increased by increasing W/L or Vp ordecteasing Ip ifother parameters are constant. Itis important to understand the tade-ofls resulting from this equation. A larger device size leads to greater device capacitances, and a higher Van limits the maximum voltage swings. For example, if Von — Van = Vie — Vr. then M; is at the edge ofthe trode region, allowing only very small swings at the output (and input). If Ve remains constant and Jp is reduced, then Rp must increase, thereby leading to a greater time constant atthe output node. In other words, as noted in the analog design octagon, the circuit exhibits trade-offs between gain, bandwidth, and voltage swings. Lower supply voltages further Lighten these trade-offs, For large values of Rp. the effect of channel-Length modulation in M, becomes significant. Modifying 8.3) to include this effect, Low 05 HCoep (Vin — Vou = Vou = fen + Vout) Gu) we have Vou, Win Wy i = Rote Cox Win — Ven + 2Vour) Vou Vin =k *pinCox Win — Ve)" HnCox Vie = Vee 3 G.15) Sec.3.3 Common-Source Stage 51 We recognize that (1/2)ttyCox(W/L)(Vin = fryyth = Ir and Ro Av = Rota ~ 22.4, 616 Ths A roR a 8 RS ‘ The small-signal model of Fig. 3.7 gives the same result with much less effort. That is, since BmVi(rolRD) = —Vou and Vi, = Vig, We have Vous / Vie = —m (roll). Figure 3.7 Small-signal model o CS stage including the transistor output > Example3.3, ‘Assuming that My in Fig 3.8 is biased in saturation, calculate the small-signal voltage gain of the circuit, = Figure 3.8 Solution Since J introduces an infinite impedance (Ry = cc), the gain is ied by the output resistance of My into G8) Called the “inttinsic gain” of a transistor, this quantity represents the maximum voltage gai that can be achieved using a single device. In today’s CMOS technology, go of short-channel devices is between roughly $ and 10. We usually assume 1/5m

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