EEE 51 Handout 3-1

c L. Alarcón, updated January 27, 2015

VCC

VCC RL
RL

vOU T
iC +
iC
vin Q1
iB vOU T Q1
iB
+ vIN
VIN vIN
−
−

(a) Schematic (b) Simplified schematic

Figure 3.1: A simple BJT common-emitter amplifier.

3 Single-Stage Amplifiers
Three different two-port topologies are possible for a 3-terminal transistor. How do we know which one to use for
a certain application? As we will see, each topology has its own set of advantages and disadvantages. Here, we
look at the characteristics of the 3 different topologies of single-stage BJT amplifiers: (1) the common-emitter, (2) the
common-base, and (3) the common-collector amplifiers, as well as their MOSFET equivalents: (1) the common-source,
(2) the common-gate, and (3) the common-drain amplifiers. Single-stage amplifiers, such as these ones, are important
building blocks in the design of linear electronic amplifiers.

3.1 The Common-Emitter Amplifier

Let’s start with the BJT common-emitter (CE) amplifier in Fig. 3.1a. Note that to reduce the clutter of our transistor
schematics, and to clearly show the signal path instead of the DC paths, we often use the simplified schematic in Fig.
3.1b. The largest DC voltage is normally referred to as the supply voltage, since it is usually responsible for providing
the quiescent collector current, or bias current, to the transistor. In Fig. 3.1, VCC is the supply voltage. The input
voltage, vIN is the sum of its quiescent DC voltage, VIN , and its small signal component, vin , thus

vIN = VIN + vin = vBE (3.1)

The output voltage, vOU T , of the amplifier is taken at the collector terminal of the transistor, and is referred to ground.
It is equal to the transistor collector-emitter voltage, vCE , and is also composed of a quiescent DC voltage, VOU T , as
well as small signal voltage, vout .
In order to see how we can use our transistor to amplify signals in this configuration, we need to first get its
quiescent DC operating point.

3.1.1 DC Analysis
The goal of DC analysis is to find the quiescent DC (or bias) currents and voltages of our transistors, since this will,
in turn, allow us to calculate the transistor small signal parameters. These small signal parameters will then be used
to calculate the two-port parameters of the common-emitter amplifier.
For DC analysis, we set all small signals to zero, leaving us with only the quiescent DC voltages and currents.
Writing the KVL equations around the output side of the amplifier, and recognizing that VBE,Q = VIN and VCE,Q =
VOU T , we get

VCC − IC,Q RL − VOU T = 0 (3.2)

If we assume that the transistor is operating in the forward-active region,
 V   
IN VOU T
IC,Q = IS · e VT
−1 · 1+ (3.3)
VA
Thus, if we are given the transistor technology parameters IS , and VA , the temperature, the values of the DC sources,
VCC and VIN , and the resistor RL , we can use Eqs. 3.2 and 3.3 to solve for IC,Q and VOU T .

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EEE 51 Handout 3-1
c L. Alarcón, updated January 27, 2015

Resistor I−V Characteristic DC Voltage Source I−V Characteristic DC Current Source I−V Characteristic
5 5 2

4 4
1.5

[mA]

iDC [mA]
3 3
iR [mA]

DC
2 2

i
0.5
1 1

0 0 0
0 1 2 3 4 5 −0.5 0 0.5 1 1.5 0 1 2 3 4 5
v [V] v [V] v [V]
R DC DC

(a) A 1 kΩ resistor (b) A 0.5 V DC voltage source (c) A 1 mA DC current source

Figure 3.2: Linear two-terminal I-V characteristics.

If VIN is around 0.6 V, and VA is large compared to the supply voltage, then we can approximate the quiescent
DC collector current as
VIN
IC,Q = IS · e VT
(3.4)
Then we can solve for VOU T as

VOU T = VCC − IC,Q RL (3.5)

If VOU T > VCE,sat , then the transistor is indeed in the forward-active region. This is an easy check to verify our
original assumption. After computing the quiescent DC collector current, and given the transistor β, we can easily
get the base current using
IC,Q IS VIN
IB,Q = = · e VT (3.6)
β β

3.1.2 Small Signal Analysis

From the quiescent DC collector current, we can get the transistor small signal parameters, assuming that the transistor
is in the forward-active region:
IC,Q
gm = (3.7)
VT
VA
ro = (3.8)
IC,Q
β β · VT
rπ = = (3.9)
gm IC,Q
However, aside from the transistor, we have several other components in our circuit in Fig. 3.1. Let us determine
the small signal equivalents of linear resistors and independent DC sources. Since these elements are two-terminal
devices, we can treat them all as small signal resistances.
The current-voltage (I-V) characteristics of a linear resistor is shown in Fig. 3.2a. The small signal equivalent
resistance is again defined as
 −1
∂iR
Rsmall signal = =R (3.10)
∂vR
Since the slope of the I-V characteristic of a linear resistor is the same for any point, then the small signal resistance
is independent of the quiescent DC voltage or current. Thus, the small signal equivalent of a linear resistor with
resistance R is also a resistor with the same resistance R.
Fig. 3.2b shows the I-V characteristic of a 0.5 V DC voltage source. We note that since the voltage is constant for
any current, the slope of the I-V curve is infinite, thus
 −1
∂iDC
Rsmall signal = =0 (3.11)
∂vDC
Having a small signal resistance of zero implies that for small signals, independent DC voltage sources act like short
circuits. This should be intuitive, since no matter how much small signal current force into the source, there will be

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B ib ic C
+ +

vin rπ vbe gm vbe ro RL vout

− −

E E

Figure 3.3: The small signal equivalent circuit of the common-emitter amplifier in Fig. 3.1a.

+ +

vin Ri Gm vin Ro vout

− −

Figure 3.4: Common-emitter amplifier two-port equivalent circuit.

no small signal change in the voltage. Hence, the small signal equivalent of the DC voltage source is a short circuit
since the small signal voltage is always zero.
For the independent DC current source, whose I-V characteristic is given in Fig. 3.2c, we can once again determine
the equivalent small signal resistance as
 −1
∂iDC
Rsmall signal = →∞ (3.12)
∂vDC
Therefore, the small signal equivalent resistance of an independent DC current source is an open circuit. This is due to
the fact that no matter what small signal voltage we force across the current source, the current will remain constant,
resulting in zero small signal current change.
Using the small signal equivalents of all the components in Fig. 3.1a, the small signal equivalent circuit of the
common-emitter amplifier can be obtained, as seen in Fig. 3.3. Again, it is very important to note that the small signal
equivalent circuit describes the relationships only between the small voltage or current changes about the quiescent
DC operating point. There is no DC (voltage or current) information in the small signal domain.
Given the small signal equivalent circuit of the common-emitter amplifier, we can now derive its equivalent two-port
equivalent circuit. Using our two-port parameter definitions, the input resistance of the CE amplifier is
β β · VT
Ri = rπ = = (3.13)
gm IC,Q
The circuit transconductance is then
IC,Q
Gm = gm = (3.14)
VT
The output resistance can then be expressed as the parallel combination of ro and the load resistance, RL ,
VA
Ro = ro k RL = k RL (3.15)
IC,Q
The CE amplifier two-port equivalent circuit is shown in Fig. 3.4.
In most cases, we are interested in the small signal voltage gain. Thus,
vout ro RL RL
Av = = −Gm Ro = −gm (ro k RL ) = −gm · = −gm ro · (3.16)
vin ro + RL ro + RL
The small signal voltage gain is negative since for the CE amplifier in Fig. 3.1a, a small voltage increase at the input
would result in an increase in vBE , resulting in an increase in collector current. This increase in iC results in an
increase in the voltage across RL , causing the output voltage to drop. Note that an amplifier with a negative small
signal gain is called an inverting amplifier.
For the CE amplifier in Fig. 3.1a, if we assume that ro is finite, the maximum small signal voltage gain can be
obtained when we let RL → ∞, resulting in
IC,Q VA VA q · VA
|Av,max | = ao = gm ro = − · = = (3.17)
VT IC,Q VT kT

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EEE 51 Handout 3-1
c L. Alarcón, updated January 27, 2015

BJT Common−Emitter Amplifier BJT Common−Emitter Amplifier

Transfer Characteristic Small Signal Voltage Gain
0
5
A →
← A

∂VOUT/∂VIN [V/V]
4 −50
VOUT [V]

3 −100
B →
← B
2 −150
C →
← C
1
−200
0
0.5 0.6 0.7 0.8 0.9 1 0.5 0.6 0.7 0.8 0.9 1
VIN [V] VIN [V]
(a) Large signal transfer curve (b) Small signal voltage gain

Figure 3.5: Common-emitter characteristics for a transistor with IS = 2 × 10−16 A and VA → ∞, using VCC = 5 V,
and RL = 500 Ω at T = 300K.

Eq. 3.17 represents the maximum voltage gain we can get out of a single BJT, also known as the intrinsic voltage
gain, ao . Note that any other value of RL would result in a voltage gain lower than ao , and that ao is only dependent
on the transistor Early Voltage, and temperature. The intrinsic voltage gain is also a convenient metric that be used
to determine if a transistor is suited for a certain circuit or task.

3.1.3 Transistor Operating Regions

Eqs. 3.13 to 3.15 clearly show that the common-emitter small signal two-port equivalent circuit is dependent on the
quiescent DC operating point of the transistor. In order to understand the relationship between the DC bias point
and the small signal parameters, let us look at the large signal transfer characteristic of the CE amplifier. From Eqs.
3.4 and 3.5, we can express the output DC voltage as
VIN
VOU T = VCC − RL · IS · e VT
(3.18)
Note that Eq. 3.18 is only valid when when the transistor is in the forward active region, that is, when VOU T > VCE,sat .
For VIN ≈ 0, VOU T approaches VCC . As VIN is increased, the collector current increases, leading to a decrease in
VOU T . The output voltage will decrease until it reaches VCE,sat , placing the transistor in saturation, and pinning the
output voltage to approximately VCE,sat , as we have learned in EEE 41.
The maximum collector current that can flow before the transistor enters the saturation region occurs when
VOU T = VCE,sat , and can be expressed as
VCC − VCE,sat VIN,sat

IC,max = = IS · e VT (3.19)
RL
If the supply voltage is very much greater than VCE,sat , then we can approximate Eq. 3.19 as
VCC
IC,max ≈ (3.20)
RL
Aside from setting the output DC voltage level, and converting the small signal current to a small signal voltage,
the load resistance RL in Fig. 3.1a also limits the maximum collector current that the transistor can draw.
Using Eq. 3.18, and the fact that VOU T = VCE,sat when the transistor is in saturation, we can plot VIN versus
VOU T , or the large signal transfer characteristic, of the CE amplifier in Fig. 3.1a, as shown in Fig. 3.5a.
As we expect, the small signal voltage gain is just the slope of the transfer characteristic at a particular bias point.
Taking the derivative of Eq. 3.18, we get
∂VOU T IS VIN IC,Q
= −RL · · e VT = −RL · = −gm RL (3.21)
∂VIN VT VT
Since Eq. 3.18 assumes that VA → ∞, the resulting small signal transistor output impedance, ro , will also approach
infinity, reducing Eq. 3.16 to Eq. 3.21.
As we can see from Figs. 3.5a and 3.5b, choosing different values for the DC input voltage, VIN , would result in
different quiescent collector currents, leading to different quiescent output voltages and small signal gains.

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Table 3.1: Biasing the common-emitter amplifier described in Fig. 3.5a.

VIN [mAV] IC,Q [mA] VOU T [V] Av V

 
V
Point A 672.5 1 4.5 −21.7
Point B 709.5 5 2.5 −108.7
Point C 718.9 7.5 1.25 −163.0

CE Amplifier Transient Response CE Amplifier Transient Response

4
vin = 10 mVp−p vin = 10 mVp−p
0.74 vin = 20 mVp−p vin = 20 mVp−p
3
0.73

vOUT [V]
vIN [V]

2
0.72
1
0.71
0
0 0.1 0.2 0.3 0.4 0.5 0 0.1 0.2 0.3 0.4 0.5
Time [s] Time [s]
(a) Input voltage (b) Output voltage

Figure 3.6: BJT common-emitter amplifier transient response when (a) it is biased at point C, and (b) a small signal
input sinusoid is applied.

For example, choosing VIN = 709.5 mV, and using Eqs. 3.4 and 3.18, results in IC,Q = 5 mA, and VOU T = 2.5 V,
corresponding to point B in Fig. 3.5a. Then, by using Eq. 3.21, we get Av = −108.7 VV , corresponding to point B in
Fig. 3.5b. Note that choosing either point A or point C in Fig. 3.5a would result in different small signal gains, as
seen in Fig. 3.5b and Table 3.1.

Choosing a Bias Point: A common question in the design of linear amplifiers is “What bias point should we use?”.
Clearly, if we want the largest possible gain, we would bias the CE amplifier near point C in Fig. 3.5b. However, let
us look at the implications of using point C as our bias point.
If we apply a sinusoidal small signal voltage, vin , to the input of our CE amplifier, we would get the transient
waveforms in Fig. 3.6. For vin = 10 mVp−p , we will get an output sinusoid, vout ≈ 1.6 Vp−p , as expected. However,
if we increase vin to 20 mVp−p , we see that the output is distorteda , as seen in Fig. 3.6b. The clipping of the lower
part of the output sinusoid is due to the transistor’s entry into its saturation region. This is due to the fact that the
increase in collector current, increases the voltage across RL , reducing the transistor’s VCE until it reaches VCE,sat .
Note that in the saturation region, vOU T = VCE,sat ≈ 0.2 V, independent of the input, vin .
The maximum symmetricb peak-to-peak output voltage of an amplifier is known as its output swing. For the
CE amplifier at bias point C, the output swing is limited by the largest negative output voltage that would keep
the BJT in its forward-active region. Thus, to keep the transistor VCE > VCE,sat , we should satisfy the relation
VOU T − |vout | > VCE,sat on the negative swing of vout . Therefore, the output swing can be expressed as

vout,max = 2 · (VOU T − VCE,sat ) = 2 · (1.25 − 0.2) V = 2.1 V (3.22)

On the other hand, let us examine what happens when choose point A in Fig. 3.5a as our bias point. Again if
we apply a sinusoidal small signal voltage, vin , to the input of our CE amplifier biased at point A, we would get the
transient waveforms in Fig. 3.7.
As seen in Fig. 3.7, applying vin = 10 mVp−p results in vout ≈ 210 mVp−p , again as expected, given that the
V
calculated small signal gain is −21.7 V . Increasing the input to 30 mVp−p results in an asymmetric output sinusoid, as
seen in Fig. 3.7b. The negative output swing can accommodate the gain, however, the positive swing is now limited
by the low-gain region in Fig. 3.5b. This is due to the fact that the quiescent DC output voltage, VOU T , of point
A is very close to the supply voltage, VCC . Thus, for the output voltage to reach VCC , the voltage across RL has
a Distortion is a measure of how different a signal is from a perfect sinusoid. Strictly speaking, all semiconductor amplifiers exhibit a

certain amount of distortion when a perfect sinusoid is applied at its input. However, here we mean the distortion due to the clipping or
flattening of the peaks of the sinusoid.
b The positive swing should be equal to the negative swing about the quiescent DC point.

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CE Amplifier Transient Response CE Amplifier Transient Response

5.2
vin = 10 mVp−p vin = 10 mVp−p
0.7
vin = 30 mVp−p 5 vin = 30 mVp−p

0.69 4.8

vOUT [V]
vIN [V]

0.68 4.6

0.67 4.4

4.2
0.66
4
0 0.1 0.2 0.3 0.4 0.5 0 0.1 0.2 0.3 0.4 0.5
Time [s] Time [s]
(a) Input voltage (b) Output voltage

Figure 3.7: BJT common-emitter amplifier transient response when (a) it is biased at point A, and (b) a small signal
input sinusoid is applied.

CE Amplifier Transient Response CE Amplifier Transient Response

4.5
vin = 10 mVp−p vin = 10 mVp−p
0.73 vin = 20 mVp−p 4 vin = 20 mVp−p
0.725
3.5
0.72
vOUT [V]
vIN [V]

3
0.715
2.5
0.71
2
0.705
0.7 1.5

0.695 1
0 0.1 0.2 0.3 0.4 0.5 0 0.1 0.2 0.3 0.4 0.5
Time [s] Time [s]
(a) Input voltage (b) Output voltage

Figure 3.8: BJT common-emitter amplifier transient response when (a) it is biased at point B, and (b) a small signal
input sinusoid is applied.

to be very small, requiring a larger negative small signal input voltage. Note that for the output to reach VCC , the
transistor needs to be placed in its cut-off region, where the collector current is zero.
A good tradeoff between gain and output swing would be to bias the common-emitter amplifier at point B. Thus,
by placing the output DC voltage at around half the supply voltage, we would get a relatively large output swing
without significant loss in voltage gain. The transient response of the common-emitter amplifier biased at point B is
shown in Fig. 3.8.
For a small signal input voltage of 10 mVp−p , the resulting small signal output voltage has a peak-to-peak value
V
of around 1.1 V, consistent with our computed small signal gain of −108.7 V in Table 3.1. Increasing the input to
20 mVp−p results in the output waveform in Fig. 3.8b. Note that the output exhibits less flattening during the positive
cycle of the sinusoid, while clipping is avoided during the negative cycle.
It is also important to note that the DC power the amplifier needs depends on the bias point. For the common-
emitter amplifier in Fig. 3.1a, we can calculate the quiescent DC power as

PDC = VCC IC,Q + VIN IB,Q (3.23)

As we can see in Eq. 3.23, a larger the quiescent DC collector current would result in a larger transconductance,
but would also consume more power. This tradeoff between gain, output swing and power is common in designing
electronic amplifiers.

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VCC VCC

RB RL

vOU T
iC

Q1
iB
vin
+

C∞ vBE
−

Figure 3.9: A fixed-bias common-emitter amplifier.

B ib ic C
+ +

vin RB rπ vbe gm vbe ro RL vout

− −

E E

Figure 3.10: The small signal model of the fixed-bias CE amplifier in Fig. 3.9.

3.1.4 The Fixed-Bias Common-Emitter Amplifier

Biasing the common-emitter amplifier using two DC voltage sources is costly, and sometimes, depending on where the
amplifier is used, using two DC voltage sources is not possible at all. Thus, an alternative to the biasing strategy used
in Fig. 3.1a is to use a resistor to generate the quiescent base-emitter DC voltage, as shown in Fig. 3.9.
The input is coupled into the base of the transistor using an infinitely large capacitor, C∞ . By using C∞ , we
prevent any DC current from flowing into the small signal input source, thus, preserving the DC bias point of the
amplifier. Also, since the capacitor is infinitely large, any non-DC small signal vin will just see a short circuit directly
to the base of the transistor, and will pass through the capacitor without any attenuation.
We can calculate the bias point by writing out the KVL equation for the base loop as

VCC − IB,Q RB − VBE = 0 (3.24)

Substituting Eq. 3.4 into Eq. 3.24, and expressing everything in terms of IC,Q , we get
 
IC,Q IC,Q
VCC − RB − VT ln =0 (3.25)
β IS
Using Eq. 3.25, we can solve for the quiescent DC collector current. However, solving a nonlinear (exponential)
equation is not as easy as solving a linear onec .
One way to quickly estimate the quiescent DC collector current is to use the approximation

VBE ≈ 0.7 V (3.26)

As seen in Table 3.1, the quiescent DC base-emitter voltage will be about 0.7 V, even for a relatively large range of
collector currents. Thus, if we are expecting currents in the order of 1 mA to 10 mA, then using Eq. 3.26 would give
a fairly good estimate of IC,Q . Using Eqs. 3.24 and 3.26, we can calculate IC,Q as
VCC − 0.7 V
IC,Q = β · (3.27)
RB
Once we know IC,Q , we can easily get the quiescent DC operating points IB,Q and VOU T , as well as the transistor
small signal parameters gm , ro and rπ . The small signal equivalent circuit of the fixed-bias CE amplifier is shown in
Fig. 3.10.
c It is common to solve these nonlinear equations by numerical, iterative, or graphical methods.

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VCC VCC

RB RL

vOU T
iC

Q1
iB
vin
+

C∞ vBE
−

RE

iE

Figure 3.11: The emitter degenerated common-emitter amplifier.

Note that this small signal equivalent circuit is almost the same as the one in Fig. 3.3, except that the input
resistance now becomes

Ri = rπ k RB (3.28)

3.1.5 Emitter Degeneration

One of the assumptions we have made so far is that the transistor β is constant. However, in real transistors, due to
limitations in the manufacturing process, β could vary by as much as ±50% from its nominald value, and furthermore,
β doubles for every 80 C◦ rise in temperature. If we built ten copies of the fixed-bias CE amplifier in Fig. 3.9, and from
Eq. 3.27, we would expect to get 10 amplifiers with small signal parameters, and output DC voltages, also varying by
±50%.
In some cases, this variation in parameters is acceptable, but in most cases, we want circuits that we can mass
produce, but can maintain tighter tolerances, say less than ±1%, in terms of parameter variability.
One way to reduce the effect of β variation is to use emitter degenerated CE amplifiers, such as the one shown in
Fig. 3.11.
To determine the quiescent DC collector current, we write out the KVL equation for the input loop

VCC − IB,Q RB − VBE − IE,Q RE = 0 (3.29)

Thus, using Eq. 3.26 and expressing IB,Q and IE,Q in terms of IC,Q , we get
 
IC,Q 1
VCC − RB − 0.7 V − IC,Q 1 + RE = 0 (3.30)
β β
Solving for the quiescent DC collector current, IC,Q ,
VCC − 0.7 V VCC − 0.7 V
IC,Q =   =β· (3.31)
RB
+ 1 + β1 RE RB + (β + 1) · RE
β

Note that if β is large, that is if β  1, and if β · RE  RB , we can express Eq. 3.31 as

VCC − 0.7 V
IC,Q ≈ (3.32)
RE
which is independent of β!
Another way of looking at Eq. 3.32 is when β → ∞, IB,Q → 0. This leads to the voltage across RB being reduced
to zero, and hence, leads to Eq. 3.32.
d For example, if we have 1000 pieces of the NPN BJT 2N2222A, with β = 100 as indicated in the data sheet, and if we expect ±50% β

variation, we would probably find some of the transistors to have β values as low as 50, or some as high as 200.

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B ib ic C
+ +

vin RB rπ vbe gm vbe ro RL vout

− −

E E
RE

Figure 3.12: The small signal equivalent circuit of the emitter-degenerated CE amplifier in Fig. 3.11.

β Sensitivity: One way to quantify the effect of β on the quiescent DC collector current is to compute the sensitivity
of IC,Q to β. Sensitivity is expressed as

I ∂IC,Q
SβC,Q = (3.33)
∂β
Thus, for a circuit with a lower the sensitivity, varying β would have a smaller effect on IC,Q .
Calculating the sensitivity of the quiescent DC collector current to the β value of the fixed-bias CE amplifier in
Fig. 3.9, we would get

I ∂IC,Q VCC − 0.7 V

SβC,Q = = (3.34)
∂β RB
While for the emitter-degenerated CE amplifier in Fig. 3.11, we have
RE
I ∂IC,Q VCC − 0.7 V 1+ RB
SβC,Q = = · 2 (3.35)
∂β RB RE
1 + (β + 1) R B

Comparing Eqs. 3.34 and 3.35, we can see that as β → ∞, the sensitivity of the emitter-degenerated CE amplifier
goes to zero, while the sensitivity of the fixed-bias CE amplifier remains constant.
Notice that the quiescent DC output voltage is now

VOU T = VCE + IE,Q RE (3.36)

VCC
Thus, if we want to set the quiescent DC output voltage to 2 , as well as place the transistor in its forward-active
region (VCE > VCE,sat ), we need to make sure that
VCC
2 − VCE,sat
RE <   (3.37)
IC,Q 1 + β1

Note that Eq. 3.37 is obtained by rearranging Eq. 3.36. For example, if VCC = 5 V, VCE,sat = 0.2 V, β = 100, and
IC,Q = 1 mA, the value of RE should be less than 2.28 kΩ, which is relatively small compared to ro and rπ .
Once we have obtained the quiescent DC collector current, we can now determine the small signal parameters of
the transistor, as well as draw the small signal equivalent circuit of the emitter-degenerated CE amplifier, as shown
in Fig. 3.12.
In order to reduce the complexity of our calculations, we can first solve for the two-port Norton equivalent circuit
of the transistor small signal model together with RE , ignoring RB and RL for now, as shown in Fig. 3.13.
In order to get the effective transconductance of the transistor with RE , we short the output to ground, and solve
i0
for G0m = vout 0
0 , where iout is the output short-circuit current. Writing the KCL equation at the emitter node, and
in
0
recognizing that vbe = vin − ve0 , we get

ve0 − vin
0
v0 v0 0
+ e + e − gm (vin − ve0 ) = 0 (3.38)
rπ RE ro
Solving for ve0 , we get
1
gm + rπ
ve0 = vin
0
· 1 1 1 (3.39)
gm + rπ + ro + R E

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0
B0 B ib ic C C 0 iout
+
+ + + +
rπ vbe gm vbe ro

0 0 −
vtest i0test vin 0
vout vtest itest
+
E E
ve0 RE
− − − −
−
E0 E0

Figure 3.13: The small signal model of the emitter-degenerated NPN BJT.

The short-circuit output current is then

1 1
ve0 R E − ro g m rπ
i0out = gm (vin
0
− ve0 ) − 0
= vin · gm · (3.40)
ro gm + r1π + r1o + 1
RE

Thus,
1 1
i0out R E − ro g m rπ
G0m = 0 = gm · (3.41)
vin gm + r1π + r1o + 1
RE

Eq. 3.41 is relatively complex and does not give us much intuition regarding the effect of RE . However, if we
simplify Eq. 3.41 by assuming gm ro  1, gm rπ = β  1, RE  ro , and RE  rπ , we get
1
RE gm
G0m ≈ gm · 1 = < gm (3.42)
gm + RE
1 + gm RE
Since (1 + gm RE ) > 1, Eq. 3.42 shows that the effective transconductance of the transistor and RE circuit is lower
than the transconductance of the transistor without RE . Thus, we say that the transconductance is degenerated by
the degenerating resistor, RE .
The effective output resistance can be calculated by applying a test voltage at the output and measuring the
current, when the input small signal voltage is set to zero. However, in this case, let us apply a test current source,
itest , at the output, and measure the resulting output voltage, vtest . Since the circuit is linear, we should get the same
result.
Applying itest at the output, and recognizing that rπ is now parallel to RE when the input small signal voltage is
set to zero, gives us

ve0 = itest · (rπ k RE ) (3.43)

And since vbe = −ve0 when the input is shorted to ground, the current through the output impedance, ro is

iro = itest − gm vbe = itest + gm ve0 = itest (1 + gm (rπ k RE )) (3.44)

Thus, the output voltage, vtest is equal to

vtest = iro ro + ve0 = itest (ro + gm ro (rπ k RE ) + (rπ k RE )) (3.45)

The effective output impedance of the transistor with emitter degeneration can then be expressed as
vtest
Ro0 = = ro + gm ro (rπ k RE ) + (rπ k RE ) (3.46)
itest
Using the same set of assumptions we used for Eq. 3.42, we can simplify Eq. 3.46 as

Ro0 ≈ ro + RE + gm ro RE ≈ ro + gm ro RE = ro (1 + gm RE ) > ro (3.47)

Notice that degenerating the transistor by RE increases its output resistance by a factor (1 + gm RE ).
Computing the effective input resistance of the emitter-degenerated transistor is similar to computing the output
resistance, except that we apply the test current, i0test , at the input, and measure the resulting input test voltage,
0
vtest , when the output is shorted to zero, the Norton no-load condition.

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EEE 51 Handout 3-1
c L. Alarcón, updated January 27, 2015

B0 C0
+ +
0 gm 0
vin RB rπ (1 + gm RE ) vin 1+gm RE · vin ro (1 + gm RE ) RL vout

− −
0 0
E E

Figure 3.14: The emitter-degenerated common-emitter amplifier small signal model in Fig. 3.12 using the derived
effective two-port model of the emitter-degenerated transistor.

Applying i0test , and recognizing that vbe = i0test rπ and that RE and ro are connected in parallel, we can get the
voltage across the parallel combination of RE and ro as

ve0 = (i0test + gm vbe ) · (RE k ro ) = i0test (1 + gm rπ ) · (RE k ro ) (3.48)

0
Thus, we can calculate vtest as
0
vtest = vbe + ve0 = i0test (rπ + (RE k ro ) + gm rπ (RE k ro )) (3.49)
Therefore, the effective input resistance of the emitter-degenerated transistor is
0
vtest
Ri0 = = rπ + (RE k ro ) + gm rπ (RE k ro ) (3.50)
i0test
Again, using the assumptions we used for Eq. 3.42, we can simplify Eq. 3.50 as

Ri0 ≈ rπ + RE + gm rπ RE ≈ rπ + gm rπ RE = rπ (1 + gm RE ) > rπ (3.51)

Once again, note that degenerating the transistor by RE increases its input resistance of the BJT by a factor
(1 + gm RE ).
Using the small signal model of the emitter-degenerated transistor, we can now draw the two-port small signal
equivalent circuit of the common-emitter amplifier with emitter degeneration, as shown in Fig. 3.14.
By inspecting Fig. 3.14, we can easily see that the effective transconductance, Gm , of the emitter degenerated CE
amplifier is
gm
Gm = (3.52)
1 + gm RE
and for the case when RL  ro (1 + gm RE ) and RB  rπ (1 + gm RE ), the output and input resistances can be
expressed as

Ro = RL k ro (1 + gm RE ) ≈ RL (3.53)

Ri = RB k rπ (1 + gm RE ) ≈ RB (3.54)
The small signal voltage gain is then
gm RL
Av = −Gm Ro ≈ − (3.55)
1 + gm RE
Again, note that the small signal voltage gain is degraded or degenerated by RE . It is interesting to node that if
RL
gm RE  1, then the voltage gain approaches − R E
, which is independent of the transistor parameters!e
Thus, the consequences of reducing the effect of β variations on the quiescent DC collector current include (1)
reduced small signal voltage gain, (2) increased small signal input resistance, and (3) increased small signal output
resistance.

e We will revisit this result in the feedback amplifiers section.

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