0% found this document useful (0 votes)
58 views9 pages

ASSIGNMENT 1 (Embd&IOmT)

The document describes the design process of embedded systems with examples. It defines the requirements gathering process including functional requirements like inputs/outputs and performance needs, and non-functional requirements like cost and power consumption. It then explains the specification, architecture design, hardware/software component design, system integration, and provides an example of a GPS moving map system. It also describes the POST (power-on self-test) process that verifies hardware is working on startup and the basics of I2C and CAN communication protocols.

Uploaded by

rakesh.j
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
58 views9 pages

ASSIGNMENT 1 (Embd&IOmT)

The document describes the design process of embedded systems with examples. It defines the requirements gathering process including functional requirements like inputs/outputs and performance needs, and non-functional requirements like cost and power consumption. It then explains the specification, architecture design, hardware/software component design, system integration, and provides an example of a GPS moving map system. It also describes the POST (power-on self-test) process that verifies hardware is working on startup and the basics of I2C and CAN communication protocols.

Uploaded by

rakesh.j
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 9

ASSIGNMENT -1

1.Define design process of embedded systems with an example.


Design process:
Design process has two objectives as follows.
1. It will give us an introduction to the various steps in embedded system
design.
2. Design methodology
I. Design to ensure that we have done everything we need to do, such
as optimizing performance or performing functional tests.
II. It allows us to develop computer-aided design tools
III. A design methodology makes it much easier for members of a
design team to communicate.

REQUIREMENTS:
It can be classified in to functional or nonfunctional
Functional Requirements:
• Gather an informal description from the customers.
• Refine the requirements into a specification that contains enough
information to design the system architecture. Ex:Sample Requirements form
• Name→Giving a name to the project
Purpose→Brief one- ortwo-line description of what the systemis supposed
to do.
• Inputs& Outputs →Analog electronic signals? Digital data? Mechanical
inputs?
• Functions→ detailed description of what the system does
Performance→ computations must be performed within a certain time frame
•Manufacturing cost→ cost of the hardware components.
Power→ how much power the system can consume
Physical size and weight→ indication of the physical size of the system
Non-Functional Requirements
Performance→ depends upon approximate time to perform a user-level
function and also operation must be completed within deadline.
Cost→Manufacturing cost includes the cost of components and assembly.
Nonrecurring engineering (NRE) costs include the personnel and other
costs of designing thesystem
Physical Size and Weight→The final system can vary depending upon the
application.
Power Consumption→Power can be specified in the requirements stage
in terms of battery life.
2)SPECIFICATION
The specification must be carefully written so that it accurately reflects
the Customer’s requirements.
It can be clearly followed during design.
3) Architecture Design
The architecture is a plan for the overall structure of the system.
It is in the form block diagram that shows a major operation and data
flow.
4) Designing Hardware and Software Components
The architectural description tells us what components we need include
both hardware—FPGAs, boards & software modules
5)System Integration
Only afterthe components are built, putting them together and seeing a
working system.
Bugs are found during system integration, and good planning can help us
find the bugs quickly.
EXAMPLE:
Name :GPS moving map
Purpose :Consumer-grade moving map for driving use
Inputs: Power button, two control buttons
Outputs: Back-lit LCD display 400 600 Functions :Uses 5-receiver GPS system;
three user-selectable resolutions;always displays current latitude and longitude
Performance: Updates screen within 0.25 seconds upon movement
Manufacturing cost: $30
Power 100mW
Physical size and weight:No more than 2”X 6,”12 ounces

2.Ellaborate the working of POST.


POST
A power-on self-test (POST) is a set of routines performed by firmware or
software immediately after a computer is powered on, to determine if the
hardware is working as expected. The process would proceed further only if the
required hardware is working correctly, else the BIOS(Basic Input Output
Software) would issue an error message. POST sequence is executed
irrespective of the Operating. System and is handled by the system BIOS. Once
the tests are passed the POST would generally notify the OS with beeps while
the number of beeps can vary from system to system. When POST is
successfully finalized, bootstrapping is enabled.Bootstrapping starts the
initialization of the OS.
WORKING:
The boot sequence is the process of starting a computer/system. The boot
process is initiated when the power button is pressed, it sends power to the boot-
loader in the cache memory. The Boot loader performs POST as a preboot
sequence and if everything is working well without any errors the BIOS(Basic
Input Output System) is activated which finds and loads the operating
system.Finally the software has to interact with the hardware units to complete
the process. To avoid any hardware errors while executing a software program,
the pre-boot sequence would test the hardware and initiate the OS if and only if
the basic hardware units are functioning as expected. he principal duties of the
main BIO during POST are as follows:
1. Find, size, and verify the system main memory.
2. Initialize BIOS.
3. Identify, organize, and select which devices are available for booting.
4. Verify CPU registers.
5. Verify the integrity of the BIOS code itself.
6. Verify some basic components like DMA, timer, interrupt controller.
7. Pass control to other specialized extensions BIOS (if installed).

3.Explain I2C interfacing protocol.


The inter-IC, or I2C bus as it is more readily known, was developed by
Philips originally for use within television sets in the mid-1980s. It is probably
the most known simple serial interface currently used. It combines both
hardware and software protocols to provide a bus interface that can talk to many
peripheral devices and can even support multiple bus masters. The serial bus
itself only uses two pins for its implementation.
The bus consists of two lines called SDA and SCL. Both bus masters
and slave peripheral devices simply attach to these two lines as shown in the
diagram. For small numbers of devices and where the distance between them is
small, this connection can be direct. For larger numbers of devices and/or where
the track length is large, Philips can provide a special buffer chip (P82B715) to
increasethe current drive. The number of devices is effectively determined by
the line length, clock frequency and load capaci-tance which must not exceed
400 pF although derating this to 200 pF is recommended. With low
frequencies,connections of several metres can be achieved without resorting to
special
The drivers for the signals are bidirectional and require pull-up resistors.
When driven they connect the line to ground to create a low state. When the
drive is removed, the output will be pulled up to a high voltage to create a high
signal. Without the pull-up resistor, the line would float and can cause
indeterminate values and thus cause errors.
The SCL pin provides the reference clock for the transfer of data but it is
not a free running clock as used by many other serial ports. Instead it is clocked
by a combination of the master and slave device and thus the line provides not
only the clock but also a hardware handshake line.
The SDA pin ensures the serial data is clocked out using the SCL line
status. Data is assumed to be stable on the SDA line if SCL is high and
therefore any changes occur when the SCL is low. The sequence and logic
changes define the three messages used.

The
table shows the hardware signalling that is used for the three signals, START,
STOP and ACKNOWLEDGE. The START and ACKNOWLEDGE signals are
similar but there is a slight difference in that the START signal is performed
entirely by the master whereas the ACKNOWLEDGE signal is a handshake
between the slave and master.
Data is transferred in packets with a packet containing one or more
bytes. Within each byte, the most significant bit is trans-mitted first. A packet,
or telegram as it is sometimes referred to, is defined as the data transmitted
between START and STOP signals sent from the master. Within the packet
transmission, the slave will acknowledge each byte by using the
ACKNOWLEDGE sig-nal. The basic protocol is shown in the diagram.

4.Describe the working of CAN protocol.


CAN
CAN stands for Controller Area Network protocol. It is a protocol that
was developed by Robert Bosch in around 1986. The CAN protocol is a
standard designed to allow the microcontroller and other devices to
communicate with each other without any host computer. The feature that
makes the CAN protocol unique among other communication protocols is the
broadcast type of bus. Here, broadcast means that the information is transmitted
to all the nodes. The node can be a sensor, microcontroller, or a gateway that
allows the computer to communicate over the network through the USB cable
or Ethernet port. The CAN is a message-based protocol, which means that
message carries the message identifier, and based on the identifier, priority is
decided. There is no need for node identification in the CAN network, so it
becomes very easy to insert or delete it from the network. It is a serial half-
duplex and asynchronous type of communication protocol. The CAN is a two-
wired communication protocol as the CAN network is connected through the
two-wired bus. The wires are twisted pair having 120Ω at each end. Initially, it
was mainly designed for communication within the vehicles, but it is now used
in many other contexts. Like UDS, and KWP 2000, CAN also be used for the
board diagnostics.
SOF: SOF stands for the start of frame, which indicates that the new frame is
entered in a network. It is of 1 bit.
Identifier: A standard data format defined under the CAN 2.0 A specification
uses an 11-bit message identifier for arbitration. Basically, this message
identifier sets the priority of the data frame.
RTR: RTR stands for Remote Transmission Request, which defines the frame
type, whether it is a data frame or a remote frame. It is of 1-bit.
Control field: It has user-defined functions.
1.IDE: An IDE bit in a control field stands for identifier extension. A
dominant IDE bit defines the 11-bit standard identifier, whereas recessive IDE
bit defines the 29-bit extended identifier.
2. DLC: DLC stands for Data Length Code, which defines the data
length in a data field. It is of 4 bits.
3. Data field: The data field can contain upto 8 bytes.
CRC field: The data frame also contains a cyclic redundancy check field of 15
bit, which is used to detect the corruption if it occurs during the transmission
time. The sender will compute the CRC before sending the data frame, and the
receiver also computes the CRC and then compares the computed CRC with the
CRC received from the sender. If the CRC does not match, then the receiver
will generate the error.
ACK field: This is the receiver's acknowledgment. In other protocols, a separate
packet for an acknowledgment is sent after receiving all the packets, but in case
of CAN protocol, no separate packet is sent for an acknowledgment.
EOF: EOF stands for end of frame. It contains 7 consecutive recessive bits
known End of Frame.

5. Discuss different tools needed to develop Embedded Software.


Embedded Software is the software that controls an embedded system.
All embedded systems need some software for their functioning. Embedded
software or program is loaded in the microcontroller which then takes care of all
the operations that are running. For developing this software, a number of
different tools are needed which I will discuss further. These tools include
editor, compiler, assembler and debugger. Let’s have a look at them
EDITOR:
 The first tool you need for Embedded Systems Software Development

Tools is a text editor.

 This is where you write the code for your embedded system.

 The code is written in some programming language. The most commonly

used language is C or C++.

 The code written in the editor is also referred to as source code.

COMPILER:

 The second among Embedded Systems Software Development Tools is a

compiler.

 A compiler is used when you are done with the editing part and made a

source code.

 The function of compiler is to convert the source code into object code.

 Object code is understandable by computers as it is a low level

programming language.

ASSEMBLER:

 The third and an important one among Embedded Systems Software

Development Tools is an assembler.


 The function of an assembler is to convert a code written in assembly

language into machine language.

 All the mnemonics and data is converted in to op codes and bits by an

assembler.

 We all know that our computer understands binary and it works on 0 or

1, so it is important to convert the code into machine language.

DEBUGGER:

 As the name suggests, a debugger is a tool used to debug your code.

 It is important to test whether the code you have written is free from

errors or not. So, a debugger is used for this testing.

 Debugger goes through the whole code and tests it for errors and bugs.

 It tests your code for different types of errors for example a run time

error or a syntax error and notifies you wherever it occurs.

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy