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8254 Programmableinterval Timer

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0% found this document useful (0 votes)
25 views5 pages

8254 Programmableinterval Timer

Uploaded by

artbyvisha
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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BHARAT ACADEMY

Thane: 1, Vagholkar Apts, Behind Nagrik Stores, Near Rly Stn, Thane (W). Tel: 022 2540 8086 / 809 701 8086
st
Nerul: E-103, 1 Floor, Railway Station Complex, Nerul (W), Navi Mumbai. Tel: 022 2771 8086 / 865 509 8086

8254
PROGRAMMABLE
INTERVAL TIMER

bharatsir@hotmail.com Notes Prepared by Bharat Sir Bharat Sir: 98204 08217


Chopra Academy Bandra – 022 2642 1927 Page 124
MICROPROCESSORS
Sem V (Computers, Biomed)
JAVA batches by Bharat Sir starting December 2016!

IC 8254 is used as a timer device to produce Hardware delays.


It can also be used to generate a real-time clock, or as a square wave generator etc.
Hardware delays are more useful than software delays because the µP is not actively involved in
producing the delay. Thus when the delay is being produced the µP is free to execute its own
program.
The counting is done using 3 independent 16-bit down counters.
These counters can take the count in BCD or in Binary.
Once the Counter finishes counting (reqd delay is produced), 8254 interrupts µP.

Architecture of 8254

bharatsir@hotmail.com Notes Prepared by Bharat Sir Bharat Sir: 98204 08217


JAVA batches by Bharat Sir starting December 2016! Page 125
BHARAT ACADEMY
Thane: 1, Vagholkar Apts, Behind Nagrik Stores, Near Rly Stn, Thane (W). Tel: 022 2540 8086 / 809 701 8086
st
Nerul: E-103, 1 Floor, Railway Station Complex, Nerul (W), Navi Mumbai. Tel: 022 2771 8086 / 865 509 8086

The architecture of 8254 can be divided into the following parts:

1) Data Bus Buffer


It is used to interface the internal data bus with the external (system) data bus.
It is thus connected to D7 – D0 form the µP.

2) Read Write Logic


It accepts the RD & WR signals, which are used to control the flow of data through data bus.

The CS signal is used to select the 8254 chip.


It also accepts the A1 – A0 address lines which are used to select one of the Counters or the
Control Word as shown below:

For 8254 For 8086


Selection Sample address
A1 A0 A2 A1
0 0 0 0 Counter 0 80 H (i.e. 1000 0000)
0 1 0 1 Counter 1 82 H (i.e. 1000 0010)
1 0 1 0 Counter 2 84 H (i.e. 1000 0100)
1 1 1 1 Control Word 86 H (i.e. 1000 0110)

3) Control Word Register

SC1 SC0 RW1 RW0 M2 M1 M0 BCD

SC1 SC0 Selection RW1 RW0 Selection


0 0 Select Counter 0 0 0 COUNTER LATCH COMMAND
0 1 Select Counter 1 0 1 Read/Write LSB Only
1 0 Select Counter 2 1 0 Read/Write MSB Only
1 1 READ BACK COMMAND 1 1 Read/Write LSB First
(Only for 8254; illegal for 8253) and then MSB

M2 M1 M0 Mode Selection
0 0 0 Mode 0 --- Interrupt On Terminal Count
0 0 1 Mode 1 --- Monostable Multivibrator
X 1 0 Mode 2 --- Rate Generator
X 1 1 Mode 3 --- Square Wave Generator
1 0 0 Mode 4 --- Software Triggered Strobe
1 0 1 Mode 5 --- Hardware Triggered Strobe

BCD Type of Count


0 Binary Counter (1 digit è 0H … FH) ∴ Hex Count
1 BCD Counter (1 digit è 0 …9) ∴ Decimal Count

bharatsir@hotmail.com Notes Prepared by Bharat Sir Bharat Sir: 98204 08217


Chopra Academy Bandra – 022 2642 1927 Page 126
MICROPROCESSORS
Sem V (Computers, Biomed)
JAVA batches by Bharat Sir starting December 2016!

The Control Word Register is an 8-bit register that holds the Control Word as shown above.
It is selected when A1 – A0 contain 11.
It has a different format when a Read Back command is given for 8254, as shown below

Read Operations
There are 3 ways in which the µP can read the current count:

A) Ordinary Read
In this method, the counting is stopped by controlling the gate input of a selected counter.
The Counter is then selected by A1 – A0 and IO Read operation is performed.
First IO Read will give the Lower byte of the Count value, and the second IO Read will give the
higher byte. For doubts contact Bharat Sir on 98204 08217
The disadvantage here is that counting is disturbed/stopped.

B) Read on Fly
In this method, the µP reads the count value while the counting is still in progress.
Thus, it is called as Read On Fly.
The appropriate value is written in the control word, and IO Read operation is performed.
The current value of the Count is "latched" internally and returned to the µP.
The advantage here is that counting is not disturbed.

C) Read Back Command

1 1 Count Status CNT-2 CNT-1 CNT- 0 0

1 = Latch Count of the 1 = Select required


selected counter Counter

1 = Latch Status of the


selected counter

− The Read Back Command is available only for 8254 and not for 8253.
− The Read Back Command reads the Count value in the same manner as Read On Fly.
− In addition to the Count, the current Status can also be latched using the Read Back command.
− Thus, the appropriate value (for latching the Count and/or Status of the selected counter) is placed
in the Control word as shown above.
− The advantage here is that the Count and the Status both can be read without disturbing the
counting.

Status Word (Status returned after the Read Back Command)

Output Null Count RW1 RW0 M2 M1 M0 BCD

1 = Null Count
0 = Count is present Same as Control Word

1 = OUT pin is high


0 = OUT pin is low

bharatsir@hotmail.com Notes Prepared by Bharat Sir Bharat Sir: 98204 08217


JAVA batches by Bharat Sir starting December 2016! Page 127
BHARAT ACADEMY
Thane: 1, Vagholkar Apts, Behind Nagrik Stores, Near Rly Stn, Thane (W). Tel: 022 2540 8086 / 809 701 8086
st
Nerul: E-103, 1 Floor, Railway Station Complex, Nerul (W), Navi Mumbai. Tel: 022 2771 8086 / 865 509 8086

4) 3 Independent Counters
− 8254 has 3 Independent, 16-bit down counters.
− Each counter can operate have a Binary or BCD count.
− Each counter can be in one of the six possible modes.
− Each counter can have a max count of 216 = 65535 i.e. FFFFH.
− Each counter has the following signals:

i. Clk (Clock Input)


ii. Gate(Gate Input)
iii. Out (Clock Output)
− The input clock signal is applied on the CLK line.
− The counter decrements the "count value" on every pulse of the input clock at CLK.
− When the count becomes zero (Terminal Count i.e. TC), the status of the OUT pin changes. For
doubts contact Bharat Sir on 98204 08217
This can be used to interrupt the µP.
− The GATE pin is used to control the Counting.
In most modes, the count value gets decremented only if the GATE pin is high.

bharatsir@hotmail.com Notes Prepared by Bharat Sir Bharat Sir: 98204 08217


Chopra Academy Bandra – 022 2642 1927 Page 128

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