8086 Microprocessor

By

Lecture 4
8086 Architecture
The 8086/8088 Microprocessors: Registers
• Registers
– Registers are in the CPU and are referred to by specific names
– Data registers
• Hold data for an operation to be performed
• There are 4 data registers (AX, BX, CX, DX)
– Address registers
• Hold the address of an instruction or data element
• Segment registers (CS, DS, ES, SS)
• Pointer registers (SP, BP, IP)
• Index registers (SI, DI)
– Status register
• Keeps the current status of the processor
• On an IBM PC the status register is called the FLAGS register
– In total there are fourteen 16-bit registers in an 8086/8088
 Data Registers: AX, BX, CX, DX
• Instructions execute faster if the data is in a register
• AX, BX, CX, DX are the data registers
• Low and High bytes of the data registers can be accessed
separately
– AH, BH, CH, DH are the high bytes
– AL, BL, CL, and DL are the low bytes
• Data Registers are general purpose registers but they also
perform special functions
• AX
– Accumulator Register
– Preferred register to use in arithmetic, logic and data transfer instructions
because it generates the shortest Machine Language Code
– Must be used in addition and subtraction operations
– Must also be used in I/O operations
 Data Registers: AX, BX, CX, DX
• BX
– Base Register
– Also serves as an address register
– Used in array operations
– Used in Table Lookup operations (XLAT)
• CX
– Count register
– Used as a loop counter
– Used in shift and rotate operations
• DX
– Data register
– Used in multiplication and division
– Also used in I/O operations
 Pointer and Index Registers
• Contain the offset addresses of memory locations
• Can also be used in arithmetic and other operations
• SP: Stack pointer
– Used with SS to access the stack segment
• BP: Base Pointer
– Primarily used to access data on the stack
– Can be used to access data in other segments
• SI: Source Index register
– is required for some string operations
– When string operations are performed, the SI register points to
memory locations in the data segment which is addressed by the
DS register. Thus, SI is associated with the DS in string
operations.
 Pointer and Index Registers

• DI: Destination Index register

– is also required for some string operations.
– When string operations are performed, the DI register points to
memory locations in the data segment which is addressed by the
ES register. Thus, DI is associated with the ES in string
operations.
• The SI and the DI registers may also be used to access data
stored in arrays
 Segment Registers - CS, DS, SS and ES
• Are Address registers
• Store the memory addresses of instructions and data
• Memory Organization
– Each byte in memory has a 20 bit address starting with 0 to 220-1 or 1
meg of addressable memory
– Addresses are expressed as 5 hex digits from 00000 - FFFFF
– Problem: But 20 bit addresses are TOO BIG to fit in 16 bit registers!
– Solution: Memory Segment
• Block of 64K (65,536) consecutive memory bytes
• A segment number is a 16 bit number
• Segment numbers range from 0000 to FFFF
• Within a segment, a particular memory location is specified with an offset
• An offset also ranges from 0000 to FFFF
Segmented Memory
Segmented memory addressing: absolute (linear) address is a
combination of a 16-bit segment value added to a 16-bit offset

F0000
E0000 8000:FFFF
D0000
C0000
B0000
linear addresses

A0000
one segment
90000
80000
70000
60000
8000:0250
50000
0250
40000
30000 8000:0000
20000
10000
seg ofs
00000
Intel

Memory Address Generation

• The BIU has a dedicated adder for
determining physical memory addresses
Offset Value (16 bits)

Segment Register (16 bits) 0000

Adder

Physical Address (20 Bits)

 Intel

Example Address Calculation

• If the data segment starts at location 1000h
and a data reference contains the address
29h where is the actual data?
2 9

Offset: 0000000000101001

Segment: 0001000000000000 0000

Address: 0001000000000010 1001

 Segment:Offset Address

• Logical Address is specified as segment:offset

• Physical address is obtained by shifting the segment address 4
bits to the left and adding the offset address
• Thus the physical address of the logical address A4FB:4872 is
A4FB0
+ 4872
A9822
Your turn . . .

What linear address corresponds to the segment/offset address

028F:0030?

028F0 + 0030 = 02920

Always use hexadecimal notation for addresses.

Your turn . . .

What segment addresses correspond to the linear address 28F30h?

Many different segment-offset addresses can produce the linear

address 28F30h. For example:
28F0:0030, 28F3:0000, 28B0:0430, . . .
 The Code Segment 0H

4000H
CS: 0400H

IP 0056H 4056H
CS:IP = 400:56
Logical Address

Memory
0400 0
Segment Register

Offset + 0056
Physical or 04056H
0FFFFFH

Absolute Address

The offset is the distance in bytes from the start of the segment.
The offset is given by the IP for the Code Segment.
Instructions are always fetched with using the CS register.

The physical address is also called the absolute address.

 The Data Segment 0H

05C00H
DS: 05C0

05C50H
EA 0050 DS:EA

Memory
05C0 0
Segment Register

Offset + 0050

Physical Address 0FFFFFH

05C50H

Data is usually fetched with respect to the DS register.

The effective address (EA) is the offset.
The EA depends on the addressing mode.
 The Stack Segment 0H

0A00 0A000H
SS:

0A100H
SP 0100 SS:SP

Memory
0A00 0
Segment Register

Offset + 0100
0FFFFFH
Physical Address 0A100H

The offset is given by the SP register.

The stack is always referenced with respect to the stack segment register.
The stack grows toward decreasing memory locations.
The SP points to the last or top item on the stack.

PUSH - pre-decrement the SP

POP - post-increment the SP