Experiment No. ~ 1 oe | a Observations 1(a) Aim: To verify Kirchhof?'s Current Law. Calculation : Learning Objective: To provide students with « fundamental knowledge of Kirchhoff's current law, ity On applying K application and limitations eee ‘@ To help the students to understand the concept of node and branch. ere Hee 1), Landh, are Apparatus Required: 1. Trainer's kit. 2. Variable D.C supply (0-15V) 2 Nos. 3. Ammeter (0-10) mA 4, Voltmeter (0-15)V 5 Connecting wires Theory: Kirchhoff’s Current Law (KCL) Statement: In any electrical network, the algebraic sum of the currents meeting at a Putting val point (or junction) is zero i.e. the total current leaving a junction is equal to the total current entering that junction. Observa Tincoming = © !outgoing % eee (@ Practi Circuit Diagram : | \ S.No. | = (ayThe Figure 2 - Circuit diagram for KCL Basic Electrical Engineering Laboratory Manual 10Observations : Ri=3300 REIKA Ry=5600 Calculation : On applying KCL at Node A : h=l+h (1) Where Va is potential of node A. I, andl; are branch currents +++-Q) iS --+-@) so) Putting values from equations(2), (3)and (4) into (1) to obtain the value of Va Va =____ volts Observation Table: (@ Practically Obtained Value SNo, | Yoltase ls | Voltage Ve Node VoltageV, | 1, Le “_|F Voits Volts Volts mA | mA | (ii) Theoretically Obtained Value 7 Voltage V, | Voltage V, | Node VoltageVa| hh | bk |! 1-le | Bo: Volts Volts Volts mA | mA | mA 1 i 2 | 3 nd Procedure: = 1 astaw taharatory Manual 11oe _ Onsolving eq. no (1) and (2) value of I, and I, 1 Connections are made as per the circuit diagram, 7 : 2. Check your connections before switching on the supply, 2. Vary the voltages Vj andV’), 4, Measure the branch currents using ammeter, ; heoretically obtained vah Kirchhoff's current been verified. The theoretic ec) vilues yng | cease) iiared enix same (within permitted tolerance limit). The valuey op | ‘various branch currents for different values of input voltages are tabulated jn the ‘observation table, 1D) Aim: To verify Kirchhoff's Voltage Law. Learning Objective : © To provide students with a fundamental knowledge of Kirchhoff"s Voltage Law, its application and limitations. © To help the students to understand the concept of loop and mesh. Theory: Kirchhoff"s Voltage Law (KVL) Statement: The algebraic sum of the products of currents and resistan: conductions in any closed path (or mesh) in a network plus the al; .mfs.in that path is zero. ZE=2IR or LE+3(-)IR=0 s in each of the gebraic sum of the Sign Convention: Voltage Drop : — ve sign >h Vy Voltage Rise : + ve sign = 5 ; Figure 3 Ri =3900 Ry =8200 Ry=12kQ ‘Where J; and /, are loop (mesh) current Onapplying KVL in Loop 1 : ¥, ~ 1,2, (1, - 1,)R, = 0 ----() (On applying KVL in Loop 2: ~/,2, — (i, — ,), ~V, = 0 --+-Q) are obtained laboratory Manual 12o Practicadty 8 ‘ey + Sno C Vortaye Ve | Alodt Volte te @ Theoriti calty Ovteined) Vedve ss : j | } S.N0 Voltage Vij) Nottege Ve Node Voltage VA Volts) | Volts Volts s £90oe _ Onsolving eq. no (1) and (2) value of I, and I, 1 Connections are made as per the circuit diagram, 7 : 2. Check your connections before switching on the supply, 2. Vary the voltages Vj andV’), 4, Measure the branch currents using ammeter, ; heoretically obtained vah Kirchhoff's current been verified. The theoretic ec) vilues yng | cease) iiared enix same (within permitted tolerance limit). The valuey op | ‘various branch currents for different values of input voltages are tabulated jn the ‘observation table, 1D) Aim: To verify Kirchhoff's Voltage Law. Learning Objective : © To provide students with a fundamental knowledge of Kirchhoff"s Voltage Law, its application and limitations. © To help the students to understand the concept of loop and mesh. Theory: Kirchhoff"s Voltage Law (KVL) Statement: The algebraic sum of the products of currents and resistan: conductions in any closed path (or mesh) in a network plus the al; .mfs.in that path is zero. ZE=2IR or LE+3(-)IR=0 s in each of the gebraic sum of the Sign Convention: Voltage Drop : — ve sign >h Vy Voltage Rise : + ve sign = 5 ; Figure 3 Ri =3900 Ry =8200 Ry=12kQ ‘Where J; and /, are loop (mesh) current Onapplying KVL in Loop 1 : ¥, ~ 1,2, (1, - 1,)R, = 0 ----() (On applying KVL in Loop 2: ~/,2, — (i, — ,), ~V, = 0 --+-Q) are obtained laboratory Manual 12and S of the A Observation Tables: @ Theoreti i retically obtained the values of voltages in loop 1 it T % [y= S.No. | (mA | (nm “1_| Wehr, [Vy = =1)R; | itv, 4%, = Fe foay | sy [Cree] crete) (Vou mee ) | A) ) ‘olte) (Volts ) (@ Theoretically obtained the values of voltage drop in loop 2 | LATE I Vy, = = sNo. | (m | (m | (nm (vats ra 7 SE al | ay] a) | a) pee (eam cae . = -—|- Bit r ; | 3 | | i Procedure: 1, Connections are made as per the circuit diagram. 2. Switch ‘ON’ the power supply of the kit Select any desired loop. & Note down the various currents ie. 1, In, & Is a above. Calculatel,Ry, [Rp & IsRs ie. Va» V4 & Vs 4. 1. Apply KVL as per given in observation table and verify the result. 2. Repeat same step for different loops. 3, Vary the regulated supply. 4, Measure the voltage using voltmeter. 5, Note the readings in the tabulation. cic electrical Engineering aboratory Manual 33lS 6. Compare the observation reading to theoretical value, (i) Practically obtaining the values of voltage drop in loop 1 % Ys Vs VV, £V,=0 S.No. (Volts (Volts) (Volts ) (Volts ) i 2¢a) Aim: 7 Learning 2 Study of t 3 circuit eles a Apparat (ii) Practically obtaining the values of voltage drop in loop 2 a S Ye V V; V, £V,+V;=0 3. A HNO. T—CVolts ) (Wolts) (Volts) (Volts ) ‘Theory: + St 1 In resistan¢ 2 currents | 1 3 | through each so deactiv Results: by oper Kirchhoff's Voltage law has been verified. The theoretically obtained values and Cireui practically obtained values are same (within permitted tolerance limit). The values of Various branch current for different values of Input voltages are tabulated in the observation table. Faculty Signature ‘ amen ca} Ba Basic Electrical Engineering Laboratory Manual 14que d wi" ; ede | Obsuvetion sevle © Theoretically + Ny 2 + ote | om) fon ) & WU} s Voi ts | NoNeeaee + | eben] “passa Kr S 2 fee ssiroa] @ | -4.\3s fae: | he | ie ree 13 fusfanjes] § |- 3.0 W819 Pel \ y Treowets codhy [7 el [lo fe lot *52 | | | ia | : Jt furs ie | ‘ | am : 2 foul wld [189] Wy |0 Practien Uy Aw oo? gdierning the vellves | —- | 6 \ @ Practically obseomley Yre elves °° vo ey nw loop 2 _V2 NEN Ne Nas Vu J CVo\45 | Col 8) (volss) fio\*s ) 10 Vv | g- soy | 3: tw 4h GS 3-21 +10 = | | Rv \ia & Ge 362 SB G2+838: Hit & $.au Sf eS | Me 2-98 76 A ! 0 Ra > QQ2QJL ae ow YL and of € Experiment No. - 2 2(a) Aim: To verify the Superposition Theorem. Learning objectives: St ao : Stdy of the circuit with multiple sources and the effect of individual source on the circuit element or branch, Apparatus Required: 1, Trainers kit 2. Variable D.C supply (0-15V) - 2 Nos. 3. Ammeter,0-SOmA/Multimeter 4, Patch Conds. Theory: Superposition Theorem may be stated as follows: - In a linear network having number of voltage or current sources and resistances, the current through any branch of the network is the algebraic sum of the currents due to each of the sources when acting independently. It means if a network has more than one source, then the current which flows through any element or branch is the sum of all the currents which flow at that point if each source is considered separately and all the other sources are deactivated. To deactivate voltage source, it is replaced by short circuit and current source is replaced by open circuit or by their internal resistance if given/known, Circuit Diagram: Ce AN AWN +l l. wy Sr % -9 fe 8 Figure-1 CASE <1: Circuit diagram for determining current in branch AB due to Vi 15 ‘Basic Electrical Engineering Laboratory ManualFigure -2 ining current in branch AB due to V; ‘reuit di termining current in branct , CASE - II: Circuit diagram for det ek Ro 0-40 VD.C Wyn 0) ‘Supply Figure - 3 (CASE Ill: Circuit diagram for determining current in branch AB due to V, and V, 2 A Ba 0-40 VD.C Supply 0-40VD.c Supply Figure -4 Procedure: 1. Make connections as shown in the figure (2) to measure the current (through branch AB due to first source(V;) while the second source is replaced by short cireuit. 2. Now make connections as shown in figure (3) to measure the current (") branch AB due to second circuit. through source (V2)while the first source is replaced by short 3. The net current (J)flowing in the branch AB is obtained by adding (1') & (1°) with correct polarity. For verifying the superposition theorem, the current (J) through branch AB is directly determined as shown in figure (4). Observation Table — 1 ‘Basic Electrical Engineering Laboratory Manual 16 = Observation Direct meas Since th column theorem Result: The Su Yand | Diseu: % 2 Bas‘Measurement of current in branch AB using Superposition Theorem Current in Branch AB Current in Bi SN av due | i ranch AB due | Net Current in Branch AB , A Va ¥, (volts) 5 = S, D : | = Va (volts) r ne =. 1=14+P (mA) 2 3 EI Observation Table— IL Direct measurement of current in branch AB Current in branch AB due to V; and V; acting together SN. F G H V, (volts) Vz (volts) Ta) 2 : i Since the value of current obtained in column “E” of observation table 1 and in the column “H” of observation table II are same hence it can be said that superposition theorem is verified. Result: The Superposition Theorem has bee Vand V,are compiled in Observation table 1&1 Faculty Signature a verified and the reading for different values of Discussion: 1. Physical significance of Superposition Theorem. verified for Power response. 2, Explain why Superposition Theorem 8 nol Basic Electrical Engineering Laboratory Manual 27Ovsenvestion Table - i Meosuvement a cosvens | drench BB vstRd S2FerPOsL,, Vs Cvoles) | 2'Cm A) llc 6 | O.8y Obsewvestion deble - i) VQ Smee the value d Covremd oldeaned om colon € A obseryodionm debe ds and ty the clown ny 4 gf ebseweston teble Tr ont game vent 1$ con be Sad that Superposition deve |S2(b) Aim : To verify (a) To verify Thevenin’s Theorem. Learning Objective: 1. To verify the Thevenin’s 2. To determine Rn, Vern and I, Apparatus required : 1. DC Power Supply (0-20V) 4, Digital Multimeter ‘Theorem experimentally and theoretically. for a given Network. Ry 2, Voltmeter (0-15V) 3. Ammeter (0-25mA) ger removing R, 5, Trainers Kit 6. Patch Chords. Res. Thus potential are also same, S ay equal to voltage ‘Thevenin’s theorem states that complex network can be replaced by a Series _‘Thevenin’s volta Circuit consisting of an ideal voltage source and a resistance. Consider a box we see that RiR containing a circuit connected to its terminal A and B as shown. According to the given by Thevenin’s theorem, the entire circuit connected to A and B can be replaced by a single voltage source Vin in series with a single resistance Rr across the same terminal as shown. The term Vzy is called the Thevenin’s theorem voltage and is the Voltage drop ac open circuit voltage existing between the terminals A and B. Similarly the term Rru is called Thevenin’s resistance, it is the resistance of the circuit as seen back from the terminals A and B with all the sources removed by their intemal resistance if any. v A complex |? Equation (1) 8 Network g voltage of circ Complex Cireuit Steps for de To determine Steps for determining Vu: by determini aa shown in figt Consider the electrical circuit (figure 1) wh ETREeita’s circuit ich is to be replaced by Short Cireut ‘Therefore Basic Elec» ies OX the ya me the eir ing After removin: i fy Thus ee eeeA current through R, and therefore no voltage drop across tre also same, So voltage epee exe sae potentials of points B and D : : yween A and Blopen circuit 5 qual to voltage measured between Cand D ie. sn on he Ts Se ea Thevenin’s voltage Viv a ge is called a5 We see that Ri,R2 and R3 are in series wit current fis th voltage source. Therefore series given by aie T= RRR i) Voltage drop across Ro Ve = Re __¥eR; Vea = @) 2e8) ey, = we Voc = Veu = Var = Fk through cirevit and equation (3) shows Thevenin’s Fuation (1) shows current flowin} voltage of circuit. cuit. The Rx can pe determined Steps for determining Ret B in direction of arrow replace voltage Source ‘uivalent resistance figure (5)- bya short cin petween terminal A & ‘To determine Rr py determining © shown in figure (4) an By Rok short pega Circuit ao Figure 4 Therefore equivalent resistance Rey = Rat (el (Ri + Rs)}RAR. a Ry = Bat Ry +Rot Rs (4) ‘Theyenin’s Equivalent Cre 7 tire circuit across terminal Ts PeTevennsegialent sist shown in figure (6) and figure (7).Now through Ri. 1d B is replaced by Thevenin’s equivay, A ane Renin series with voltage sOUtce Vi snect Ry to the circuit and determine curren, Rothe Procedure: 1. Note the values of Ry, Re,Rs,Ry and Ry. 2. To determine Vry disconnect/remove the R, from the terminals A and B. Connect a de supply to the circuit ic. Vi (Keep any value of Vi between 5-15 9 |__| volts) 3. To determine Ry remove the R, from the terminals A and B. Short circuit voltage source by connecting a patch cord across voltage source and connect a cee multimeter between A and B to measure Rry as shown in figure (4) The Thi 4, Connect voltmeter between A and B to measure Vr as shown in figure (3) Ven» Rn >. Calculate the theoretical value of load current (/,) using equation (5) and the Practical value of load current (/,) can be obtained by connecting an ammeter in Series with load as shown in figure (6) 6. Draw the Thevenin’s circuit as shown in the figure (7). 2. 7 Repeat the above step no.3, 4, 5 for different value of voltage V; & Ru Observations: ae a R= Observation Tables; Basic ‘esic Electrical Engineering Laboratory Manual 29() Pheoreticaty Obtained Vatues em Input Voltage "4 i Be | Thevenin’s Resistance | Thevenin's Voltage | Load ‘ current. Ven he ) io (Volts) (mA) (ii) Practically Obtained Values 1 wl in’ | Input Voltage hevenin’s Resistance | Thevenin’s Voltage | _ Lead “S | : current an rH Vow i (volts) | hm) (Volts) (mA) Result; ‘The Thevenin’s ‘Theorem has been verified and the reading for different values of Ryy and |,are compiled in Observation table L&I, Faculty Signature Yon Discussion: 1, Physical significance of Superposition ‘Theorem. 2, Explain why Superposition Theorem is not verified for Power response. ecaeeiarer) + BeESas 94Obsexvedion tebles velves D Theoretically obieaneD f | t hs , | Mee pF ) Practicaily Ovteunes Valves Hg ae he / aeAim : To measure current, power, voltage and power factor of series RLC circu, Learning Objective: / a 1. Lear to predict and to measure impedances of series RLC circuit, 2. To ine the power factor of the circuit and its nature. ‘The power 3, Leam to draw impedance triangle and voltage triangle. Bei 4. Learn to draw phasor diagrams of series RLC circuit. For purely : ‘The pow Apparatus Required : 1. Trainer's kit 2. Voltmeter 3. Ammeter Te 4.Wattmeter 5. Connecting wires. ; | Similarly s re | circuit is Circuit Diagram: " ¢ Hy — Proced 13 2. ¢ =, Obser Lf Yartebte ac, supp = Figure 1 Circuit diagram for measuring the voltages and current across series RLC Form Theory: When a sine wave is applied to a series circuit of linear components (resistors, aes ee inductors), the phase relationships between current and voltage depend Obser ‘on the types of components, @Pr The current and voltage are always in phase across an ideal resistor. The current through a capacitorleads the voltage across the capacitor by 90°. The current through s fan ideal inductor lags the voltage across inductor by 90° 4 1 * ~ 1 | (@) (b) © Figure 2 B We know that the current is the same . Za/RP+H, = XE Engineering Laboratory Manual 22Voltage drop across resistor is given by Ve Voltage drop across inductor is given by V;, Voltage drop across capacitor is given by VeVo = I+ Kc The total current in series RLC circuit is given by I, ‘The power factor of the series RLC circuit is given by cos @ The value of power factor lies between 0 and 1, Va = IR Vat k, tak 2 3 cos® For purely resistive circuit the power factor is 1 oF unity. afl a The power factor of the circuit will be leading or lagging if the value of p.f. lies between 0 and 1.The power factor of the circuit will be leading if X>X, or it can be said if the circuit is capacitive then the power factor will be leading in nature. Similarly the power factor of the circuit will be lagging ifX,>Xcor it can be said if the circuit is inductive then the power factorwill be lagging in nature. Procedure: 1. Make connections as shown in the circuit diagram, 2. Check the connections before switching on the supply. Observations: c= ma C=. uF R= Ohms f= Ha Formulae used: X, = 2nfl Ohm Z= JR FG -XP Observation Table: (i) Practically obtained value of Current, volta} S.No. c= tcaetna tahoratory Manual 23