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Implementation of IEEE 802.15.4 Transceiver on Software Defined Radio

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Conference Paper · November 2012

DOI: 10.1109/TELFOR.2012.6419226

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Implementation of IEEE 802.15.4 transceiver on

software defined radio platform
Uroš Pešović, Dušan Gliech, Peter Planinšič, Zoran Stamenković, Siniša Ranđić

Recent introduction of SDR platforms [2] enabled

Abstract — Measurement of error probability parameters in researchers a fast way of prototyping radio communication
IEEE 802.15.4 transmission requires clear access to all stages equipment. The implementations of IEEE 802.15.4
of commercially available IEEE 802.15.4 transceivers. Since transceivers on SDR platforms were recently presented in
these transceivers are realized as monolithic chips, with
papers [3],[4], [5] and [6].
limited access to certain transceiver stages, we created an
IEEE 802.15.4 transceiver on a Software Defined Radio (SDR)
In this paper we described implementation of IEEE
platform with clear access to all transceiver stages. Using the 802.15.4 transceiver in 2.4 GHz band on a NI USRP-2921
realized transceiver, we were able to create a system for SDR platform which enables the measurement of all error
measurement of error probability parameters in IEEE probability parameters in radio transceiver chip.
802.15.4 transmission.
II. IEEE 802.15.4 WIRELESS TRANSCEIVERS
Keywords — IEEE 802.15.4, Software defined radio, Error IEEE 802.15.4 standard specifies physical and Medium
probability Access Control layers for Low Power Wireless Personal
Area Networks [1]. It is designed for low power, low cost
I. INTRODUCTION
battery operated devices, which are used in home

I nformation-bearing signal, sent through a wireless

channel, is received together with some unwanted signals,
which are referred as noise. Noise can change the
automation, precision agriculture, medicine and military
applications. Its physical layer defines channels in several
frequency bands, where a 2.4 GHz band is most commonly
received signal in such a manner that is decoded with some used. IEEE 802.15.4 standard compliant radio devices are
data errors. Knowledge of error probability of wireless designed as transceivers and they employ transmitter and
transmission is of key importance when deploying networks receiver on the same chip and they share common antenna.
in noisy environment. In order to increase immunity to Typical functional structure of such transceiver is separated
noise, modern radio transceivers employ spreading into transmission and reception part (Fig. 1).
techniques, such as transceivers compliant to IEEE
802.15.4 standard. Use of spreading adds to complexity of
transceivers as well as complexity of determining
mathematical relations for expected bit error rate (BER). In
such case empirical models, based on measured results are
used for modeling bit error rate in the channel. Since IEEE
802.15.4 compliant transceivers are composed from several
stages, besides bit error probability, there are several
probability parameters which could be interesting to
analyze, such as chip, symbol and packet error rate. Packet Fig. 1 Structure of IEEE 802.15.4 transceiver
and bit error rate can be measured on commercially Packet which is ready for transmission is firstly
available IEEE 802.15.4 transceivers, since packets and bits partitioned into groups of four bits, which are referred as
represents inputs and outputs for transceiver. Situation is symbol words. Coexistence of IEEE 802.15.4 networks in a
quite different with chips and symbol error rate since these crowded 2.4 GHz band, which is also used by other types of
parameters are on lower level stages in transceivers which networks (WLAN and Bluetooth), is possible by usage of
are inaccessible for user to monitor them. Direct-sequence spread spectrum (DSSS) signal spreading
technique. Symbol words are spread into one of 16 nearly
orthogonal sequences of 32 chips. Chip sequences are
Uroš M. Pešović and Siniša S. Ranđić are with the Technical Faculty predetermined by standard and carefully chosen in order to
Čačak, University of Kragujevac, Svetog Save 65, 32000 Čačak, Serbia be maximally dissimilar from each other. Chip sequences
(tel: 38132302721; e-mail: pesovic@tfc.kg.ac.rs, rasin@tfc.kg.ac.rs).
Dušan Gliech and Peter Planinšič are with the Faculty of Electrical are divided into two groups of sequences (C0 to C7 and C8 to
Engineering and Computer Science, University of Maribor, Smetanova C15), whose sequences are created by right cyclic shifting of
17, 2000 Maribor, Slovenia (tel: 38622207128, e-mail: their respective previous chip sequences for four chip
dusan.gleich@uni-mb.si, peter.planinsic@uni-mb.si).
Zoran Stamenković is with the IHP, Im Technologiepark 25, 15236
positions (Table 1). Chip’s sequences of the other group are
Frankfurt (Oder), Germany (tel: 493355625726, e-mail: created through inversion of odd-indexed chip values of the
stamenko@ihp-microelectronics.com) respective chip sequence from the opposing group (C0 to C8;
C1 to C9; . . . ; C7 to C15) [7].

‹,((( 376
 TABLE 1: IEEE 802.15.4 SYMBOL TO CHIP MAPPING [7] III. SOFTWARE RADIO PLATFORM
Symbol Chip sequence Symbol Chip sequence
SDR is reconfigurable radio platform which is used for
S0 (0x0) C0 (0x744AC39B) S8 (0x8) C8 (0xDEE06931)
S1 (0x1) C1 (0x44AC39B7) S9 (0x9) C9 (0xEE06931D) rapid prototyping of communication systems. It enables
S2 (0x2) C2 (0x4AC39B74) S10 (0xA) C10 (0xE06931DE) creation of physical layer algorithms with live physical
S3 (0x3) C3 (0xAC39B744) S11 (0xB) C11 (0x06931DEE) signals on PC platform. It can be used for decoding received
S4 (0x4) C4 (0xC39B744A) S12 (0xC) C12 (0x6931DEE0) packets, monitoring spectrum of received signal, measuring
S5 (0x5) C5 (0x39B744AC) S13 (0xD) C13 (0x931DEE06) bit error rate (BER) and etc. It’s usually based on
S6 (0x6) C6 (0x9B744AC3) S14 (0xE) C14 (0x31DEE069) programmable FPGA chip coupled with analog front end
S7 (0x7) C7 (0xB744AC39) S15 (0xF) C15 (0x1DEE0693) which modulates and demodulates radio signals. FPGA
enables reconfigurability as well as high processing power
Chips are modulated with the use of Offset QPSK with since all computations are carried out by hardware.
the Half Sine pulse Shaping (O-QPSK HSS) modulation. Software programmable radio transceiver NI USRP-2921
This modulation uses two orthogonal phases, where even [8], designed for wireless communications in 2.4 GHz ISM
indexed chips are modulated onto in-phase I signal, while band, is designed for prototyping of IEEE 802.11 and IEEE
the odd-indexed chips are modulated onto quadrature phase 802.15.4 transceivers. The NI USRP-2921 is connected to a
Q signal. Both binary phases are shaped by half sine pulses host PC via Gigabit Ethernet Interface using appropriate
and the Q phase is delayed by one chip period after which USRP driver and can be integrated into Matlab and Labview
the resulting signal is modulated on 2.4 GHz carrier (Fig. 2.). applications. A simplified block diagram of NI USRP-2921
The use of the O-QPSK HSS modulation enables is presented in Fig. 3.
continuous phase change, which is the preferable phase
change type in case of energy-efficient nonlinear amplifiers
such as those present in IEEE 802.15.4 transceivers.

Fig. 2. O-QPSK HSS modulation Fig. 3. NI USRP-2921 system block diagram

During reception, wireless signals received by an antenna, USRP radio employs two antennas which can be selected
are amplified and processed by an analog front-end. After using internal radio switch. Received radio signals are
processing, they are brought to O-QPSK HSS demodulator, amplified and then mixed with matching RF signal in order
where information is extracted in a form of digital chips. to extract baseband signal. Baseband signal is composed of
Depending on the quality of the received wireless signal I/Q components, which are filtered and sampled by a two
some of the chips can be decoded incorrectly. When channel, 100 MS/s, 14-bit analog-to-digital converter
received chip sequence is formed, it’s cross-correlated with (ADC). The digitized I/Q data is down converted to user
predefined chip sequences, and symbol of most similar specified sample rate and passed to the host computer over a
sequence is fed to next stage. Symbol words are translated standard Gigabit Ethernet connection. Maximum sampling
to bits, and finally, bits are grouped into packets, which are rate is 25 MS/s in full resolution mode, or 50 MS/s in 8-bit
forwarded to the upper protocol layer. resolution mode.
Receiver in IEEE 802.15.4 transceiver is in most cases During transmission baseband I/Q samples, synthesized
much more complex then transmitter. One of the reasons by the host computer, are fed to a USRP-2921 over Gigabit
which add to receiver complexity is the need for Ethernet. The USRP hardware interpolates the incoming
synchronization which the receiver performs in order to signals to 400 MS/s using a digital up conversion (DUC)
successfully decode received data. Some radio receiver process and then converts the signal to analog with a
configurations, known as non-coherent demodulators, dual-channel, 16-bit digital-to-analog converter (DAC).
demodulate received signals directly form carrier, without The resulting analog signal is then mixed up with carrier and
need for synchronization. Such receiver structures are quite transmitted by transmitting antenna.
simple but their disadvantage is higher error probability The USRP driver software provides functions for the the
introduced by demodulation process itself. Coherent hardware/software configuration with tools for
demodulators are synchronized with received signal using opening/closing sessions and performing read/write
preamble which is transmitted at beginning of IEEE operations on the SDR platform. Using USRP driver,
802.15.4 packet. Preamble represents a fixed pattern of physical signals are transmitted to PC, where they can be
symbol zero which is transmitted eight times. During that analyzed and processed. Because of huge quantity of
period the frequency of local oscillator in receiver is shifted received information only slight data processing can be
using the Costas Loop circuitry in order to perform the performed by PC computer in order to enable real-time
phase locked loop (PLL). Coherent receivers are more operation. NI-USRP also enables that some of user defined
complex than non-coherent, but they do not affect the bit computations can be carried on FPGA inside SDR in order
error probability as non-coherent receivers do. to enable real time operation.
377
 IV. IMPLEMENTATION AND RESULTS
Measurement of error probability in wireless
communications is carried out by comparing data
transmitted by the transmitter with data received by radio
receiver. Since IEEE 802.15.4 uses signal spreading,
several error probability parameters need to be monitored,
such as: chip error rate at modulation level, symbol error
rate at spread spectrum layer, and bit and packet error rate
(Fig. 4).

Fig. 6. Phase transitions at beginning of packet reception

Decoding of received information is carried out using
differential detection. Phase values are sampled within one
symbol period (in this case 10 samples) and phase
difference was determined between phases of adjacent
symbol samples. Positive value of the phase difference
means that I/Q phasor is rotating counter-clockwise, while
negative value means that I/Q phasor is rotating clockwise
on phase transition diagram (Fig. 7).

Fig. 4. Error probability measurement

Experiment was carried in Matlab, with one commercial
MRF24J40 IEEE 802.15.4 transmitter and receiver
implemented on SDR. Matlab application generated packet
with random content which is forwarded to commercial
IEEE 802.15.4 transmitter, which transmits packet to
channel. Transmitted packet is mapped to transmitted chips,
symbols and bytes in order to be compared with received
data. Receiver processes chucks of data received by SDR
platform, presented by I/Q signals in Fig. 5. Reception of a
packet started from about 50th sample of the received data
Fig. 7. Phase transitions diagram [9]
stream.
We can observe from phase transition diagram that
increase or decrease of phase during two symbol periods
will flip the previous state of I or Q chips; otherwise I or Q
chip value will remain the same. Since packet starts with
preamble which contains sequence “zero”, first two values
for I and Q chips are logical ones. Values of other chips are
alternatively determined by phase transitions, starting from
first received symbol, until chip sequence is formed.
Received chip sequence is cross correlated with all 16
predefined chip sequences in order to find the most similar
symbol sequence. If symbol sequence is equal to zero
symbol of preamble sequence, receiver is successfully
synchronized (Fig. 8). If not, it should resample symbols by
Fig. 5. I/Q signals at beginning of packet reception
delay of one sample and repeat whole process again.
Since IEEE 802.15.4 uses phase modulation, from
received I/Q diagram we can monitor phase shift presented
in Fig. 6. We can clearly saw continuous phase transition,
characteristic for O-QPSK HSS modulation, starting form
50th sample at beginning of the packet. Phase
discontinuations represents phase transition from – π to π
and vice versa. Before 50th sample, only noise was present
in the channel, where phase therefore changes randomly.

Fig. 8. Successful detection of preamble symbol

378
 Receiver has eight preamble symbols for synchronization Remote Control, form University of Maribor, Slovenia and
to incoming radio signal. After the receiver has successfully funded by grant TR32043 for the period 2011-2014, by the
synchronized to incoming radio transmission, beginning of Ministry of Education and Science of the Republic of
packet is signalized with start of frame delimiter sequence Serbia.
which lasts one byte. After that, receiver receives one byte
long information, about length of the packet, which is REFERENCES
followed by packet data. Received data is mapped to chips,
[1] IEEE P802.15Working Group (2003). Part 15.4: Wireless Medium
symbols and bytes in order to be compared with transmitted Access Control (MAC) and Physical Layer (PHY) Specifications for
data to determine error probability parameters in IEEE Low-Rate Wireless Personal Area Networks (LR-WPANs). IEEE
802.15.4. wireless transmission. Computer Society. New York, USA.
[2] Cognitive radio: brain-empowered wireless communications
Haykin, S. IEEE Journal on Selected Areas in Communications
V. CONCLUSION Volume: 23, Issue: 2 Publication Year: 2005, Page(s): 201 – 220
[3] An FPGA-Based Software Defined Radio Platform for the 2.4GHz
This paper represents the implementation of IEEE 802.15.4
ISM Band Di Stefano, A.; Fiscelli, G.; Giaconia, C.G. Ph. D.
transceiver in 2.4 GHz band on SDR platform which Research in Microelectronics and Electronics, Otranto (Lecce), Italy
enabled measurement of all error probability parameters in Publication Year: 2006, Page(s): 73 – 76
radio transceiver chip. This implementation enables simple [4] Stefan Knauth, Implementation of an IEEE 802.15.4 Transceiver
demodulation which is carried out on PC, but because of with a Software-defined Radio setup, Lucerne University of Applied
Sciences, 2008
huge amount of data and decoding on PC, real time [5] Leslie Choong, Multi-Channel IEEE 802.15.4 Packet Capture Using
operation cannot be achieved. Such lack did not affected Software Defined Radio, UCLA Networked & Embedded Sensing
measurement of the error probability parameters, because Lab, 2009
transmitter sent new packet after receiver finished with [6] A Software-Defined Radio Tool for Experimenting with RSS
Measurements in IEEE 802.15.4: Implementation and Applications
processing of previously received packet. Real time Coluccia, A.; Ricciato, F. 21st International Conference on
operation on SDR can be achieved by migrating software Computer Communications and Networks, Munich, Germany
implemented algorithms, directly onto FPGA chip of the Publication Year: 2012, Page(s): 1 - 6
SDR platform, where it could be processed much faster, [7] Wu K.n, Tan H., Ngan H.L., Ni L. M. (2010). Chip Error Pattern
Analysis in IEEE 802.15.4, IEEE INFOCOM 2010, San Diego, USA.
reducing processing delay to acceptable level. 14-19 March 2010
[8] NI USRP-2920, NI USRP-2921, Universal Software Radio
ACKNOWLEDGMENT Peripherals, National Instruments
The work presented in this paper achieved thanks to [9] Notor J., Caviglia A., Levy G. (2003). CMOS RFIC architectures for
IEEE 802.15.4 networks. Cadence Design Systems. Columbia, USA.
technical support from Laboratory of Signal Processing and

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