FACULTY OF ENGINEERING, BUILT ENVIRONMENT AND

INFORMATION TECHNOLOGY
ELECTRICAL, ELECTRONIC AND COMPUTER
DEPARTMENT: ENGINEERING

PROGRAMME: Diploma in Engineering Technology: Electrical

Engineering

MODULE NAME: DIGITAL SYSTEMS II

MODULE CODE: EDS125A

NQF LEVEL: 6
CREDITS: 14

DATE REVISED: 01 September 2022

CONTENTS
LEARNER GUIDE
Contents

1. DIGITAL SYSTEMS II MODULE OVERVIEW 4

1.1 Module Purpose Statement 4
1.2 Module Syllabus Overview 4
1.3 Learning Material 5
1.4 Knowledge Areas covered in this Module 5
1.5 Graduate Attributes (GAs) assessed in this module 6
1.6 Information about the lecturer 7

2. MODULE LEARNING OUTCOMES 8

2.1 Calculation of Module Credits and Notional Hours 8
2.2 Module units and notional hours 9
2.3 Semester Programme for the Module 9
2.4 Constructive Alignment of Module Outcomes 11
2.4.1 Unit 1: Introduction to Programmable Logic Devices (PLD’s) 11
2.4.2 Unit 2: Display devices 12
2.4.3 Unit 3: Flip flops and related devices 13
2.4.4 Unit 4: Counters 14
2.4.5 Unit 5: Shift registers 15
2.4.6 Laboratory 2 (P1) 16
2.4.7 Laboratory 3 (P2) Error! Bookmark not defined.
2.4.8 Laboratory 4 (P3) Error! Bookmark not defined.
2.4.9 Laboratory 5 (P4) Error! Bookmark not defined.
2.5 Assessment Calculations 19
2.6 Graduate Attributes Assessed in this Module at AEA for ECSA accreditation 20
2.7 CUT Graduate Attributes and Action Verbs Used in Assessments 20
2.8 Aligning CUT Graduate Attributes to ECSA Graduate Attributes 20
2.9 Revised Bloom’s Taxonomy used in the formulation of questions 21

3. LEARNING COMPONENT 22
3.1 Class attendance 22
3.2 Submitting assignments 22
3.2.1 All students 22
3.2.2 Assignment Attachment Sheet 22
3.2.3 Late submittal penalties 22
3.2.4 Extensions 22
3.2.5 Plagiarism 22
3.3 Absenteeism when evaluations are done 22
3.4 Guidelines for improving performance in the module 23

4. PRACTICAL/TUTORIAL COMPONENT 24
4.1 Practical components list 26
Laboratory Practical 27

5. SAFETY COMPONENT 28
5.1 General Safety 28
2
 5.1.1 What to do 28
5.1.2 What not to do 28
5.1.3 Further points to consider 28
5.2 Hand and Power Tools 28
5.2.1 Protective Clothing 29

3
1. DIGITAL SYSTEMS II MODULE OVERVIEW
1.1 Module Purpose Statement

The purpose of this learning module, Digital Systems II, in the programme Diploma in
Engineering Technology: Electrical Engineering is to help the learners to develop
knowledge and understanding of digital system principles and be able to apply digital
electronics principles. It develops hands-on laboratory equipment, ISPLever design and
simulation skills for solving well-defined problems within the field of digital systems.
Learners have the ability to apply basic leadership and project management methods to
the cooperative-based mini projects and develop knowledge and understanding of the
impact of cooperative-based mini project on the society and physical environment.

1.2 Module Syllabus Overview

Unit 1 Introduction to Programmable Logic Devices (PLD’s)

• Explain the structure of PROM, FPLA, PAL and GAL devices.
• Use the devices in to implement Boolean functions.
• Define OLMC and explain its purpose.
• The GAL16V8
• Discuss the OLMC simple mode in the GAL16V8 and use the device to implement
Boolean functions.
• SPLD programming.
Unit 2 Display devices
• Define the term display.
• Draw a block diagram of a basic display system and explain its operation.
• Use an LED as a discrete display in a digital circuit.
• Discuss 7-segment, 16-segment and 5 x 7 dot matrix LED display formats.
• Explain the operation of a liquid crystal display (LCD).
• Design a decoder for a 7-segment display.
• Apply common anode and common cathode decoder/driver ICs in single-digit and multi-
digit 7-segment LED displays.
• Name practical applications of LED and LC displays.
Unit 3 Flip flops and related devices
• SR Latches
• D latches
• Edge triggered SR,D and JK flip flops (positive and negative)
• Explain operation of edge triggered flip flops (positive and negative)
• Describe asynchronous and synchronous inputs of flip flops
• 555 timers operation and applications
• Operation of non-retriggerable and retriggerable one-shots.
• Flip-flop characteristics and applications
Unit 4 Counters
• Asynchronous counters
1. Design of asynchronous counters using JK and D flip-flops
2. Operation of asynchronous counters using timing diagrams
3. Asynchronous counter design using external gating
4. Higher modulus asynchronous counter
• Synchronous counters
1. Design of synchronous counters using JK and D flip flops
2. Operation of asynchronous counters using timing diagrams
3. Synchronous counter design using external gating
4. Higher modulus asynchronous counter
4
 Unit 5 Shift registers
1. Construct and explain the operation of serial-in/serial-out, serial-in/parallel-out, parallel-
in/serial-out, and parallel-in/parallel-out shift registers with D and JK edge-triggered flip-
flops.
2. Draw the logic symbol of a bi-directional, universal shift registers and explain the
operation of each.
3. Construct Johnson and ring shift- register-counters using flip-flops and ICs, and explain
their operation using timing diagrams.
4.Applications

1.3 Learning Material

Prescribed Textbook: FLOYD, T.L., (2015). Digital Fundamentals, Pearson

Education Limited, 11th edition, United Kingdom

Highly recommended reading:

1.4 Knowledge Areas covered in this Module

ECSA Credits in Knowledge Area

Code Module Name NQF Module MS NS ES ES & C CS

Level Credits S &
IT
EDS125A Digital Systems II 6 14 12 2

MS: Mathematical Sciences

NS: Natural Sciences
ES: Engineering Sciences
ES & S: Engineering Design & Synthesis
C & IT: Computing & Information Technology
CS: Complementary Studies

5
1.5 Graduate Attributes (GAs) assessed in this module

IA assessed GAsNot
Assessed
Code Module Name NQF 1 2 3 4 5 9 6 7 8 10
Level
EDS125A Digital Systems II 6 x x x x x x x x x x

AA: Advanced level assessment. At this level, a GA is acquired to the extent that it allows
for new applications in, and generalizations to, unforeseen contexts.
GAs: ECSA Graduate Attributes
AEA: Advanced exit level assessment for ECSA accreditation

Test 1: Formative Assessment on Unit 1 Structure

Total marks: 33
Duration: 1 hour
Notional hours: Duration x ME = 1 x 3 = 3
Justification: ME specifies minimum student’s self-study hours for each assessment hour

Learning Outcome (LO) KA GA %

LO1: Introduction to Programmable Logic Devices (PLD’s) ES GA3 14.1%
LO2: Display devices. ES GA1,2,3 11.6%
LO3: Flip flops and related devices ES GA1,2,3 25.2%
LO4: Counters DS GA1,2,3 28.6%
LO5: Shift registers ES GA1,3 20.5%
Total 100%

KA: Knowledge Area

GA: Graduate Attribute partially assessed
CI: Competence Indicator assessed
ES: Engineering Sciences KA
DS: Design and Synthesis KA
GA6: Communicate effectively, both orally and in writing within an engineering context.
GA2: Apply knowledge of mathematics, natural science and engineering sciences to
applied engineering procedures, processes, systems and methodologies to solve
well-defined engineering problems.
GA3: Perform procedural design of components, systems, works, products or
processes to meet requirements, normally within applicable standards, codes of
practice and legislation.
GA4: Investigations, experiments and data analysis
GA5: Engineering methods, skills, tools, including Information technology

6
1.6 Information about the lecturer

Name: T Bihi

Office: BHP101
Telephone: 0515073078
E-mail: tgbihi@cut.ac.za

Postal address: Central University of Technology, Free State

Private Bag X20539, Bloemfontein, 9300, South Africa
Consulting Hours: By appointment (see office door/ eThuto)

7
2. MODULE LEARNING OUTCOMES

This module will be presented according to the outcomes-based education philosophy.

The lecturer will use a variety of instructional techniques and methods in striving towards
achieving the critical cross-field outcomes as well as the general aims of the module and
the specific outcomes.

2.1 Calculation of Module Credits and Notional Hours

The minimum notional hours required by a student for successful completion of this
module, as well as the credits allocated to the module, are calculated from the formula
supplied by HESQSF (Refer to ECSA document E-01-P):

𝑁𝑁𝑁𝑁𝑁𝑁𝑁𝑁𝑁𝑁𝑁𝑁𝑁𝑁𝑁𝑁 𝐻𝐻𝐻𝐻𝐻𝐻𝐻𝐻𝐻𝐻 = 𝑇𝑇𝐿𝐿 𝐿𝐿𝑀𝑀𝐿𝐿 + 𝑇𝑇𝑇𝑇 𝑇𝑇𝑀𝑀𝑇𝑇 + 𝑇𝑇𝑃𝑃 𝑃𝑃𝑀𝑀𝑃𝑃 + 𝑇𝑇𝑋𝑋 𝑋𝑋𝑀𝑀𝑋𝑋 + 𝑇𝑇𝐴𝐴 𝐴𝐴𝑀𝑀𝐴𝐴 + 𝐸𝐸𝑀𝑀𝐸𝐸
Credits = Notional Hours / 10

Where L is the number of lecturing sessions, T is the number of tutorial sessions, P the
number of laboratory sessions, X is the number of other sessions, and A is the number of
non-contact assignment sessions, E the total number of hours for assessments, per
semester. Then TL, TT, TP, Tx and TA represent the duration of a non-contact time (CUT
period=40min=0.67h); while ML, MT, MP, MX, MA and ME are the contact time multipliers
representing the minimum student’s self-study hours for each contact hour and non-
contact hour for assignments. All these acronyms are defined in ECSA document E-
01-P- Background to Accreditation of Engineering Programmes, Revision no. 3, Effective
Date: 17/05/2018.

Notes:
1 Credit = 10 notional hours
ML specifies minimum student’s self-study hours for each contact hour for lectures
MT specifies minimum student’s self-study hours for each contact hour for tutorials
MP specifies minimum student’s self-study hours for each contact hour for laboratory
work
MX specifies minimum student’s self-study hours for each contact hour for others
MA specifies minimum student’s self-study hours for each non-contact hour for
assignments
ME specifies minimum student’s self-study hours for each contact hour for assessments

The table below shows the calculated credits for Digital Systems II.

Module Time units and total contact Assessment Credits

TL TT TP TX TA E (h)
0.67h 0.67h 0.67h 0.67h 1h
Code Name Lec Tut Lab Other Assign
(L) (T) (P) (X) (A)
EDS125B/A Digital L=48,ML=2 T=12,MT=2 P=24,MP=3 X=0 A=0 E=6,ME=3 14
Systems
II

Substituting values for TL, TT, TP, L, T, P, E, ML, MT, MP, and ME in the formula gives
Notional hours = 146.64
Credits = 14.67

8
2.2 Module units and notional hours and Semester Programme for the Module

Week Syllabus covered time per L T P X A E Ml Mt Mp Mx Me C sub

period total
(Tl,Tt,Tp,Tx)
1: unit 1
Introduction to 0.67
Programmable
Logic Devices 4 3.5
(PLD’s)
FLOYD, chapter 7;
Notes 0.938
Tutorial 1 (Logic 0.67
gates and Trainer
kits) 3 2.5
0.5025
2: unit1
Introduction to 0.67
Programmable
Logic Devices 4 3.5
(PLD’s)
FLOYD, chapter 7;
Notes 0.938
Tutorial 2 (ISP 0.67
Lever)
3 2.5
0.5025
3: unit 2

Display devices 0.67

FLOYD, chapter 7, p
387 - 409; Notes 4 3.5

0.938
Practical 1 0.67

3 3.5
0.7035
4: unit 2 0
test 1 0.67 1 4 0.4

0
5: unit 3
Flip flops and 0.67 4 3.5 0.938
related devices
FLOYD, chapter 7, p
414 - 423; Notes
practical test 0.67 1 0.4
(online)

6: unit 3
Flip flops and 0.67 4 3.5 0.938
related devices
FLOYD, chapter 9, p
497 - 506; Notes
FLOYD, chapter 9, p
507 - 538; Notes
Practical 2 0.67 3 3.5 0.7035

9
Week Syllabus covered time per L T P X A E Ml Mt Mp Mx Me C sub
period total
(Tl,Tt,Tp,Tx)
7 main test 2 4 0.8
8 unit 4

Counters 0.67 4 3.5 0.938

assignment (555) 0.67 7 0.7

FLOYD, chapter 6, p
338 - 341; Notes
9 unit 4

Counters 0.67

4 3.5

0.938
Practical 3 0.67

3 3.5
0.7035
10 unit 5

Shift Registers 0.67

4 3.5

0.938
tutorial 3 0.67

FLOYD, chapter 8, p 3 2.5

450 - 477; Notes 0.5025
11 Exam 0.67 3 4 1.2

14.622

10
2.3 Constructive Alignment of Module Outcomes

2.3.1 Unit 1: Introduction to Programmable Logic Devices (PLD’s)

Specific learning Teaching and Assessment Assessment GA Competence indicator

Outcome learning activity method and criteria assessed
instrument
Describe the Informal Test 1 and Demonstrate a Partially Student identified
need and main cooperative Summative clear GA3 relevant information,
purpose for learning. Assessment. understanding of skills and knowledge
Programmable Question PLDs and the on PLDs and used
Logic Devices Students solve paper and implementation them in the problem
(PLD’s) basic PLD circuits’ memorandum. of PLDs. solution.
Explain the problems
structure of individually or in a Student
PROM, PLA, group in class. communicated design
PAL and GAL logic and relevant
devices. Students work in information in an
teams/individual to answer book.
Use the devices design basic PLD
in to implement circuit and may
Boolean simulate its
functions. performance using
an engineering
Define OLMC tool.
and explain its
purpose.

The GAL16V8

Discuss the
OLMC simple
mode in the
GAL16V8 and
use the device to
implement
Boolean
functions.

SPLD
programming.

GA3: Engineering Design

11
2.3.2 Unit 2: Display devices

Specific learning Teaching and Assessment Assessment GA Competency

outcome learning method and criteria assessed indicator
activity instrument
Define the term display Informal Test 2 and Demonstrate Partially Student
and draw a block diagram cooperative Summative a clear GA2 identified
of a basic display system learning. Assessment. understanding relevant
and explain its operation. of display information,
Students solve Question devices. skills and
Use an LED as a discrete basic display paper and knowledge on
display in a digital circuit. circuits’ memorandum display devices
problems Test 2 and and used them
Discuss 7-segment, 16- individually or in Summative in the problem
segment and 5 x 7 dot a group in Assessment. solution.
matrix LED display class.
formats. Question Student
Students work paper and communicated
Explain the operation of a in memorandum. design logic and
liquid crystal display teams/individual Test 2 and relevant
(LCD). to design basic Summative information in an
display circuit. Assessment. answer book.
Design a decoder for a 7- Question
segment display. paper and
memorandum.
Apply common anode and
common cathode
decoder/driver ICs in
single-digit and multi-digit
7-segment LED displays.

Name practical
applications of LED and
LC displays.

GA2: Application of scientific and engineering knowledge

12
2.3.3 Unit 3: Flip flops and related devices

Specific Learning Teaching and Assessment Assessment GA Competency

outcome learning method and criteria assessed indicator
activity instrument
Understand the basic Informal Test 2 and Demonstrate a Partially Student
operation and building cooperative Summative clear GA1, identified
blocks of SR and D learning. Assessment. understanding Partially relevant
latches. Question of latches, flip- GA2, information,
Students solve paper and flops and Partially skills and
Edge triggered SR, D and basic latches, memorandum. oneshot GA3 knowledge on
JK flip-flops (positive and flip-flops and circuits. latches, flip-
negative) oneshot circuits’ flops and
problems oneshots and
Explain operation of edge individually or in used them in
triggered flip flops a group in the problem
(positive and negative) class. solution.

Describe asynchronous Students work Student

and synchronous inputs of in communicated
flip flops teams/individual design logic and
to design basic relevant
555 timers operation and latches, flip- information in
applications flops and an answer book.
oneshot
Operation of circuits.
nonretriggerable and
retriggerable one-shots.

Flip-flop characteristics
and applications

GA1: Problem Solving GA2: Application of scientific and engineering knowledge

GA3: Engineering Design

13
2.3.4 Unit 4: Counters

Specific Teaching and Assessment Assessment GA Competency

learning learning activity method and criteria assessed indicator
outcome instrument
Design Informal Summative Demonstrate a Partially Student identified
asynchronous cooperative Assessment. clear GA1, relevant information,
counters using learning. Question understanding of Partially skills and knowledge
JK and D flip paper and the design of GA2, on counters and
flops, explain Students solve memorandum. both Partially used them in the
the operation basic counter asynchronous GA3 problem solution.
using timing circuits’ problems as well as
diagrams and individually or in a synchronous Student
discuss the group in class. counters, using communicated
need and JK and D flip- design logic and
methods for Students work in flops. relevant information
higher modulus teams/individual to in an answer book.
asynchronous design basic •Using shift
counter counter circuit and registers
may simulate its
performance using
an engineering
tool.
Design
synchronous
counters using
JK and D flip-
flops, explain
the operation
using timing
diagrams and
discuss the
need and
methods for
higher modulus
synchronous
counter

GA1: Problem Solving GA2: Application of scientific and engineering knowledge

GA3: Engineering Design

14
2.3.5 Unit 5: Shift registers

Specific Teaching and Assessment Assessment GA Competency indicator

learning learning activity method and criteria assessed
outcome instrument
Construct and Informal Summative Demonstrate a Partially Student identified
explain the cooperative Assessment. clear GA1, relevant information,
operation of learning. Question understanding Partially skills and knowledge on
different shift paper and the different GA3 shift registers and used
registers with Students solve memorandum. types of shift them in the problem
D and JK basic shift register registers. solution.
edge-triggered circuits’ problems
flip-flops. individually or in a Demonstrate a Student communicated
group in class. clear design logic and
Draw the logic understanding relevant information in
symbol of a bi- Students work in of the design an answer book.
directional, teams/individual to of shift
universal shift design basic shift registers using
registers and register circuit and JK and D flip-
explain the may simulate its flops.
operation of performance using
each. an engineering tool.

Construct
Johnson and
ring shift-
register-
counters using
flip-flops and
ICs, and
explain their
operation
using timing
diagrams.
Applications

GA1: Problem Solving

GA3: Engineering Design

15
2.3.6 Tutorial 1

Specific Teaching and Assessment Assessment GA Competency indicator

learning method and criteria assessed
outcome learning activity instrument
After the Student uses Laboratory. Student Partially Student correctly used
completion of breadboards, Laboratory demonstrated GA4 and modern equipment.
this practical power supplies and sheet with the ability to GA5
the student other laboratory rubrics use laboratory
should be able equipment to build equipment to
to understand basic latches and build a circuit
the basic asynchronous on breadboard
operation of circuits. and verify it’s
monostable operation
and astable
circuits.

GA4: Investigations, experiments and data analysis

GA5: Engineering methods, skills, tools, including Information technology

2.3.7 Tutorial 2

Specific Teaching and Assessment Assessment GA Competency indicator

learning method and criteria assessed
outcome learning activity instrument
After the Student uses Laboratory. Student Partially Student correctly used
completion of breadboards, Laboratory demonstrated GA4 and modern equipment.
this practical power supplies and sheet with the ability to GA5
the student other laboratory rubrics use laboratory
should be able equipment to build equipment to
to understand basic latches and build a circuit
the basic asynchronous on breadboard
operation of circuits. and verify it’s
shift registers. operation
Construct and
investigate the
performance of
shift registers
using the
74LS194 bi-
directional
universal shift
register.

GA4: Investigations, experiments and data analysis

GA5: Engineering methods, skills, tools, including Information technology

16
2.3.8 Practical 1

Specific Teaching and Assessment Assessment GA Competency indicator

learning method and criteria assessed
outcome learning activity instrument
Introduction to Student uses Laboratory. Student Partially Student correctly used
PLDs: After the ISPLever design Laboratory demonstrated GA4 and modern equipment and
completion of and simulation tool, sheet with the ability to GA5 simulation tools.
this practical equipment and rubrics use ISPLever Student used relevant
the student computers in the software, build computer applications
should be able laboratory to a circuit on and laboratory
to understand design, simulate breadboard equipment.
the basic and program PLDs. and verify it’s
operation of operation.
ISPLever and
GAL circuit
design.
Construct and
investigate the
operation of
the Boolean
expression
given below.

GA4: Investigations, experiments and data analysis

GA5: Engineering methods, skills, tools, including Information technology

2.3.9 Practical 2

Specific Teaching and Assessment Assessment GA Competency indicator

learning method and criteria assessed
outcome learning activity instrument
After the Student uses Laboratory. Student Partially Student correctly used
completion of breadboards, Laboratory demonstrated GA4 and modern equipment.
this practical power supplies and sheet with the ability to GA5
the student other laboratory rubrics use laboratory
should be able equipment to build equipment to
to understand basic latches and build a circuit
the basic asynchronous on breadboard
operation of circuits. and verify it’s
latches/flip- operation.
flops and
simple
asynchronous
counter
circuits.

GA4: Investigations, experiments and data analysis

GA5: Engineering methods, skills, tools, including Information technology

17
2.3.10 Assignment 1

Specific Teaching and Assessment Assessment GA Competency

learning method and criteria assessed indicator
outcome learning activity instrument
After the Student uses Assessment Student Partially Student correctly
completion breadboards, report with demonstrated GA4 used designed
of this power supplies rubrics the ability to and the relevant
practical the and other design with GA5 circuitry.
student laboratory an
should be equipment to assessment
able to build basic report
understand latches and
the basic asynchronous
operation of circuits.
monostable
and astable
circuits.

GA4: Investigations, experiments and data analysis

GA5: Engineering methods, skills, tools, including Information technology

2.3.11 Tutorial 3

Specific Teaching and Assessment Assessment GA assessed Competency

learning method and criteria indicator
outcome learning activity instrument
After the Demonstration Not Student Introduction Student feedback
completion to Student uses assessed observed to GA4 and
of this of breadboards, and GA5
practical the power supplies practised
student and other the
should be laboratory operation
able to equipment to of shift
understand build basic registers
the basic latches and
operation of asynchronous
shift circuits.
registers.
Construct
and
investigate
the
performance
of shift
registers
using the
74LS194 bi-
directional
universal
shift
register.

GA4: Investigations, experiments and data analysis

GA5: Engineering methods, skills, tools, including Information technology
18
2.4 Assessment Calculations
The assessment components of the module with their respective weights:

Course mark components (CM): weight: 50% of Final Mark (FM)

Formative assessment: Test 1 (T1): 1 hour, weight: 25% of CM
GAs 1, 2, 3 and 6 assessed at developmental level.
Formative assessment: Test 2 (T2): 2 hours, weight: 40% of CM
GAs 1, 2, 3 and 6 assessed at developmental level.
Practical assessments (PA): weight: 35% of CM
Laboratory 2, 3, 4, 5 (L2, L3, L4, L5): 2 hours, weight: 65% of PA, GAs 4 and 5 assessed
at developmental level.
Practical Test: 2 hours, weight: 355% of PA.
GAs 1, 2, 3, 6 and 9 assessed partially at developmental level.

PA = 0.65(0.25P2 + 0.25P3 + 0.25P4 + 0.25P5) + 0.35Practical Test

End of semester written summative assessment (EM): Duration: 3 hours, weight: 50%
of FM. GAs 1, 2, 3 and 6 assessed partially at developmental level.

FM = 0.5×CM+0.5×EM
To pass the module, your final mark must be at least 50%.

Examination Admission
An admission mark of 40% for the course mark, as well as 50% for laboratory assessment
is required for admission to the main assessment.

19
2.5 Graduate Attributes Assessed in this Module at AEA for ECSA accreditation

N/A

2.6 CUT Graduate Attributes and Action Verbs Used in Assessments

CUT Graduate Practical Definitions

Attributes
Sustainable Ensuring a sustainable curriculum
development Incorporating aspects of sustainability in the content.
Innovation and problem Promoting the iUSE model (investigate, understand,
solving solutions and evaluate).
Entrepreneurship Featuring aspects relating to entrepreneurship.
Community engagement Encouraging students to benefit their communities.
Technologically literate Efficiently using computer hardware and software.
Numerate Performing correct calculations and equation
manipulations.
Teamwork Nurturing group work of two or more students.
Communication Promoting good written and oral communication.
Citizenship and global Including aspects relating to citizenship, leadership or
leadership management.
Technical and Operating specific equipment or apparatus effectively.
conceptual
competence

2.7 Aligning CUT Graduate Attributes to ECSA Graduate Attributes

CUT Graduate Attribute ECSA Graduate Attribute

Sustainable development Sustainability and Impact of Engineering Activity
Innovation and problem Engineering Design
solving Problem Solving
Investigations, experiments and data analysis
Entrepreneurship Independent Learning Ability
Community engagement Engineering Professionalism
Technologically literate Engineering methods, skills, tools, including Information
technology
Numerate Application of scientific and engineering knowledge
Teamwork Individual, Team and Multidisciplinary working
Communication Professional and Technical Communication
Citizenship and global Engineering Professionalism
leadership Individual, Team and Multidisciplinary working
Technical and conceptual Engineering methods, skills, tools, including information
competence technology
Engineering Design
Problem Solving

20
2.8 Revised Bloom’s Taxonomy used in the formulation of questions

Objective Definition Illustrative verbs Level

Creating Designing Generate; combine; HOq- Highest level

experiments, devices, construct; formulate; dependent on students
process, and products propose; assemble; reasoning ability
design; predict;
improve

Evaluatin Choosing from among Assess; justify; HOq

g alternatives and conclude; evaluate;
justifying the choice, verify; confirm;
optimizing processes, choose; determine
making judgments
about the
environmental impact
of engineering
decisions, resolving
ethical issues
Analysing Solving well-defined Distinguish; compare; HOq
problems, developing contrast; differentiate;
process models and classify; categorize;
simulations, analyse
troubleshooting
equipment and system
problems

Applying Applying course Change; HOq

material to solve demonstrate; modify;
straightforward solve; use; show;
problems calculate

Understa Paraphrasing text, Explain; convert; LOq

nding explaining concepts in estimate; rearrange;
jargon-free terms summarize; derive;
describe; discuss;
review; relate

Rememb Repeating memorised Name; list; state; LOq - Lowest level

ering information define; describe; dependant on students
label; sketch; identify; memory ability
select; insert;
complete

21
3. LEARNING COMPONENT
3.1 Class attendance

Class attendance is of utmost importance in this programme. Important announcements

are made and instructions are given during class meetings. Thus, it will be very difficult for
a learner to perform well in this subject if he/she does not attend classes regularly.
Furthermore, attendance records are kept and uploaded onto the ITS system of CUT.

3.2 Submitting assignments

3.2.1 All students

Due dates are set for every assignment that forms part of the assessment for this module.
The due date for each assignment will be communicated to ALL students present in class.
These dates represent the last working day on which assignments should reach the
lecturer at Central University of Technology (CUT), Free State.

3.2.2 Assignment Attachment Sheet

Each assignment must be prefaced with a completed title page available with each
assignment guideline given in this guide.

3.2.3 Late submittal penalties

Unless an extension has been sought and granted, late assignments will NOT be marked.
Thus, it is in your interest to aim to complete the assignment at least a week before the
due date.

3.2.4 Extensions
Applications for extension must be done in writing one week before the assignment due
date. The application must be accompanied supporting documentation of illness or other
exceptional circumstances. Granted extensions are only valid once the lecturer confirms
it and the student have received notification thereof.

3.2.5 Plagiarism
The Central University of Technology, Free State regards plagiarism as a very serious
offence and is regarded as grounds for expulsion. Students found plagiarising could face
proceedings under the University's Regulations. Therefore, any assessable material
submitted by the students must be their own work.

Please note: Faxed assignments will not be accepted. Always keep a copy of every
assignment you submit. Assignments do occasionally go astray.

3.3 Absenteeism when evaluations are done

Absenteeism when tests or other evaluations are done is strongly discouraged. Should a
student miss an evaluation, then the student must report to the lecturer, within the
prescribed time limit, and arrange for a supplementary evaluation. Only a medical
certificate or other acceptable written explanation will enable a student to do a
supplementary evaluation.

All tests must be written and assignments must be handed in on time.

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3.4 Guidelines for improving performance in the module

Attend all classes. Prepare for each lecture by using this learning guide. Unless you ask
questions, the lecturer will assume that you understand all the theory and will commence
with applications. If you do not understand, bring it to the lecturer’s attention as soon as
possible by asking specific questions.
During the years, it has been proven that the following guidelines will result in academic
success:
• Read the appropriate section in your learner guide carefully before attending
the lecture.
• You should study the completed section in depth, as soon as possible after the
lecture, but at least before the following lecture.
• You must complete all the relevant homework exercises, assignments or
questions for each lecture topic. Spend more time thinking about the problem
and referring to resources mentioned in the learning units. Try to answer the
question to the best of your ability. If you have made any mistake, small as it
may be, correct it in class and if you are still not sure about the solution, ask the
lecturer for further explanation.
• Concentrate on understanding the logic of the module instead of concentration
entirely on the technique used.
• Work out all class examples, self-study work and laboratory work thoroughly
and completely.
• Test your increasing knowledge daily.

When answering any assessment:

• Read the question carefully; make sure you know what is being asked.
• Then, stop and think.
• Write your answer systematically and as neat as possible.
• Show all your calculations at all times, i.e. how you arrived at the solution.
• Make sure that you manage your time effectively, in other words, do not spend
more time on one question than is available. Work fast and accurately!
• Work through tutorials, previous test and examination papers, in order to get
used to the style and standard of the papers.

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4. PRACTICAL/TUTORIAL COMPONENT
Practical/Tutorial component consists of practical and tutorial sessions (See section 2.3).
Attendance at practical and tutorial sessions is compulsory and this is in line with CUT’s
policy. The practical component consists of a combination of L1, L2, L3, L4 and L5.
Students are advised to spend some time in the laboratories for preparation and
developing skills in the use of equipment and software packages for solving well-defined
problems. The practical assessment weights are given in sections 1.2 and 2.5. Practical
is important since it forms part of the assessment of the module (See section 2.5). Tutorial
component consists of 5 tutorials according to 5 learning units of the module.

The laboratory weights and their due week numbers for the module are given in section
1.15. Each assignment is important since it forms part of the assessment of the module.

Practical Title

Laboratory 1 GAL Introduction

Laboratory 2 Latches and Flip-Flops

Laboratory 3 555 Timer operation as a one shot and astable multivibrator

Laboratory 4 Synchronous counter design

Laboratory 5 Shift registers

Laboratory 6 Practical test

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Learning Area Outcome:
Laboratory 1 (L1)
Introduction to PLDs: After the completion of this practical the student should be
able to understand the basic operation of ISPlever and GAL circuit design.
Construct and investigate the operation of the Boolean expression given below.

Laboratory 2 (L2)
After the completion of this practical the student should be able to understand
the basic operation of latches/flip-flops and simple asynchronous counter
circuits.

Laboratory 3 (L3)
After the completion of this practical the student should be able to understand
the basic operation of monostable and astable circuits

Laboratory 4 (L4)
After the completion of this practical the student should be able to understand
the basic design and operation of synchronous circuits

Laboratory 5 (L5)
After the completion of this practical the student should be able to understand
the basic operation of shift registers. Construct and investigate the performance
of shift registers using the 74LS194 bi-directional universal shift register.

A: Pre-Laboratory Work

A1: Reading list and requirements:

Study guide on ethuto
Lecturers notes on ethuto
Laboratory coat and close shoes
Laboratory notes and preparation report

A2: Guidelines:
Preparation rules

Preparation report
One preparation report per group must be handed to the lecturer when
entering the laboratory.

Preparation report must consist of the following:

• Cover page – Laboratory number, Group number and member’s
names and student numbers
• Page 2 - Aim, List of equipment and method
• Page 3 - Table of results
• Page 4 - Space for practical connections

Preparation test
Each group member must be prepared for his/her individual preparation test.
What to expect in the preparation test:
• Understand the aim of the laboratory practical

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 • Know the equipment to be used in the laboratory practical
• Investigate the use of each equipment
Understand the method of the laboratory practical

A: In-Laboratory Work

A3: Reading list and requirements:

Study guide on ethuto
Notes on ethuto
Laboratory coat and close shoes
Laboratory preparation report and notes

A4: Guidelines:
Explanation of practical by lecturer.
Draw circuit diagram in preparation.
Build the circuit and verify operation.
Before making changes to your circuit ensure the power is switched off.
Operation must be verified and signed by the lecturer before you leave
the laboratory.

4.1 Practical components list

Component Function Quantity

74LS00 2-input NAND 1

74LS02 2-input NOR 1
74LS04 Inverter 1
74LS11 3-input NAND 1
74LS20 4-input NAND 1
74LS32 2-input NOR 1
74LS47 BCD/7-segment decoder 1
74LS74 Positive edge-triggered D flip-flop 1
74LS112 Negative edge-triggered JK flip-flop 1
74LS194 4-bit bi-directional universal shift register 1
555 Timer 1
7-segment Common anode LED Display unit 1
Red LED LED 1
10μF Capacitor 1
47μF Capacitor 1
4.7nF Capacitor 1
10nF Capacitor 1
GAL16V8 Generic Array Logic (GAL) 1
330Ω 0.25W 5% Resistor 7
E12 series 0.25W 5% Resistor 1 of each value

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 RESULT%

Graduate Attributes Assessment:

GA 1 GA2 GA3 GA4 GA5 GA6 GA7 GA8 GA9 GA10

Laboratory Practical

Laboratory name

Assessor name:

Assessment date:

Student initials and surname:

Student number:

DECLARATION OF OWN WORK

I …………………………………………………………………………………………………..
hereby declare that this is my own work and that it has not been copied from any other
person or document.

………………………………………… …………………………..
Signature Date

Pre-Laboratory Work Comments Marks

In-Laboratory Work

Total Marks

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5. SAFETY COMPONENT
5.1 General Safety

Close attention should be given to all aspects of safety throughout training, and the highest
possible standards insisted upon. There is a special need to emphasize the fundamental
safety rules of behaviour, dress and practice when the trainee enters the workshop.
Instructors have a particular responsibility to set a good example and to check without
delay any departure from safe working practices by trainees. Individual responsibilities in
respect of the safety of all persons in the vicinity of the working area must be clearly
understood by everyone. It is essential to develop safe working habits.

5.1.1 What to do
• Think before you act.
• Ask if in any doubt.
• Help to keep gangways clear.
• Keep your bench and working area tidy.
• Find out the position and type of fire appliances available.
• Report all accidents to your supervisor
5.1.2 What not to do
• Do not run.
• Do not play practical jokes.
• Do not touch any equipment or try out machines unless authorized to do so.
• Do not leave rubbish lying about.
• Do not walk under suspended loads.
• Do not attempt to give first aid unless you are competent to do so.
• Do not throw things.

5.1.3 Further points to consider

• Wear your overalls buttoned up.
• Roll up your overall sleeves above the elbows or button up the cuffs.
• Keep hair short or wear a cap.
• Obey all safety rules and signs.
• Report any accident, however slight.
• Have all injuries properly treated, however minor.
• Do not wear torn overalls.
• Do not wear rings or a watch when working.
• Do not take chances.

5.2 Hand and Power Tools

All tools must be used in a safe manner, in particular sharp tools such as knives or
screwdrivers. These should be held in such a way as to minimize the chances of cuts to
the user if they slip from the work. The snipping of wires with side-cutters can lead to bits
of wire entering the eye and therefore goggles should be worn for such work. These tools
must be electrically safe and should be inspected regularly for cable wear and loose
connections. They should never be used without a guard or some form of protection fitted
and adjustments to these tools should only be made once they have been disconnected
from the supply. Soldering irons should always be kept covered to prevent accidents
leading to burning of the skin or of the flex of the soldering iron. The work being soldered
or de-soldered should be securely gripped and the work should take place on a heat-proof
mat. Excess solder should be wiped off using a wet cloth or sponge and should not be
flicked off. Care should also be taken to avoid breathing in the fumes of the flux.

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5.2.1 Protective Clothing

Whether or not this is worn depends on the regulations and on the work taking place in
the workshop. Long hair should be tied back and if hair preparation is used the hair should
also be covered whenever working close to a naked flame.

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