Lecture 3

Noise
George Yuan
Hong Kong University of Science and Technology
Fall 2010

© George Yuan, HKUST 1

 Outline
• Introduction
• Device noise models
• Circuit noise analysis
• Other noise sources
– Power noise
– Substrate noise
• Noise reduction
• Chopping

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 Main circuit problems
Linearity & Noise

THD

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 Characterization

Ps
SNR 
Pn
Ps
SNDR  SINAD 
Pd  Pn
Vout N

P
i2
di
THD 
Ps

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 Noise in frequency domain
SV  f 

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 Noise correlation

Equivalent noise Veq  V1  V2

Noise power Veq2  V1  V2 

2

uncorrelated Veq2  V1  V2   V12  V22  2V1V2  V12  V22

2

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 Power Spectral Density

X t  Y t 
Hf 

SY  f   S X  f  H  f 
2

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 Noise Bandwidth
• Noise power integration bandwidth?

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 Outline
• Introduction
• Device noise models
• Circuit noise analysis
• Other noise sources
– Power noise
– Substrate noise
• Noise reduction
• Chopping

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 Noise of a Resistor

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Integrated Noise of a Resistor (1)

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Integrated Noise of a Resistor (2)

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Integrated Noise of a Resistor (3)

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 1/f Noise of a Resistor

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 Shot Noise of a Diode

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 1/f Noise of a Diode

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 Noise of a MOS

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Equivalent Input Noise of a MOS

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 Noise By Source Resistor R

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 Source Resistance Rs

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Equivalent input noise: 1/f noise

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Noise vs. Current : corner fequency

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 Outline
• Introduction
• Device noise models
• Circuit noise analysis
• Other noise sources
– Power noise
– Substrate noise
• Noise reduction
• Chopping
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 Noise of an amplifier with active
load

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1/f Noise of an amplifier with active
load

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 Noise figure of an amplifier

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 Resistive noise matching

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 Noise of a Cascode Amplifier

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Input referred Noise of a Cascode

 Rs  1 
 g m  g ds     g ds  vout   g m  g ds Rs iS  iN
 R L  L
R 
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 Noise of a Folded Cascode

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Noise of a Cascode with Linear M1

4kT 1 4kTVeff
dv 
2

1VDS2 1
1 2
Ron g m

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 Analysis

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 Noise of Current Mirror

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Noise of Current Mirror with series
R
2
 R1   2
2
diout     diin  diR21   di R2 2 
 R2   
1 1
di 2
 di 2
g m 2 R2 2 m 2
g m1 R2 2 1 m

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Noise Reduction of Current Mirror
with series R

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Noise Reduction of CMOS Current
Mirror with series R

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 Noise of differential pair

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Noise of differential pair with active
load

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 Noise of differential pair with
source resistor

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 Noise of an OPAMP

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 Capacitive Source Amplifier

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Capacitive Noise Matching (1)

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Capacitive Noise Matching (2)

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Capacitive Noise Matching (3)

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 Outline
• Introduction
• Device noise models
• Circuit noise analysis
• Other noise sources
– Power noise
– Substrate noise
• Noise reduction
• Chopping
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 Ground

1inch wire: 20nH/inch, a transient current: SR=10mA/ns

Δi 10mA
Δv = L = 20 nH × = 200 mV
Δt ns

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 Analog and Digital Ground

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 Star Ground

Separate analog, digital

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 Grounding for Mixed-signal IC

• Separate digital output and

data bus by a register
• Limiting current resistor R

• DGND for mixed-signal IC should connect to analog ground plane

• DGND couples to AGND
• VD separate to VA by ferrite bead
• Digital switching current absorbed by the decoupling cap path

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 Grounding Mixed-Signal IC with
Low Internal Digital Current

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 Grounding Mixed-Signal IC with
High Internal Digital Current

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 Mixed-Signal PCB

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 On-chip Power Traces

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 Substrate Noise

1. Rn->sub dominates if two n+ are far away (>100um)

2. Guard ring useless

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 Source, Bulk Connection?

The disconnection of B and S reduces substrate noise injection

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 Pad Frame, Down Bonding

1. Tie the substrate to solid

ground;
2. Down bonding low
impedance;

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 Outline
• Introduction
• Device noise models
• Circuit noise analysis
• Other noise sources
– Power noise
– Substrate noise
• Noise reduction
• Chopping
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 Circuit Noise Minimization
• Increase input gm
• Enlarge other transistors to reduce the
flicker noise and thermal noise
• Input transistor pair dominates the noise

• Reduce the flicker noise of input

transistors

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 Chopping

No noise aliasing

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 Chopping Example

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 Chopping Spikes

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 Chopping Spike Suppression

Spectral filtering Temporal sampling

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 Chopper Stabilized OPAMP1

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Notch Filter for Offset Current

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 Chopper Stabilized OPAMP2

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Current Feedback Instrumentation
Amplifier with Chopping

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 References
1. W. Sansen, Analog Design Essentials, Springer, 2006
2. W. Kester, The Data Conversion Handbook, Analog Devices, 2005
3. C. Enz, E. Vittoz, and F. Krummenacher, “A CMOS chopper amplifier”, IEEE J.
Solid-State Circuits, Vol. SC-22, pp. 335-342, Jun. 1987
4. R. Yazicioglu, P. Merken, R. Puers, and C. Van Hoof, “A 60uW 60nV/Hz0.5 readout
front-end for portable biopotential acquisition systems”, IEEE J. Solid-State
Circuits, Vol. 42, pp. 1100-1110, May 2007
5. R. Burt, and J. Zhang, “A micropower chopper-stablized operational amplifier
using a SC notch filter with synchronous integration inside the continuous-time
signal path”, IEEE J. Solid-State Circuits, Vol. 41, pp. 2729-2736, Dec. 2006
6. J. Witte, J. Huijsing, and K. Makinwa, “A current-feedback instrumentation
amplifier with 5uV offset for bidirectional high-side current-sensing”, IEEE J. Solid-
State Circuits, Vol. 43, pp. 2769-2785, Dec. 2008
7. B. Owens, S. Adluri, P. Birrer, R. Shreeve, S. Arunachalam, K. Mayaram, and T.
Fiez, “Simulation and measurement of supply and substrate noise in mixed-signal
ICs”, IEEE J. Solid-State Circuits, Vol. 40, pp. 382-391, Feb. 2005

© George Yuan, HKUST 67