Adic Lab Manual 1
Adic Lab Manual 1
M SCHOOL OF ENGINEERING
Siruganur,Tiruchirappalli – 621 105.
(ACCREDITED BY NAAC)
LABORATORY MANUAL
BRANCH : BME
REGULATION : R2021
SIGNATURE
M.A.M. SCHOOL OF ENGINEERING
(ACCREDITED BY NAAC)
(Approved by AICTE, New Delhi and Affiliated to Anna University, Chennai)
SIRUGANUR,TRICHY – 621 105 www.mamse.in
VISION
To be a globally recognized leader in advancing healthcare through innovative and impactful biomedical
engineering solutions, driving excellence in research, education, and technology integration.
MISSION
To conduct cutting-edge research in biomedical engineering to pioneer breakthrough technologies and
solutions that address current and future healthcare challenges.
To foster a culture of creativity, collaboration, and interdisciplinary research to expand the frontiers of
knowledge in the field of biomedical engineering.
To provide a world-class education that equips students with the knowledge, skills, and ethical principles
necessary to excel in the dynamic field of biomedical engineering .
M.A.M. SCHOOL OF ENGINEERING
(ACCREDITED BY NAAC)
(Approved by AICTE, New Delhi and Affiliated to Anna University, Chennai)
SIRUGANUR,TRICHY – 621 105 www.mamse.in
PROGRAM OUTCOME
1. Engineering knowledge: Apply the knowledge of mathematics, science, engineering fundamentals, and an engineering
specialization to the solution of complex engineering problems.
2. Problem analysis: Identify, formulate, review research literature, and analyze complex engineering problems reaching substantiated
conclusions using first principles of mathematics, natural sciences, and engineering sciences.
3. Design/development of solutions: Design solutions for complex engineering problems and design system components or processes
that meet the specified needs with appropriate consideration for the public health and safety, and the cultural, societal, and
environmental considerations.
4. Conduct investigations of complex problems: Use research-based knowledge and research methods including design of
experiments, analysis and interpretation of data, and synthesis of the information to provide valid conclusions.
5. Modern tool usage: Create, select, and apply appropriate techniques, resources, and modern engineering and IT tools including
prediction and modeling to complex engineering activities with an understanding of the limitations.
6. The engineer and society: Apply reasoning informed by the contextual knowledge to assess societal, health, safety, legal and
cultural issues and the consequent responsibilities relevant to the professional engineering practice.
7. Environment and sustainability: Understand the impact of the professional engineering solutions in societal and environmental
contexts, and demonstrate the knowledge of, and need for sustainable development.
8. Ethics: Apply ethical principles and commit to professional ethics and responsibilities and norms of the engineering practice.
9. Individual and team work: Function effectively as an individual, and as a member or leader in diverse teams, and in
multidisciplinary settings.
10. Communication: Communicate effectively on complex engineering activities with the engineering community and with society at
large, such as, being able to comprehend and write effective reports and design documentation, make effective presentations, and give
and receive clear instructions.
11. Project management and finance: Demonstrate knowledge and understanding of the engineering and management principles and
apply these to one‘s own work, as a member and leader in a team, to manage projects and in multidisciplinary environments.
12. Life-long learning: Recognize the need for, and have the preparation and ability to engage in independent and life-long learning in
the broadest context of technological change
LIST OF EXPERIMENTS:
TOTAL: 45 PERIODS
COURSE OUTCOMES:
On successful completion of this course, the student will be able to
CO1: Design Combinational Circuits using logic gates
CO2: Design and implement arithmetic circuits for different applications using opamp
CO3: Design Sequential Circuits using logic gates
CO4: Design wave form generators and analyse their characteristics
CO5: Simulate and analyse circuits using ICs
TABLE OF CONTENTS
6 RC and LC oscillators
AIM:
To design, construct and test inverting, non-inverting and Comparator using IC 741.
APPARATUS REQUIRED:
S.No. Name of the Apparatus Range/Value Qty
1. Bread Board - 1
2. RPS (0-30) V 2
3. Dual Power Supply ±15 V 1
4. Resistor 1k Ω,10k Ω 3,2
5. IC 741 Op-Amp - 1
6. Connecting Wires - Few
7. Voltmeter or Multi-meter (0-30) V 1
THEORY:
INVERTING AMPLIFIER:
A typical inverting amplifier with input resistor R 1and a feedback resistor Rf is shown in the figure. Since the
op-amp is assumed to be an ideal one the input bias current is zero and hence the non -inverting input terminal is at
ground potential. The voltage at node „A‟ is Zero, as the non inverting input terminal is grounded. The nodal
equation by KCL at node „A‟ is given by Vi/R1 + Vo/Rf =0 or V0 = -Rf (Vi/R1).
NON- INVERTING AMPLIFIER:
A typical non-inverting amplifier with input resistor R1 and a feedback resistor Rf is shown in the figure. The
input voltage is given to the positive terminal. The output voltage is given by V0= (1+Rf /R1) Vi
COMPARATOR :
A voltage comparator is a two-input circuit that compares the voltage at one input to the voltage at the other
input. Usually one input is a reference voltage and the other input a time varying signal. If the time varying input is
below or above the reference voltage, then the comparator provides a low or high output accordingly (usually the
plus or minus power supply voltages, since the op-amp is used in the open loop configuration, a small difference ( −
) makes the output to saturate).
DESIGN PROCEDURE:
INVERTING AMPLIFIER
Rin=1KΩ; RL=10K Ω; GAIN A=2;
Vo
A= Vin VO=AVin;
If Vin =5V; Vo=10V;
Rf
For an inverting amplifier A= Rin
Rf VoRin
Vo = Rin Vin; Rf = - Vin
10V 1K
Rf = 5V =2KΩ
RfRin 2k 1k
Rcomp=
Rf Rin = 1k 2k = 670Ω
NON-INVERTING AMPLIFIER
CIRCUIT DIAGRAM:
COMPARATOR
Output (Vo)
PROCEDURE:
(i) Connect the inverting amplifier , Non Inverting amplifier and comparator as per the circuit diagram.
(ii) For various input voltage measure and record the output voltage.
(iii) Repeat the same for non- inverting and differential amplifier.
MODEL GRAPH:
Viva questions
1.What is an op-amp?
2.What are the applications of opamp?
3.What are the characteristics of Ideal OPAMP?
4.What is Comparator?
5.What is inverting amplifier?
RESULT:
The design and testing of the inverting, non-inverting amplifier is done and the input and output waveforms were
drawn.
Ex. No: 2 Integrator and Differentiator Date:
AIM
To design and test the following Op-Amp Circuits: a. Integrator b. Differentiator
APPARATUS REQUIRED:
S.No. Name of the Apparatus Range/Value Qty
1. Bread Board - 1
2. IC Power Supply ±15 V 1
3. Resistor 2, 1,1,1
4. IC 741 Op-Amp - 1
5. CRO 20 MHz. 1
6. Signal Generator 0-1 MHz. 1
7. Capacitor 0.1µF,0.01 µF 1(each)
8. Connecting Wires - Few
THEORY:
a. INTEGRATOR:
The circuit performs the mathematical operation of integration, that is, the output waveform is the
integral of the input waveform. The output voltage Vo(t) = - (1/RfCf) Vi(t) dt , Where Vi is the input
voltage , Rf is the feedback resistance & Cf is the feedback capacitence.
b. DIFFERENTIATOR:
The circuit performs the mathematical operation of differentiation, that is, the output waveform is the
derivative of the input waveform. The output voltage Vo(t) = - RC (dvi / dt) Where Vi is the input
voltage , Rf is the feedback resistance & Cf is the feedback capacitence
PROCEDURE
1. Connections are given as per the circuit diagram for integrator.
2. The square wave of 2Vp-p is given as input to the inverting terminal of the IC.
3. The output waveform is observed in the CRO.
4. Plot the input and output waveforms.
5. Repeat the same for differentiator
DESIGN PROCEDURE:
INTEGRATOR
Given R1Cf =2.2ms; and the input is a square wave;
R1Cf = time constant = 2.2ms; if Cf =0.1μf;
2.2ms
R1 = 0.1f = 2.2kΩ;
t
Vint dt
1
R1= 2.2kΩ; and Vo= - R1Cf 0
DIFFERENTIATOR
Given RfC1 = 2.2ms; and the input is a sine wave;
INTEGRATOR
INPUT
OUTPUT
DIFFERENTIATOR
INPUT
OUTPUT
Viva questions
1. What is Integrator?
2. What is Differentiator?
3. What is o/p equation of Integrator?
4. What is o/p equation of Integrator?
5. Define slew rate
RESULT:
Thus the operation of Integrator and Differentiator was studied and the output was verified with the
theoretical calculation.
Ex. No: 3 Design and analysis of active filters using opamp Date:
AIM:
To design, construct and plot the frequency response of second order low pass and high pass filter having
the fc of 1 kHz.
APPARATUS REQUIRED:
S.No. Name of the Apparatus Range/Value Qty
1. Bread Board - 1
2. IC Power Supply ±15 V 1
10 k Ω,5.86 k Ω 1
3. Resistor
1.6 k Ω 2
4. IC 741 Op-Amp - 1
5. CRO 20 MHz. 1
6. Function Generator 0-3MHz. 1
7. Capacitor 0.1µF 2
8. Connecting Wires - Few
THEORY:
An active high pass filter is a filter that amplifies high-frequency signals and allows them to pass through to
output but greatly attenuates low-frequency signals.
an active low pass filter amplifies low-frequency signals and allows them to pass through to output and
greatly attenuates high-frequency signals.
CIRCUIT DIAGRAM
HIGH PASS FILTER
TABULAR COLUMN
Frequency Output voltage Vo Gain in db MODEL GRAPH
(Hz) (volts) 20 logVo/Vi
CIRCUIT DIAGRAM
LOW PASS FILTER
TABULAR COLUMN
PROCEDURE
1. Connections are given as per the circuit diagram
2. Input and Output waveforms are noted down in the CRO
VIVA QUESTIONS
1.What is low pass filter?
2.What is High pass filter?
3. What is bandpass filter?
4.What is cutoff frequency?
RESULT:
Thus the Second order low pass filter and High pass filter was designed and frequency response plot was drawn.
Ex. No: 4 Schmitt trigger using operational amplifier Date:
AIM:
To design a Schmitt trigger circuit using IC 741 and verify the output wave forms.
APPARATUS REQUIRED:
S.No. Name of the Apparatus Range/Value Qty
1. Bread Board - 1
2. Power Supply ±15 V 1
1kΩ 3
3. Resistor
4. IC 741 Op-Amp - 1
5. CRO 20 MHz. 1
6. Function Generator 0-3MHz. 1
7. Capacitor 0.01µF 2
8. Connecting Wires - Few
CIRCUIT DIAGRAM
MODEL GRAPH
PROCEDURE:
1. Connect the circuit as shown in fig 1(a) as Schmitt trigger using IC 741.
2. Give a 5 Vp-p sine wave of 1 kHz as input.
3. Observe the wave form on CRO and measure UTP and LTP, Vsat and - Vsat.
4. Use X-Y mode in CRO and observe hysteresis curve.
5. Repeat the above experiment for R1 = 5.1Kohms and 15 Kohms and observe the effect.
TABULATION
INPUT
OUTPUT
VIVA QUESTIONS
RESULT:
AIM:
To design and test the operation of Instrumentation Amplifier using operational amplifier
APPARATUS REQUIRED:
Instrumentation amplifier is an amplifier with high input impedance, very low offset and drifts voltage. This configuration
is better than inverting or non-inverting amplifier because it has minimum non-linearity, stable voltage gain and high
common mode rejection ratio (CMRR > 100 dB.). This type of amplifier is used in thermocouples, strain gauges and
biological probes. Output voltage V0 = (V2 – V1) [1 + 2 R1 / R2]
CIRCUIT DIAGRAM:
PROCEDURE:
TABULAR COLUMN
VIVA QUESTIONS
RESULT:
AIM:
APPARATUS REQUIRED:
THEORY:
RC Oscillators use a combination of an amplifier and an RC feedback network to produce output oscillations due to the
phase shift between the stages. The LC oscillator is a type of tuned oscillator that uses a combination of L (Inductor) and C
(Capacitor) to provide the required positive feedback, which is essential to produce sustained oscillations in the circuit.
CIRCUIT DIAGRAM: (RC OSCILLATOR)
MODEL GRAPH
TABULAR COLUMN DESIGN
OUTPUT
OUTPUT
MODEL GRAPH
DESIGN
For Hartley oscillator, the frequency of oscillations is given by
fo = 1/ (2π √ (Leq C))
Where Leq = L1 + L2
Leq = 1.0 × 10-6 + 0.1 × 10-6
Leq = 1.1 × 10-6
The given capacitor value is C = 1 × 10-9 F
Therefore, fo = 1/ (2π √ (1.1 × 10-6 × 1 × 10-9)
= 4.799 MHz.
PROCEDURE:
VIVA QUESTIONS
1.What is an Oscillator?
2which feedback used in oscillators?
3.How an oscillator generates oscillations without any input?
4.Classify oscillators?
5.What are LC oscillators?
RESULT:
6. RPS (0-30) V/ 5V 1
7. Diode 1
8. Connecting Wires - Few
THEORY:
The 555 timer is connected as an astable multivibrator as shown in figure. In this mode of operation
the timing capacitor charges up towards Vcc (assuming Vo is high initially) through (Ra + Rb) until the voltage
across the capacitor reaches the threshold level (2/3) Vcc. At this point the internal upper comparator
switches state causing the internal flip-flop output to go high. This turns on the discharge transistor and the
timing capacitor C then discharges through Rb and the discharging transistor.
DESIGN
ASTABLE MULTIVIBRATOR
CIRCUIT DIAGRAM
MODEL GRAPH
MONOSTABLE MULTIVIBRATOR
CIRCUIT DIAGRAM
MODEL GRAPH
DESIGN
TON = 1.11RC
R=1.8KΩ = 18000Ω
C= 0.1μF =0.1X10-6
VIVA QUESTIONS
APPARATUS REQUIRED
THEORY
A logic gate is a device implementing a Boolean function, a logical operation performed on one or more
binary inputs that produces a single binary output.OR, AND, and NOT are the basic gates. NAND and NOR
which could be implemented using basic gates are known as universal gates. Any logic function could be
implemented using NAND & NOR and hence the name.
PIN DIAGRAM
PROCEDURE:
VIVA QUESTIONS
RESULT:
Thus Logic gates, Hal adder and Full adder are tested
Ex. No:9 Encoder and BCD to 7 segment decoder Date:
AIM:
To convert a given octal input to the binary output and to study the LED display using 7447 7-segment decoder/ driver.
APPARATUS REQUIRED:
S. No. Name of the Apparatus Range/Value Qty
1. Digital IC Trainer Kit - 1
2. IC74148 - 1
3 IC7447 - 1
4 7 SEGMENT DISPLAY - 1
THEORY:
ENCODER:
An encoder is a digital circuit that performs inverse operation of a decoder. An encoder has 2n input lines and n output
lines. In encoder the output lines generates the binary code corresponding to the input value. In octal to binary encoder it
has eight inputs, one for each octal digit and three output that generate the corresponding binary code.
DECODER:
A decoder is a multiple input multiple output logic circuit which converts coded input into coded output where input and
output codes are different. The input code generally has fewer bits than the output code. Each input code word produces a
different output code word i.e there is one to one mapping can be expressed in truth table.
PROCEDURE: - (Encoder)
1. Connections are made as per circuit diagram.
2. The octal inputs are given at the corresponding pins.
3. The outputs are verified at the corresponding output pins
LOGIC DIAGRAM
TRUTH TABLE
INPUTS OUTPUTS
Y1 Y2 Y3 Y4 Y5 Y6 Y7 A B C
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 1
0 0 0 0 0 0 0 0 1 0
0 0 0 0 0 0 0 0 1 1
0 0 0 0 0 0 0 1 0 0
0 0 0 0 0 0 0 1 0 1
0 0 0 0 0 0 0 1 1 0
0 0 0 0 0 0 0 1 1 1
7 SEGMENT DECODER
PIN DIAGRAM
7 SEGMENT DISPLAY
TRUTH TABLE
AIM:
To verify the truth table of multiplexer using 74153 & to verify a demultiplexer using 74139.
APPARATUS REQUIRED:
S. No. Name of the Apparatus Range/Value Qty
1. Digital IC Trainer Kit - 1
2. IC 74153 - 1
3. IC74139 - 1
4. Patch cards - As required
PROCEDURE: -
1. The Pin [16] is connected to + Vcc.
2. Pin [8] is connected to ground.
3. The inputs are applied either to ‘A’ input or ‘B’ input.
4. If MUX ‘A’ has to be initialized, Ea is made low and if MUX ‘B’ has to be initialized, Eb is made low.
5. Based on the selection lines one of the inputs will be selected at the output and thus the truth table is verified.
MULTIPLEXER(74153)
SNO S1 S0 Y
1 0 0 D0
2 0 1 D1
3 1 0 D2
4 1 1 D3
DEMULTIPLEXER(74139) TRUTH TABLE
INPUTS OUTPUTS
1G 1A 1B 1Y0 1Y1 1Y2 1Y3
1 X X 1 1 1 1
0 0 0 0 1 1 1
0 0 1 1 0 1 1
0 1 0 1 1 0 1
0 1 1 1 1 1 0
RESULT:
APPARATUS REQUIRED:
S. No. Name of the Apparatus Range/Value Qty
1. Digital IC Trainer Kit - 1
2. IC 74194 - 1
3. Patch cards - As required
THEORY
A Universal shift register is a register which has both the right shift and left shift with parallel load capabilities.
Universal shift registers are used as memory elements in computers. A Unidirectional shift register is capable of shifting in
only one direction. A bidirectional shift register is capable of shifting in both the directions. The Universal shift register is a
combination design of bidirectional shift register and a unidirectional shift register with parallel load provision
PIN DIAGRAM
Truth table
PROCEDURE:
1. Derive the wiring diagram.
2. Connect Input terminals to the Logic Input Sockets.
3. S1,S0, SERIAL LEFT,SERIAL RIGHT,PARALLEL DATA-A,B,C and D to Logic Input Sockets.
4. Connect Supply to VCC.
5. Connect External Clock to the CLOCK Terminal.
6. Connect QA, QB, QC and QD to the Logic Output terminals.
7. Observe output changes at O/P Terminals with given Truth Table
VIVA QUESTIONS
1. What is Shift Register?
2. What are the modes of Shift Register?
3. What is Universal Shift Register?
4. What are the applications of Universal Shift Register?
RESULT :
Thus the Universal Shift Register is constructed and verified
Ex. No:12 Design of mod-N counter Date:
AIM:
To design and MOD 8 counter using flip-flop IC 7476.
APPARATUS REQUIRED:
S. No. Name of the Apparatus Range/Value Qty
1. Digital IC Trainer Kit - 1
2. JK FLIPFLOP IC7476 1
3. Patch cards - As required
THEORY
A counter in which each flip-flop is triggered by the output goes to previous flip-flop. As all the flip-flops do not change
state simultaneously spike occur at the output. To avoid this, strobe pulse is required. Because of the propagation delay the
operating speed of asynchronous counter is low. Asynchronous counters are easy and simple to construct
MOD-8 UP COUNTER
TRUTH TABLE
PROCEDURE: -
VIVA QUESTIONS
1.What is counter?
2.How many flipflops are required to construct MOD 10 counter?
3.What are the types of counter?
4. What is Mod N Counter?
5.Differentiate Synchronous and asynchronous counter
RESULT: -
AIM:
To simulate the instrumentation amplifier using pspice technique.
APPARATUS REQUIRED:
1. Orcad Simulation software
2. A personal computer
3. Printer
PROCEDURE:
1. Open a “New project” in OrCad Pspice
2. Choose “Analog or mixed Project” and give “Name” of the circuit and “Choose/Create folder and directory” (
Donot save in pendrives)
3. Place components, Ground(“0” ground only) and supplies and connect the circuit as shown in figure 6.1
4. In the “Pspice icon” create simulation profile(inherit from none). Choose “AC Sweep”. In this, starting frequency
should be greater than 0 and end frequency can be anything. Choose “10 points” per decade so that the plot will
be looking better.
5. Run the simulation using the “run button” shown in figure given below.
INVERTING AMPLIFIER
CIRCUIT DIAGRAM: OUTPUT
Rf 2k
Rin 1k 4
2 V- 1
- OS1
uA741 6
VAMPL = 5v OUT
FREQ = 1k 3 5 Rl
+ 7 OS2
V+ 10k
Rcomp 670
Rf 2k
Rin 1k 4
2 V- 1
- OS1
uA741 6
OUT
3 5 Rl
+ 7 OS2
V+ 10k
VAMPL = 3v
FREQ = 1k
RESULT:
Thus Inverting and Non inverting amplifier was designed and simulated.
SIMULATION OF ACTIVE LOW PASS, HIGH PASS FILTERS
AIM:
To simulate the low pass,high pass filter and RC phase shift oscillator using pspice technique.
APPARATUS REQUIRED:
PROCEDURE:
27k
20k
4
2 V- 1
- OS1
uA741 6
16k 16k OUT
3 5
+ 7 OS2
5v 0.0047uf V+
0.0047uf
ACTIVE HIGH PASS FILTER
CIRCUIT DIAGRAM OUTPUT
0.1uf
0.1uf 32k
796 4
2 V- 1
- OS1
1Vac uA741 6
9 OUT
3 5
+ 7 OS2
V+
32k
1M
V2
10k
4
2 V- 1
- OS1 CRO
uA741 6 + - 12v
OUT 0
3 5
V1 0
+ 7 OS2
V+
12v
RESULT:
Thus active low pass, high pass and band pass filters was designed and simulated.