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RISC and CISC

Difference between RISC and CISC, Write down all addressing modes

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Nitika Kumari
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47 views3 pages

RISC and CISC

Difference between RISC and CISC, Write down all addressing modes

Uploaded by

Nitika Kumari
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Assignment - 2

Q1) Difference between RISC and CISC

Feature RISC CISC


Instruction Set Complex and variable-
Simple and uniform instructions length instructions
Instruction Instructions executed in one cycle Instructions may require
Execution multiple cycles
Simplified instruction set, fewer Complex instruction set,
Complexity addressing modes more addressing modes
Pipelining Facilitates easy pipelining Complex instructions can
hinder pipelining
Register Usage Less reliance on registers,
Relies heavily on registers more memory access
Register Usage Relies heavily on registers Less reliance on registers,
more memory access
Memory Load/store architecture Direct memory operand
Access access
Code Size Typically smaller due to simpler
instructions
Performance High performance for specific tasks Flexible but may have lower
performance in some cases
Design Emphasis on optimizing common case Focus on supporting a wide
Philosophy performance range of operations

Q2) Write down all addressing modes


Immediate addressing mode (symbol #): In this mode data is present in address field of
instruction. Designed like one address instruction format. Limitation in the immediate mode
is that the range of constants are restricted by size of address field.
Register mode: In register addressing the operand is placed in one of 8 bit or 16 bit general
purpose registers. The data is in the register that is specified by the instruction.

Register Indirect mode: In this addressing the operand’s offset is placed in any one of the
registers BX,BP,SI,DI as specified in the instruction. The effective address of the data is in
the base register or an index register that is specified by the instruction.

Auto Indexed (increment mode): Effective address of the operand is the contents of a
register specified in the instruction. After accessing the operand, the contents of this register
are automatically incremented to point to the next consecutive memory location. (R1)+.
Auto indexed (decrement mode): Effective address of the operand is the contents of a
register specified in the instruction. Before accessing the operand, the contents of this
register are automatically decremented to point to the previous consecutive memory
location. –(R1)

Direct addressing/ Absolute addressing Mode (symbol [ ]): The operand’s offset is given
in the instruction as an 8 bit or 16 bit displacement element. In this addressing mode the 16
bit effective address of the data is the part of the instruction.
Indirect addressing Mode : In this mode address field of instruction contains the address
of effective address. Here two references are required. 1st reference to get effective address.
2nd reference to access the data. Based on the availability of Effective address,

Indexed addressing mode: The operand’s offset is the sum of the content of an index
register SI or DI and an 8 bit or 16 bit displacement.

Based Indexed Addressing: The operand’s offset is sum of the content of a base register
BX or BP and an index register SI or DI.

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