SCBS084B − D3712, JANUARY 1991 − REVISED DECEMBER 1992

• Members of the Texas Instruments SN54ABT16245 . . . WD PACKAGE

Widebus  Family SN74ABT16245 . . . DGG OR DL PACKAGE
(TOP VIEW)
• State-of-the-Art EPIC-ΙΙB  BiCMOS Design
Significantly Reduces Power Dissipation
• 1DIR 1OE
1 48
Latch-Up Performance Exceeds 500 mA
1B1 2 47 1A1
Per JEDEC Standard JESD-17
1B2 3 46 1A2
• Typical VOLP (Output Ground Bounce) GND 4 45 GND
< 1 V at VCC = 5 V, TA = 25°C 1B3 5 44 1A3
• Distributed VCC and GND Pin Configuration 1B4 6 43 1A4
Minimizes High-Speed Switching Noise VCC 7 42 VCC
• Flow-Through Architecture Optimizes 1B5 8 41 1A5
PCB Layout 1B6 9 40 1A6
• High-Drive Outputs (− 32-mA IOH, GND 10 39 GND
64-mA IOL ) 1B7 11 38 1A7

• Packaged in Plastic 300-mil Shrink

1B8
2B1
12
13
37
36
1A8
2A1
Small-Outline and Thin Shrink
2B2 14 35 2A2
Small-Outline Packages and 380-mil
GND 15 34 GND
Fine-Pitch Ceramic Flat Packages Using
25-mil Center-to-Center Spacings 2B3 16 33 2A3
2B4 17 32 2A4
VCC 18 31 VCC
description
2B5 19 30 2A5
The ′ABT16245 is a 16-bit (dual-octal) 2B6 20 29 2A6
noninverting 3-state transceiver designed for GND 21 28 GND
synchronous two-way communication between 2B7 22 27 2A7
data buses. The control function implementation 2B8 23 26 2A8
minimizes external timing requirements. 2DIR 24 25 2OE
This device can be used as two 8-bit transceivers
or one 16-bit transceiver. It allows data
transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses
are effectively isolated.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74ABT16245 is available in TI’s shrink small-outline package (DL), which provides twice the I/O pin
count and functionality of standard small-outline packages in the same printed-circuit-board area.
The SN54ABT16245 is characterized for operation over the full military temperature range of −55°C to 125°C.
The SN74ABT16245 is characterized for operation from − 40°C to 85°C.

FUNCTION TABLE
(each 8-bit section)
INPUTS
OPERATION
OE DIR
L L B data to A bus
L H A data to B bus
H X Isolation

Widebus and EPIC-ΙΙB are trademarks of Texas Instruments Incorporated.

  !"# $ %&'# "$  (&)*%"# +"#', Copyright  1992, Texas Instruments Incorporated
+&%#$ %! # $('%%"#$ (' #-' #'!$  '."$ $#&!'#$
$#"+"+ /""#0, +&%# (%'$$1 +'$ # '%'$$"*0 %*&+'
#'$#1  "** (""!'#'$,

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SCBS084B − D3712, JANUARY 1991 − REVISED DECEMBER 1992

logic symbol† logic diagram (positive logic)

48
1OE G3 1
1 1DIR
1DIR 3 EN1 [BA]
3 EN2 [AB] 48
25 1OE
2OE G6
24
2DIR 6 EN4 [BA]
6 EN5 [AB] 47
1A1
47 2
1A1 1 1B1
2
2 1B1
46 3
1A2 1B2
44 5
1A3 1B3
43 6
1A4 1B4
41 8
1A5 1B5
40 9 To Seven Other Channels
1A6 1B6
38 11
1A7 1B7
37 12
1A8 1B8 24
2DIR
36 13
2A1 4 2B1
5 25
35 14 2OE
2A2 2B2
33 16
2A3 2B3
32 17 36
2A4 2B4 2A1
30 19
2A5 2B5
29 20 13
2A6 2B6 2B1
27 22
2A7 2B7
26 23
2A8 2B8

† This symbol is in accordance with ANSI/IEEE Std 91-1984

and IEC Publication 617-12.
To Seven Other Channels

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (except I/O ports) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Voltage range applied to any output in the high state or power-off state, VO . . . . . . . . . . . . . −0.5 V to 5.5 V
Current into any output in the low state, IO: SN54ABT16245 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
SN74ABT16245 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −18 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Maximum power dissipation at TA = 55°C (in still air): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8 W
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.85 W
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

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SCBS084B − D3712, JANUARY 1991 − REVISED DECEMBER 1992

recommended operating conditions (see Note 2)

SN54ABT16245 SN74ABT16245
UNIT
MIN MAX MIN MAX
VCC Supply voltage 4.5 5.5 4.5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
VI Input voltage 0 VCC 0 VCC V
IOH High-level output current −24 −32 mA
IOL Low-level output current 48 64 mA
∆t /∆v Input transition rise or fall rate Outputs enabled 10 10 ns/ V
TA Operating free-air temperature −55 125 −40 85 °C
NOTE 2: Unused or floating pins (input or I/O) must be held high or low.

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)
TA = 25°C SN54ABT16245 SN74ABT16245
PARAMETER TEST CONDITIONS UNIT
MIN TYP† MAX MIN MAX MIN MAX
VIK VCC = 4.5 V, II = −18 mA −1.2 −1.2 −1.2 V
VCC = 4.5 V, IOH = − 3 mA 2.5 2.5 2.5
VCC = 5 V, IOH = − 3 mA 3 3 3
VOH V
VCC = 4.5 V, IOH = − 24 mA 2 2
VCC = 4.5 V, IOH = − 32 mA 2‡ 2
VCC = 4.5 V, IOL = 48 mA 0.55 0.55
VOL V
VCC = 4.5 V, IOL = 64 mA 0.55‡ 0.55
VCC = 5.5 V, Control inputs ±1 ±1 ±1
II µA
A
VI = VCC or GND A or B ports ±100 ±100 ±100
IOZH§ VCC = 5.5 V, VO = 2.7 V 10¶ 10 10¶ µA
IOZL§ VCC = 5.5 V, VO = 0.5 V −10¶ −10 −10¶ µA
Ioff VCC = 0, VI or VO ≤ 4.5 V ±100 ±100 µA
ICEX VCC = 5.5 V, VO = 5.5 V Outputs high 50 50 50 µA
IO# VCC = 5.5 V, VO = 2.5 V −50 −100 −180 −50 −180 −50 −180 mA
Outputs high 2 2 2
VCC = 5.5 V,
Outputs low 32 32 32
ICC IO = 0, A or B ports mA
VI = VCC or GND Outputs
2 2 2
disabled
Outputs
VCC = 5.5 V, 1 1.5 1
enabled
One input at 3.4 V, Data inputs
∆ICC|| Outputs mA
Other inputs at 0.05 1 0.05
disabled
VCC or GND
Control inputs 1.5 1.5 1.5
Ci VI = 2.5 V or 0.5 V Control inputs 3 pF
Cio VO = 2.5 V or 0.5 V A or B ports 8.5 pF
† All typical values are at VCC = 5 V.
‡ On products compliant to MIL-STD-883, Class B, this parameter does not apply.
§ The parameters IOZH and IOZL include the input leakage current.
¶ This data sheet limit may vary among suppliers.
# Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
|| This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.

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SCBS084B − D3712, JANUARY 1991 − REVISED DECEMBER 1992

switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, CL = 50 pF (unless otherwise noted) (see Figure 1)
VCC = 5 V,
FROM TO SN54ABT16245 SN74ABT16245
PARAMETER TA = 25°C UNIT
(INPUT) (OUTPUT)
MIN TYP MAX MIN MAX MIN MAX
tPLH 1 2.2 3.4 0.5 4 1 3.9
A or B B or A ns
tPHL 1 2.1 3.8 0.5 4.6 1 4.5
tPZH 1 3.1 4.4 0.8 5.5 1 5.4
OE B or A ns
tPZL 1 3 6.1 0.9 7.3 1 7.2
tPHZ 1.3 3.5 4.7 1.3 6.3 1.3 5.5
OE B or A ns
tPLZ 1.4 3.2 4.7 1.4 5.3 1.4 5.2

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SCBS084B − D3712, JANUARY 1991 − REVISED DECEMBER 1992

PARAMETER MEASUREMENT INFORMATION

7V

500 Ω S1 Open
From Output TEST S1
Under Test GND
tPLH/tPHL Open
CL = 50 pF 500 Ω tPLZ/tPZL 7V
(see Note A) tPHZ/tPZH Open

LOAD CIRCUIT FOR OUTPUTS

3V
Timing Input 1.5 V
0V
tw
tsu th
3V
3V
Input 1.5 V 1.5 V
Data Input 1.5 V 1.5 V
0V 0V

VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS

PULSE DURATION SETUP AND HOLD TIMES

3V 3V
Input Output
1.5 V 1.5 V 1.5 V 1.5 V
(see Note B) Control
0V 0V
tPZL
tPLH tPHL
tPLZ
VOH Output 3.5 V
1.5 V Waveform 1 1.5 V
Output 1.5 V VOL + 0.3 V
S1 at 7 V VOL
VOL
(see Note C)
tPHZ
tPHL tPLH tPZH
Output
VOH VOH
Waveform 2 VOH − 0.3 V
Output 1.5 V 1.5 V 1.5 V
S1 at Open
VOL (see Note C) [0V

VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES ENABLE AND DISABLE TIMES
INVERTING AND NONINVERTING OUTPUTS LOW- AND HIGH-LEVEL ENABLING

NOTES: A. CL includes probe and jig capacitance.

B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one transition per measurement.

Figure 1. Load Circuit and Voltage Waveforms

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SCBS084B − D3712, JANUARY 1991 − REVISED DECEMBER 1992

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 PACKAGE OPTION ADDENDUM
www.ti.com 18-Sep-2008

PACKAGING INFORMATION

Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
SN74ABT16245DGGR OBSOLETE TSSOP DGG 48 TBD Call TI Call TI
SN74ABT16245DL OBSOLETE SSOP DL 48 TBD Call TI Call TI
SN74ABT16245DLR OBSOLETE SSOP DL 48 TBD Call TI Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.

Addendum-Page 1
 MECHANICAL DATA

MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001

DL (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

48 PINS SHOWN

0.025 (0,635) 0.0135 (0,343)

0.005 (0,13) M
0.008 (0,203)

48 25
0.010 (0,25)
0.005 (0,13)

0.299 (7,59)
0.291 (7,39)

0.420 (10,67)
0.395 (10,03) Gage Plane

0.010 (0,25)

1 24 0°–ā8°
0.040 (1,02)
A
0.020 (0,51)

Seating Plane

0.004 (0,10)
0.110 (2,79) MAX 0.008 (0,20) MIN

PINS **
28 48 56
DIM

0.380 0.630 0.730

A MAX
(9,65) (16,00) (18,54)

0.370 0.620 0.720

A MIN
(9,40) (15,75) (18,29)
4040048 / E 12/01

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
D. Falls within JEDEC MO-118

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 MECHANICAL DATA

MTSS003D – JANUARY 1995 – REVISED JANUARY 1998

DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

48 PINS SHOWN

0,27
0,50 0,08 M
0,17
48 25

6,20 8,30
6,00 7,90 0,15 NOM

Gage Plane

0,25
1 24
0°– 8°
A 0,75
0,50

Seating Plane
0,15
1,20 MAX 0,10
0,05

PINS **
48 56 64
DIM

A MAX 12,60 14,10 17,10

A MIN 12,40 13,90 16,90

4040078 / F 12/97

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.
C. Body dimensions do not include mold protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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