IRF640, RF1S640, RF1S640SM

Data Sheet January 2002

18A, 200V, 0.180 Ohm, N-Channel Power Features

MOSFETs • 18A, 200V
These are N-Channel enhancement mode silicon gate
• rDS(ON) = 0.180Ω
power field effect transistors. They are advanced power
MOSFETs designed, tested, and guaranteed to withstand a • Single Pulse Avalanche Energy Rated
specified level of energy in the breakdown avalanche mode • SOA is Power Dissipation Limited
of operation. All of these power MOSFETs are designed for
applications such as switching regulators, switching • Nanosecond Switching Speed
convertors, motor drivers, relay drivers, and drivers for high • Linear Transfer Characteristics
power bipolar switching transistors requiring high speed and
• High Input Impedance
low gate drive power. These types can be operated directly
from integrated circuits. • Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Formerly developmental type TA17422.
Components to PC Boards”

Ordering Information Symbol

PART NUMBER PACKAGE BRAND D
IRF640 TO-220AB IRF640

RF1S640 TO-262AA RF1S640

G
RF1S640SM TO-263AB RF1S640

NOTE: When ordering, use the entire part number. Add the suffix 9A to
S
obtain the TO-263AB variant in the tape and reel, i.e., RF1S640SM9A.

Packaging
JEDEC TO-220AB JEDEC TO-263AB

SOURCE
DRAIN
GATE DRAIN
GATE (FLANGE)

DRAIN (FLANGE) SOURCE

JEDEC TO-262AA

SOURCE
DRAIN
DRAIN GATE
(FLANGE)

©2001 Fairchild Semiconductor Corporation IRF640, RF1S640, RF1S640SM Rev. B

 IRF640, RF1S640, RF1S640SM

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified

IRF640, RF1S640, RF1S640SM UNITS
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS 200 V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 200 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 18 A
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 11 A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 72 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 125 W
Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0 W/oC
Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 580 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ , TSTG -55 to 150 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL 300 oC
Package Body for 10s, See TB334. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 260 oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. TJ = 25oC to 125oC.

Electrical Specifications TC = 25oC, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V, (Figure 10) 200 - - V
Gate Threshold Voltage VGS(TH) VGS = VDS , ID = 250µA 2 - 4 V
Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS , VGS = 0V - - 25 µA
VDS = 0.8 x Rated BVDSS , VGS = 0V, TJ = 125oC - - 250 µA
On-State Drain Current (Note 1) ID(ON) VDS > ID(ON) x rDS(ON)MAX , VGS = 10V (Figure 7) 18 - - A
Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA
Drain to Source On Resistance (Note 1) rDS(ON) ID = 10A, VGS = 10V (Figures 8, 9) - 0.14 0.18 Ω
Forward Transconductance (Note 1) gfs VDS ≥ 10V, ID = 11A (Figure 12) 6.7 10 - S
Turn-On Delay Time td(ON) VDD = 100V, ID ≈ 18A, RGS = 9.1Ω, RL = 5.4Ω, - 13 21 ns
Rise Time tr MOSFET Switching Times are Essentially - 50 77 ns
Independent of Operating Temperature
Turn-Off Delay Time td(OFF) - 46 68 ns
Fall Time tf - 35 54 ns
Total Gate Charge Qg(TOT) VGS = 10V, ID ≈ 18A, VDS = 0.8 x Rated BVDSS - 43 64 nC
(Gate to Source + Gate to Drain) (Figure 14) Gate Charge is Essentially Independent
Gate to Source Charge Qgs of Operating Temperature - 8 - nC
IG(REF) = 1.5mA
Gate to Drain “Miller” Charge Qgd - 22 - nC
Input Capacitance CISS VDS = 25V, VGS = 0V, f = 1MHz (Figure 11) - 1275 - pF
Output Capacitance COSS - 400 - pF
Reverse Transfer Capacitance CRSS - 100 - pF
Internal Drain Inductance LD Measured From the Modified MOSFET - 3.5 - nH
Contact Screw on Tab to Symbol Showing the
Center of Die Internal Devices
Measured From the Drain Inductances - 4.5 - nH
D
Lead, 6mm (0.25in) From
Package to Center of Die LD
Internal Source Inductance LS Measured From the - 7.5 - nH
Source Lead, 6mm G
(0.25in) from Header to LS
Source Bonding Pad
S
Thermal Resistance Junction to Case RθJC - - 1 oC/W

Thermal Resistance Junction to RθJA Free Air Operation, IRF640 - - 62 oC/W

Ambient RθJA RF1S640SM Mounted on FR-4 Board with Minimum - - 62 oC/W
Mounting Pad

©2001 Fairchild Semiconductor Corporation IRF640, RF1S640, RF1S640SM Rev. B

 IRF640, RF1S640, RF1S640SM

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD Modified MOSFET D - - 18 A
Pulse Source to Drain Current ISDM Symbol Showing the
- - 72 A
(Note 2) Integral Reverse P-N
Junction Diode
G

S
Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 18A, VGS = 0V, (Figure 13) - - 2.0 V
Reverse Recovery Time trr TJ = 25oC, ISD = 18A, dISD/dt = 100A/µs 120 240 530 ns
Reverse Recovery Charge QRR TJ = 25oC, ISD = 18A, dISD/dt = 100A/µs 1.3 2.8 5.6 µC
NOTES:
2. Pulse Test: Pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive Rating: Pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ = 25oC, L = 3.37mH, RG = 25Ω, peak IAS = 18A.

Typical Performance Curves Unless Otherwise Specified

1.2 20
POWER DISSIPATION MULTIPLIER

1.0
16
ID, DRAIN CURRENT (A)

0.8
12

0.6
8
0.4

4
0.2

0
0
0 50 100 150 25 50 75 100 125 150
TC, CASE TEMPERATURE (oC) TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE CASE TEMPERATURE

10
THERMAL IMPEDANCE (oC/W)

1
ZθJC , TRANSIENT

0.5
0.2
0.1 0.1 PDM
0.05
0.02
0.01 t1
0.01 t2
SINGLE PULSE NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC + TC
0.001
10-5 10-4 10-3 10-2 10-1 1 10
tP, RECTANGULAR PULSE DURATION (s)

FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE

©2001 Fairchild Semiconductor Corporation IRF640, RF1S640, RF1S640SM Rev. B

 IRF640, RF1S640, RF1S640SM

Typical Performance Curves Unless Otherwise Specified (Continued)

1000 30
OPERATION IN THIS AREA MAY BE
LIMITED BY rDS(ON) PULSE DURATION = 80µs
10V DUTY CYCLE = 0.5% MAX
TC = 25oC 8V
24

ID , DRAIN CURRENT (A)

ID , DRAIN CURRENT (A)

100
10µs 7V

18
100µs

10 1ms
12
6V
10ms
6
TC = 25oC DC
TJ = MAX RATED 5V
SINGLE PULSE 4V
0
1
1 10 100 1000 0 12 24 36 48 60
VDS , DRAIN TO SOURCE VOLTAGE (V) VDS , DRAIN TO SOURCE VOLTAGE (V)

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

30 100
PULSE DURATION = 80µs VGS = 8V PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX
VGS = 10V
VDS ≥ 50V
24 VGS = 7V
ID , DRAIN CURRENT (A)

ID , DRAIN CURRENT (A)

10
18

VGS = 6V 25oC
12
150oC
1

6 VGS = 4V VGS = 5V

0 0.1
0 1.0 2.0 3.0 4.0 5.0 0 2 4 6 8 10
VDS , DRAIN TO SOURCE VOLTAGE (V) VGS , GATE TO SOURCE VOLTAGE (V)

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

1.5 3.0
PULSE DURATION = 80µs PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX
NORMALIZED DRAIN TO SOURCE

VGS = 10V, ID = 18A

rDS(ON) , DRAIN TO SOURCE

1.2 2.4
ON RESISTANCE (Ω)

ON RESISTANCE

0.9 1.8

0.6 1.2

0.3 VGS= 10V

0.6
VGS = 20V

0 0
0 15 30 45 60 75 -60 -40 -20 0 20 40 60 80 100 120 140 160
ID , DRAIN CURRENT (A) TJ , JUNCTION TEMPERATURE (oC)

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

VOLTAGE AND DRAIN CURRENT RESISTANCE vs JUNCTION TEMPERATURE

©2001 Fairchild Semiconductor Corporation IRF640, RF1S640, RF1S640SM Rev. B

 IRF640, RF1S640, RF1S640SM

Typical Performance Curves Unless Otherwise Specified (Continued)

1.25 3000
ID = 250µA VGS = 0V, f = 1MHz CISS = CGS + CGD
CRSS = CGD
NORMALIZED DRAIN TO SOURCE

1.15 2400 COSS ≈ CDS + CGD

BREAKDOWN VOLTAGE

C, CAPACITANCE (pF)
1.05 1800
CISS

0.95 1200

COSS
0.85 600
CRSS

0.75 0
-60 -40 -20 0 20 40 60 80 100 120 140 160 1 10 100
TJ , JUNCTION TEMPERATURE (oC) VDS , DRAIN TO SOURCE VOLTAGE (V)

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
VOLTAGE vs JUNCTION TEMPERATURE

15 1000
PULSE DURATION = 80µs PULSE DURATION = 80µs
ISD , SOURCE TO DRAIN CURRENT (A)
DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX
gfs , TRANSCONDUCTANCE (S)

12
150oC
25oC 100
9

150oC
6 25oC
10

0
1
0 6 12 18 24 30 0 0.4 0.8 1.2 1.6 2.0
ID , DRAIN CURRENT (A) VSD , SOURCE TO DRAIN VOLTAGE (V)

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

20
ID = 28A
VGS , GATE TO SOURCE VOLTAGE (V)

VDS = 40V
16

VDS = 100V
12

VDS = 160V
8

0
0 15 30 45 60 75
Qg, GATE CHARGE (nC)

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

©2001 Fairchild Semiconductor Corporation IRF640, RF1S640, RF1S640SM Rev. B

 IRF640, RF1S640, RF1S640SM

Test Circuits and Waveforms

VDS
BVDSS

L tP
VDS

VARY tP TO OBTAIN IAS

+ VDD
REQUIRED PEAK IAS RG
VDD
VGS -
DUT

tP
0V IAS
0
0.01Ω
tAV

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

tON tOFF

td(ON) td(OFF)

tr tf
RL VDS
90% 90%

+
VDD 10% 10%
RG
- 0

DUT 90%

VGS 50% 50%

PULSE WIDTH
VGS 10%
0

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

VDS
CURRENT (ISOLATED
SUPPLY)
REGULATOR
VDD

SAME TYPE Qg(TOT)

AS DUT VGS
12V
0.2µF 50kΩ Qgd
BATTERY
0.3µF
Qgs

D
VDS

G DUT
0

IG(REF) S
0
VDS IG(REF)
IG CURRENT ID CURRENT
SAMPLING SAMPLING
RESISTOR RESISTOR 0

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

©2001 Fairchild Semiconductor Corporation IRF640, RF1S640, RF1S640SM Rev. B

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not intended to be an exhaustive list of all such trademarks.
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PRODUCT STATUS DEFINITIONS
Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

Rev. H4