0% found this document useful (0 votes)
7 views19 pages

Description: SN54F04, SN74F04 Hex Inverters

Uploaded by

Vibhore Jain
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
7 views19 pages

Description: SN54F04, SN74F04 Hex Inverters

Uploaded by

Vibhore Jain
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 19

SN54F04, SN74F04

HEX INVERTERS
SDFS037A – MARCH 1987 – REVISED OCTOBER 1993

• Package Options Include Plastic SN54F04 . . . J PACKAGE


Small-Outline Packages, Ceramic Chip SN74F04 . . . D OR N PACKAGE
(TOP VIEW)
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
1A 1 14 VCC
description 1Y 2 13 6A
2A 3 12 6Y
These devices contain six independent inverters. 2Y 4 11 5A
They perform the Boolean function Y = A. 3A 5 10 5Y
The SN54F04 is characterized for operation over 3Y 6 9 4A
the full military temperature range of – 55°C to GND 7 8 4Y
125°C. The SN74F04 is characterized for
operation from 0°C to 70°C. SN54F04 . . . FK PACKAGE
(TOP VIEW)
FUNCTION TABLE

VCC
NC
(each inverter)

1Y
1A

6A
INPUT OUTPUT
A Y 3 2 1 20 19
2A 4 18 6Y
H L
NC 5 17 NC
L H 2Y 16 5A
6
NC 7 15 NC
logic symbol† 3A 8 14 5Y
9 10 11 12 13
1 2
1A 1 1Y

GND
3Y

NC
4Y
4A
3 4
2A 2Y
5 6
3A 3Y NC – No internal connection
9 8
4A 4Y
11 10
5A 5Y
13 12
6A 6Y

† This symbol is in accordance with ANSI/IEEE Std 91-1984 and


IEC Publication 617-12.

logic diagram, each inverter (positive logic)

A Y

Pin numbers shown are for the D, J, and N packages.

PRODUCTION DATA information is current as of publication date. Copyright  1993, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2–1


SN54F04, SN74F04
HEX INVERTERS
SDFS037A – MARCH 1987 – REVISED OCTOBER 1993

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 1.2 V to 7 V
Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30 mA to 5 mA
Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA
Operating free-air temperature range: SN54F04 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
SN74F04 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions


SN54F04 SN74F04
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
IIK Input clamp current – 18 – 18 mA
IOH High-level output current –1 –1 mA
IOL Low-level output current 20 20 mA
TA Operating free-air temperature – 55 125 0 70 °C

electrical characteristics over recommended operating free-air temperature range (unless


otherwise noted)
SN54F04 SN74F04
PARAMETER TEST CONDITIONS UNIT
MIN TYP‡ MAX MIN TYP‡ MAX
VIK VCC = 4.5 V, II = – 18 mA – 1.2 – 1.2 V
VCC = 4.5 V, IOH = – 1 mA 2.5 3.4 2.5 3.4
VOH V
VCC = 4.75 V, IOH = – 1 mA 2.7
VOL VCC = 4.5 V, IOL = 20 mA 0.3 0.5 0.3 0.5 V
II VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
IIH VCC = 5.5 V, VI = 2.7 V 20 20 µA
IIL VCC = 5.5 V, VI = 0.5 V – 0.6 – 0.6 mA
IOS§ VCC = 5.5 V, VO = 0 – 60 –150 – 60 –150 mA
ICCH VCC = 5.5 V, VI = 0 2.8 4.2 2.8 4.2 mA
ICCL VCC = 5.5 V, VI = 4.5 V 10.2 15.3 10.2 15.3 mA
‡ All typical values are at VCC = 5 V, TA = 25°C.
§ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.

2–2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


SN54F04, SN74F04
HEX INVERTERS
SDFS037A – MARCH 1987 – REVISED OCTOBER 1993

switching characteristics (see Note 2)


VCC = 5 V, VCC = 4.5 V to 5.5 V,
CL = 50 pF, CL = 50 pF,
FROM TO RL = 500 Ω, RL = 500 Ω,
PARAMETER
(INPUT) (OUTPUT) TA = 25°C TA = MIN to MAX† UNIT
′F04 SN54F04 SN74F04
MIN TYP MAX MIN MAX MIN MAX
tPLH 1.6 3.3 5 1.2 7 1.6 6
A Y ns
tPHL 1 2.8 4.3 1 6.5 1 5.3
† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTE 2: Load circuits and waveforms are shown in Section 1.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2–3


PACKAGE OPTION ADDENDUM

www.ti.com 30-Jul-2024

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

5962-9759301Q2A ACTIVE LCCC FK 20 55 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962- Samples
& Green 9759301Q2A
SNJ54F
04FK
5962-9759301QCA ACTIVE CDIP J 14 25 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962-9759301QC Samples
& Green A
SNJ54F04J
5962-9759301QDA ACTIVE CFP W 14 25 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962-9759301QD Samples
& Green A
SNJ54F04W
JM38510/33002B2A ACTIVE LCCC FK 20 55 Non-RoHS SNPB N / A for Pkg Type -55 to 125 JM38510/ Samples
& Green 33002B2A
JM38510/33002BCA ACTIVE CDIP J 14 25 Non-RoHS SNPB N / A for Pkg Type -55 to 125 JM38510/ Samples
& Green 33002BCA
JM38510/33002BDA ACTIVE CFP W 14 25 Non-RoHS SNPB N / A for Pkg Type -55 to 125 JM38510/ Samples
& Green 33002BDA
M38510/33002B2A ACTIVE LCCC FK 20 55 Non-RoHS SNPB N / A for Pkg Type -55 to 125 JM38510/ Samples
& Green 33002B2A
M38510/33002BCA ACTIVE CDIP J 14 25 Non-RoHS SNPB N / A for Pkg Type -55 to 125 JM38510/ Samples
& Green 33002BCA
M38510/33002BDA ACTIVE CFP W 14 25 Non-RoHS SNPB N / A for Pkg Type -55 to 125 JM38510/ Samples
& Green 33002BDA
SN54F04J ACTIVE CDIP J 14 25 Non-RoHS SNPB N / A for Pkg Type -55 to 125 SN54F04J Samples
& Green
SN74F04D OBSOLETE SOIC D 14 TBD Call TI Call TI 0 to 70 F04
SN74F04DR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 F04 Samples

SN74F04DRG4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 F04 Samples

SN74F04N ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 SN74F04N Samples

SN74F04NSR ACTIVE SO NS 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 74F04 Samples

SNJ54F04FK ACTIVE LCCC FK 20 55 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962- Samples
& Green 9759301Q2A

Addendum-Page 1
PACKAGE OPTION ADDENDUM

www.ti.com 30-Jul-2024

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
SNJ54F
04FK
SNJ54F04J ACTIVE CDIP J 14 25 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962-9759301QC Samples
& Green A
SNJ54F04J
SNJ54F04W ACTIVE CFP W 14 25 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962-9759301QD Samples
& Green A
SNJ54F04W

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

Addendum-Page 2
PACKAGE OPTION ADDENDUM

www.ti.com 30-Jul-2024

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF SN54F04, SN74F04 :

• Catalog : SN74F04
• Military : SN54F04

NOTE: Qualified Version Definitions:

• Catalog - TI's standard catalog product


• Military - QML certified for Military and Defense Applications

Addendum-Page 3
PACKAGE MATERIALS INFORMATION

www.ti.com 16-Apr-2024

TAPE AND REEL INFORMATION

REEL DIMENSIONS TAPE DIMENSIONS


K0 P1

B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers

Reel Width (W1)


QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2 Q1 Q2

Q3 Q4 Q3 Q4 User Direction of Feed

Pocket Quadrants

*All dimensions are nominal


Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74F04DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
SN74F04NSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1

Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION

www.ti.com 16-Apr-2024

TAPE AND REEL BOX DIMENSIONS

Width (mm)
H
W

*All dimensions are nominal


Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74F04DR SOIC D 14 2500 356.0 356.0 35.0
SN74F04NSR SO NS 14 2000 367.0 367.0 38.0

Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION

www.ti.com 16-Apr-2024

TUBE

T - Tube
height L - Tube length

W - Tube
width

B - Alignment groove width

*All dimensions are nominal


Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
5962-9759301Q2A FK LCCC 20 55 506.98 12.06 2030 NA
5962-9759301QDA W CFP 14 25 506.98 26.16 6220 NA
JM38510/33002B2A FK LCCC 20 55 506.98 12.06 2030 NA
JM38510/33002BDA W CFP 14 25 506.98 26.16 6220 NA
M38510/33002B2A FK LCCC 20 55 506.98 12.06 2030 NA
M38510/33002BDA W CFP 14 25 506.98 26.16 6220 NA
SN74F04N N PDIP 14 25 506 13.97 11230 4.32
SN74F04N N PDIP 14 25 506 13.97 11230 4.32
SNJ54F04FK FK LCCC 20 55 506.98 12.06 2030 NA
SNJ54F04W W CFP 14 25 506.98 26.16 6220 NA

Pack Materials-Page 3
GENERIC PACKAGE VIEW
FK 20 LCCC - 2.03 mm max height
8.89 x 8.89, 1.27 mm pitch LEADLESS CERAMIC CHIP CARRIER

This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.

4229370\/A\

www.ti.com
PACKAGE OUTLINE
J0014A SCALE 0.900
CDIP - 5.08 mm max height
CERAMIC DUAL IN LINE PACKAGE

PIN 1 ID A 4X .005 MIN


(OPTIONAL) [0.13] .015-.060 TYP
[0.38-1.52]

1
14
12X .100
[2.54] 14X .014-.026
14X .045-.065 [0.36-0.66]
[1.15-1.65]
.010 [0.25] C A B

.754-.785
[19.15-19.94]

7 8

B .245-.283 .2 MAX TYP .13 MIN TYP


[6.22-7.19] [5.08] [3.3]

C SEATING PLANE

.308-.314
[7.83-7.97]
AT GAGE PLANE

.015 GAGE PLANE


[0.38]

0 -15 14X .008-.014


TYP [0.2-0.36]

4214771/A 05/2017

NOTES:

1. All controlling linear dimensions are in inches. Dimensions in brackets are in millimeters. Any dimension in brackets or parenthesis are for
reference only. Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This package is hermitically sealed with a ceramic lid using glass frit.
4. Index point is provided on cap for terminal identification only and on press ceramic glass frit seal only.
5. Falls within MIL-STD-1835 and GDIP1-T14.

www.ti.com
EXAMPLE BOARD LAYOUT
J0014A CDIP - 5.08 mm max height
CERAMIC DUAL IN LINE PACKAGE

(.300 ) TYP
[7.62] SEE DETAIL B
SEE DETAIL A

1 14

12X (.100 )
[2.54]

SYMM

14X ( .039)
[1]

7 8

SYMM

LAND PATTERN EXAMPLE


NON-SOLDER MASK DEFINED
SCALE: 5X

.002 MAX (.063)


[0.05] [1.6]
ALL AROUND METAL
( .063)
SOLDER MASK [1.6]
OPENING

METAL

SOLDER MASK .002 MAX


(R.002 ) TYP [0.05]
OPENING
[0.05] ALL AROUND
DETAIL A DETAIL B
SCALE: 15X 13X, SCALE: 15X

4214771/A 05/2017

www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these
resources.
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for
TI products.
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2024, Texas Instruments Incorporated

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy