IT233 Full Test Bank

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 Chapter 1 Computers and Systems

1) The architecture of the computer system rests on a solid foundation that has changed only slightly and
gradually since the __________ .
a) late 1930s
b) late 1940s
c) late 1950s
d) late 1960s
2) The work performed by an individual computer system within the IT system can be characterized by
a) hardware and software
b) input, storage and output
c) storage processing and output
d) input, processing, and output.
3) As a matter of necessity, network interfaces must conform to standard agreements, known as ___________ ,
for messages to be understood by both computers during a message exchange between a pair of computers.
a) protocols
b) I/O services
c) device controllers
d) Ethernet standards
4) The components of an individual computer system consist of processing hardware, input devices, output
devices, storage devices,
a) and application programs.
b) and operating system software.
c) application software and operating system software.
d) application software, file storage, and data processing.
5) The _____________ provides the physical mechanisms to input and output data, to manipulate and process
data, and to electronically control the various input, output, and storage components.
a) data
b) network
c) computer hardware
d) computer software
6) What is the only requirement for data to be manipulated and processed by a computer?
a) The data type must be numeric.
b) The data must be represented in binary form.
c) The data type must be alphanumeric, graphic, sound or color.
d) The size of the data must be smaller than the capacity of the hard drive.
7) Which of the following is not part of the conceptual view of a CPU?
a) ALU
b) Control Unit
c) Interface Unit
d) Main memory
8) The main memory, often known as primary storage, working storage, or RAM (for random access memory),
holds
a) data.
b) program instructions.
c) program instructions and data.
d) program instructions, data, and instructions for booting the computer.
9) The idea that the program instructions and data are both stored in memory while being processed is known as
the
a) processing concept.
b) stored program concept.
c) data-instruction concept.
d) memory-data-instruction concept.
10) Many of the internal OS services are provided by the ___________ module, which contains the most
important operating system processing functions.
a) CPU
b) root
c) kernel
d) central
11) The operating system's ________________________ acts as an interface for application programs and
utilities to access the internal services provided by the operating system.
a) monitoring system
b) supervising system
c) application subsystem
d) application program interface
12) When the computer is started, a bootstrap or IPL (Initial Program Load) begins testing the system. Where is
this bootstrap program stored?
a) RAM
b) ROM
c) hard drive
d) virtual memory
13) The fact that different types of computers can work together, share files, and communicate successfully is
known as
a) supercomputing
b) open computing
c) distributed computing
d) coupled systems computing
14) The word, "virtual," as used in the text, is most synonymous with which word?
a) logical
b) notional
c) tangible
d) theoretical
15) ___________ are agreements among interested parties, often manufacturers, to assure that various system
components will work together interchangeably.
a) Manuals
b) Standards
c) References
d) Operating procedures
16) Unicode is a(n)
a) character encoding standard
b) video encoding standard
c) audio encoding standard
d) graphic encoding standard
17) MPEG-4 is a(n)
a) text standard
b) video standard
c) audio standard
d) graphic standard
18) MP3 is a(n)
a) text standard
b) video standard
c) audio standard
d) graphic standard
19) Which of the following is not a feature defined in a protocol specification for communication?
a) message format
b) data representation
c) Operating System vendor
d) identification and authentication
20) Storage devices communicate with a computer using protocols. One such protocol is:
a) SATA
b) PATA
c) serial encoded messages (SEM)
d) hard-disk parallel communications protocol (HDPC)

Chapter 1 Discussion Questions

1) What do the following computing devices have in common: workplace computers, tablets, smartphones, and
computers embedded in other equipment?

Sol: from the text; “All contain at least one central processing unit (some contain more) and memory. All
provide a facility for interacting with long-term storage and other devices and with users. What may be
less obvious to you is that the programs that they run are also essentially similar, differing mostly in the
details required by the different components of the particular system and by the nature of the
applications.”

2) List five specific skills or abilities required of an information technology (IT) systems architect or system
analyst?

Here is an example:
1) Design and implement systems that meet an organization's information technology (IT) needs.

Sol: There are a lot of responsibilities listed in the text. Here are some:
2) Use cost and capabilities of the components that you select.
3) Justify the set of computer system components and the system architecture that are appropriate for a
particular job.
4) Determine the tradeoffs between other possible system architectures.
5) Assist management in making intelligent decisions about system strategy.
6) Analyze the best way to provide appropriate facilities to meet the needs of your users.
7) Differentiate between simple technological obsolescence and major advances that suggest a real need to
replace older equipment.
8) Understand the tradeoffs inherent in the use of cloud and other remote services.
9) Read and understand the technical specifications.
10) Know the differences between various CPU technologies and the advantages and disadvantages of
each.
11) Know what is required to build an intranet, and what the speed, and size, and performance
limitations of a particular system.
12) Compare the features of OS/X, Windows, and Linux knowledgeably and decide which ones are
important.
13) Apply your basic understanding of computers to new technologies and concepts such as mobile IT,
new network protocols, virtual machines and cloud services as they appear.
14) Learn to understand the jargon used by computer salespeople and judge the validity of their sales
claims.

3) The work performed by an individual computer system within the IT system can be characterized by the
Input-Process-Output (IPO) model. Use the IPO model to analyze the process of purchasing a soft drink from a
vending machine. Keep it simple!

Sol: (More sophisticated responses could appear; here is a simplistic model)

INPUT: Money in the form of paper bills or coins; drink selection
PROCESSING: Check the integrity of the money; calculate the change;
OUTPUT: dispense the change and drink

4) On your home or school computer, find the CPU speed (in GHz), main memory size (in GB), and the size of
the hard drive (in GB). Also find the operating system and its version.

Sol: Answer will vary. May be more suitable for an exercise or take home test.

5) Pick one of the protocols listed below and report on its origin, purpose and supporting organization.
Recommend between 250 and 300 words. When using the Internet for research purposes, be sure to give the
Author (if available), date of article (if available), name or title of the webpage, URL and the date accessed.

Protocol: PNG, HTML, XML, PDF, MPEG, MP3, HTTP, DVD-ROM

Sol: Answer will vary. May be more suitable for an exercise or take home test.
Problem Answer Section in text / comments
1 b Section 1.0 Introduction
2 d Section 1.1 The Starting Point
3 a Section 1.1 The Starting Point
4 c Section 1.1 The Starting Point
5 c Section 1.2 Components of the Computer System
6 b Section 1.2 Components of the Computer System
7 d Section 1.2 Components of the Computer System
8 c Section 1.2 Components of the Computer System
9 b Section 1.2 Components of the Computer System
10 c Section 1.2 Components of the Computer System
11 d Section 1.2 Components of the Computer System
12 b Section 1.2 Components of the Computer System
13 b Section 1.2 Components of the Computer System
14 a Section 1.3 The Concept of Virtualization
15 b Section 1.4 Protocols and Standards
16 a Section 1.4 Protocols and Standards
17 b Section 1.4 Protocols and Standards
18 c Section 1.4 Protocols and Standards
19 c Section 1.4 Protocols and Standards
20 a Section 1.4 Protocols and Standards
 Chapter 2 An Introduction to System Concepts

1) From a systems perspective, how would you classify a computer operating system?
a) A tangible system
b) A physical system
c) A conceptual system
d) A perceptible system
2) Anything outside the system boundary represents the _____________ that the system operates.
a) interface
b) subsystem
c) environment
d) super system
3) A large organization’s IT system might have specific programs such as marketing, manufacturing,
purchasing, inventory, finance, and accounting. These are considered ____________ to the larger IT system.
a) interfaces
b) subsystems
c) the environment
d) super systems
4) The division of a system or subsystem into its components and linkages is called
a) itemization
b) reconstruction
c) decomposition
d) categorization
5) What is not part of an abstract description of system architecture?
a) system constraints
b) system interconnections
c) linkages among the components
d) physical location of the servers
6) Which of the following are not input devices?
a) stylus
b) headphones
c) touch screen
d) mouse and keyboard
7) The system architecture representation of the flow and processing of data within an organization is called
a) three-tier architecture
b) application architecture
c) flow control architecture
d) customer oriented architecture
8) Scalability is the ability of a system to
a) handle a growing amount of work.
b) allow access to information when it is needed.
c) protect data against unauthorized access or modification.
d) allow configuration, monitoring, and maintaining operation.
9) Information availability is the ability of a system to
a) handle a growing amount of work.
b) allow access to information when it is needed.
c) protect data against unauthorized access or modification.
d) allow configuration, monitoring, and maintaining operation.
10) Data security is the ability of a system to
a) handle a growing amount of work.
b) allow access to information when it is needed.
c) protect data against unauthorized access or modification.
d) allow configuration, monitoring, and maintaining operation.
11) System administration is the ability of a system to
a) handle a growing amount of work.
b) allow access to information when it is needed.
c) protect data against unauthorized access or modification.
d) allow configuration, monitoring, and maintaining operation.
12) In a client-server architecture, the only limitations to running multiple applications on a single server are the
potential slowdowns that may result from the load on the server computer and
a) traffic on the Internet.
b) load on client computer.
c) users who open many web browsers.
d) the traffic on the network to that server.
13) A two-tier architecture simply means that there are ________ computers involved in the service.
a) one
b) two
c) two to five
d) two or more
14) A web-browser connected to a web-server is an example of
a) multiprocessing
b) cluster computing
c) n-tier architecture
d) client-server technology
15) Because response time is considered an important measure by most Web users, it is often more practical to
separate the database and page processing into a third computer system. This is an example of
a) multiprocessing
b) cluster computing
c) n-tier architecture
d) three-tier architecture
16) The protocol that makes communication between a Web server and a database application possible is called
a) SQL
b) HTTP
c) Database Control Language
d) Common Gateway Interface
17) ______________ is software designed to handle potential incompatibilities between the application
software that resides on different equipment.
a) Middleware
b) Versioning software
c) Compatibility software
d) Application interface software
18) The organization's internal network, isbcommonly called a(n)
a) intranet
b) employee network
c) corporation network
d) organizational network
19) Internet standards such as _______ allow the easy identification of relevant data within data streams
between interconnected systems, making these applications possible and practical.
a) XML
b) FTP
c) SSH
d) HTTPS
20) What is not a benefit of cloud services?
a) Backup and offsite storage
b) Additional computing capability when and where it is needed
c) Lower hardware and software investments
d) Added security

Chapter 2 Discussion Questions

1) What is the top-down approach to system architecture?

Sol: Short description: Start with the system as a whole and then continuously decompose each function
into a set of dependent subsystems of increasing detail.

Sol: from the text: “The analysis, design, and implementation of IT systems must take place at different
levels of detail and frequently require collaboration among many analysts and designers. This
corresponds well with the ability to decompose systems into components, hierarchically, which allows us
to concentrate at the appropriate levels of detail during each step along the way. This approach is known
as a top-down approach.”
2) What are the benefits of the top-down approach to system architecture?

Sol: from the text: “The top-down approach allows us to focus on the specific areas of interest without the
distraction of details that are irrelevant for the level that we're studying. In this way, a system architect
can analyze and study the IT system as a whole, encapsulating the computer systems, software systems,
network architecture, and Web architecture that represent components, and focusing instead on the
large picture: the purpose of each component and the requirements for the interfaces and linkages that
connect and integrate them. With the IT system architecture firmly established, we can consider the
individual business functions, computer systems, and networks that will link them together. For IT
system analysis, this is often sufficient, at least superficially, assuming that the system architects actually
understand the conditions and constraints imposed by details at the lower levels.”
3) Give a short description of peer-to-peer architecture.

Sol: from the text: “An alternative to client-server architecture is peer-to-peer architecture. Peer-to-peer
architecture treats the computers in a network as equals, with the ability to share files and other
resources and to move them between computers.”
4) Reread "Google: A System Architecture Example" from the text. What are Google’s three specific
processing tasks that the system must fulfill?

Sol:
1) The system must accept search requests from users, identify and rank matches, create a Web page,
and serve it to the user.
2) The system must collect data—lots of data! This task “crawls the Web,” identifies the search terms
(every significant word) on every Web page it encounters, and maintains an index database connecting
each term to the corresponding page. It likewise stores every Web page in a Web page database and
assigns a ranking value to each entry.
3) The system must manage advertisements, identify appropriate advertisements in response to user
search requests, and make the advertisements available to the Web page creation application mentioned
in 1.
May be more suitable for an exercise or take-home test.

) Why does Google use inexpensive commodity PCs, similar to standard, medium power, non-state-of-the-art,
off-the-shelf PCs in its datacenter?

Sol: From the text: “Overall, this design allows a large number of searches to progress in parallel. The
use of inexpensive PC hardware makes the solution cost-effective. The system can be scaled easily by
adding more computers. Finally, the failure of a PC does not result in failure and, in fact, has minimal
effect on the performance of the system overall. Thus, this solution meets the original requirements
admirably.”

Problem Answer Section in text / comments

1 c Section 2.1 The General Concept of Systems
2 c Section 2.1 The General Concept of Systems
3 b Section 2.1 The General Concept of Systems
4 c Section 2.1 The General Concept of Systems
5 d Section 2.1 The General Concept of Systems
6 b Section 2.2 IT System Architectures
7 b Section 2.2 IT System Architectures
8 a Section 2.2 IT System Architectures
9 b Section 2.2 IT System Architectures
10 c Section 2.2 IT System Architectures
11 d Section 2.2 IT System Architectures
12 d Section 2.2 IT System Architectures
13 b Section 2.2 IT System Architectures
14 d Section 2.2 IT System Architectures
15 d Section 2.2 IT System Architectures
16 d Section 2.2 IT System Architectures
17 a Section 2.2 IT System Architectures
18 a Section 2.2 IT System Architectures
19 a Section 2.2 IT System Architectures
20 d Section 2.2 IT System Architectures
 Chapter 3 Number Systems

1) How many binary digits does it take to represent the decimal number 2013?
a) 16
b) 8
c) 11
d) 2013
2) How many bytes does it take to store the binary equivalent of the decimal number 1945?
a) 1
b) 2
c) 4
d) 10
3) The largest number that can be represented 8 bits without considering a sign is
a) 15
b) 255
c) 65,535
d) 10,000,000
4) The largest single digit in octal is
a) 1
b) 7
c) 8
d) 10
5) The largest single digit in hexadecimal is
a) 1
b) 8
c) F
d) 9
6) The binary number 101100112 is equivalent to the decimal number
a) 113
b) 179
c) 133
d) 10,110,011
7) Eight raised to the power zero is
a) 0
b) 1
c) 8
d) -8
8) Eight raised to the power one is
a) 0
b) 1
c) 8
d) -8
9) The number of different items that can be represented by a given number of digits, n, in a particular base,
b, is given by the formula: 𝑏 𝑛 equals _____________.
a) field
b) radix
c) range
d) parameter
10) The digit with the greatest weight (value) in a number is called the
a) radix
b) heaviest bit
c) least significant digit
d) most significant digit
11) The octal number 128 is equivalent to the decimal number
a) 9
b) 10
c) 24
d) 12
12) The hexadecimal number 1A16 is equivalent to the decimal number
a) 9
b) 17
c) 26
d) 110
13) How many bits are there in one byte?
a) 1
b) 4
c) 8
d) 10
14) A single digit that can have only one of two values, 0 or 1, is a
a) bit
b) blip
c) signal
d) character
15) In order to divide a number by its base we can perform
a) a bit op
b) a left shift
c) a right shift
d) a complex equation
16) In order to multiply a number by its base we can perform
a) a bit op
b) a left shift
c) a right shift
d) a complex equation
17) The base 8 number system is called
a) octal
b) fractal
c) ochodecimal
d) hexadecimal
18) The base 2 number system is called
a) binary
b) fractal
c) bitly
d) radix
19) Which of the following is true?
a) 12 <18
b) 102 < 18
c) 1012 < 108
d) 1012 < 58
20) Which of the following is true?
a) 0.12 > 0.18
b) 0.12 = 0.18
c) 0.12 < 0.18
d) None of these
21) Which of the following is true?
a) 1018 <1016
b) 108 < 116
c) 118 < 1016
d) 128 < A16
22) The “Exclusive OR” function (used for the result bit when adding single digits in binary) will equal 1 if
the input bits are
a) 0+0
b) 0+1
c) 1+1
d) None of these
23) The “AND” function (used for the carry bit when adding single digits in binary) will equal 1 if the input
bits are
a) 0+0
b) 0+1
c) 1+1
d) None of these
24) The decimal number 9 is equivalent to the hexadecimal
a) A
b) 9
c) 10
d) 1001
25) The base 16 number system is called
a) octal
b) fractal
c) sextadecimal
d) hexadecimal
26) To convert from binary to octal by grouping, one octal digit corresponds to how many binary digits?
a) one
b) two
c) three
d) eight
27) To convert from binary to hexadecimal by grouping, one hexadecimal digit corresponds to how many
binary digits?
a) two
b) four
c) eight
d) sixteen
28) Ten raised to the power negative one (10-1) is
a) 1/10
b) -10
c) -1/10
d) None of these
29) The binary number 10.012 is equivalent in decimal to
a) 2.01
b) 2.25
c) 4.25
d) 10.01
30) The octal number 1.28 is equivalent in decimal to
a) 1.25
b) 8.16
c) 8.25
d) 12
31) The hexadecimal number B.416 is equivalent in decimal to
a) 10.25
b) 10.5
c) 11.25
d) None of these
32) The decimal fraction ¼ (0.25) is equivalent to
a) 0.12
b) 0.18
c) 0.116
d) None of these
33) The digit furthest to the right is usually the
a) radix
b) lightest bit
c) least significant digit
d) most significant digit
34) The number of different digits, including zero, that exist in the number system is the
a) range
b) field
c) base
d) parameter
35) The number point (normally known by the name of the base—for example "decimal point" in base
10)—which divides whole numbers from fractional numbers is called
a) bit point
b) radix point
c) fractal point
d) division point
Analytic questions (There are no discussion questions for this chapter)

1) Convert this binary number 1010110102 to Decimal.

Sol: 346
2) Convert this binary number 1010110102 to Octal.
Sol: 532
3) Convert this binary number 1010110102 to Hexadecimal.
Sol: 15A
4) Show the decimal number 147 in Binary.
Sol: 10010011
5) Show the decimal number 147 in Octal.
Sol: 223
6) Show the decimal number 147 in Hexadecimal.
Sol: 93
7) Convert this hexadecimal number 5D316 to Binary.
Sol: 10111010011
8) Convert this hexadecimal number 5D316 to Octal.
Sol: 2723
9) Convert this hexadecimal number 5D316 to Decimal.
Sol: 1491
10) Convert this octal number 12348 to Decimal.
Sol: 668
11) Convert this octal number 12348 to Binary.
Sol: 1010011100
12) Convert this octal number 12348 to Hexadecimal.
Sol: 29C
13) Show the decimal number 5.25 in Binary.
Sol: 101.01
14) Convert the binary number 1.1012 to decimal.
Sol: 1.625
15) Addition: Show 42 + 3 in binary--explaining each time you add and carry (Show your work for credit).
Hint: Make a table with powers of 2 as column headings and make the first row equal to the binary value for
decimal 42; make the next row binary 3, then add column by column for the total in last row.
Sol:
128 64 32 16 8 4 2 1
0 0 1 0 1 0 1 0 42
0 0 0 0 0 0 1 1 3
0 0 1 0 1 1 0 (carry 1) 1 45
Problem Answer Section in text / comments
1 c Section 3.1 Numbers as a Physical Representation
2 b Section 3.1 Numbers as a Physical Representation
3 b Section 3.2 Counting in Different Bases
4 b Section 3.2 Counting in Different Bases
5 c Section 3.2 Counting in Different Bases
6 b Section 3.2 Counting in Different Bases
7 b Section 3.2 Counting in Different Bases
8 c Section 3.2 Counting in Different Bases
9 c Section 3.2 Counting in Different Bases
10 d Section 3.2 Counting in Different Bases
11 b Section 3.3 Performing Arithmetic in Different Number Bases
12 c Section 3.3 Performing Arithmetic in Different Number Bases
13 c Section 3.3 Performing Arithmetic in Different Number Bases
14 a Section 3.3 Performing Arithmetic in Different Number Bases
15 c Section 3.3 Performing Arithmetic in Different Number Bases
16 b Section 3.3 Performing Arithmetic in Different Number Bases
17 a Section 3.3 Performing Arithmetic in Different Number Bases
18 a Section 3.3 Performing Arithmetic in Different Number Bases
19 c Section 3.3 Performing Arithmetic in Different Number Bases
20 a Section 3.3 Performing Arithmetic in Different Number Bases
21 c Section 3.3 Performing Arithmetic in Different Number Bases
22 b Section 3.3 Performing Arithmetic in Different Number Bases
23 c Section 3.3 Performing Arithmetic in Different Number Bases
24 b Section 3.5 Hexadecimal Numbers and Arithmetic
25 d Section 3.5 Hexadecimal Numbers and Arithmetic
26 c Section 3.6 A Special Conversion Case—Number Bases That Are Related
27 b Section 3.6 A Special Conversion Case—Number Bases That Are Related
28 a Section 3.7 Fractions
29 b Section 3.7 Fractions
30 a Section 3.7 Fractions
31 c Section 3.7 Fractions
32 d Section 3.7 Fractions
33 c Section 3.7 Fractions
34 c Section 3.7 Fractions
35 d Section 3.7 Fractions
 Chapter 4 Data Formats
1) Input from a device that represents a continuous range of data is known as
a) metadata.
b) analog data.
c) various data.
d) discrete data.
2) Information that describes or interprets the meaning of the data is known as
a) ASCII.
b) analog.
c) EBCDIC.
d) metadata.
3) Which of the following is NOT one of the common alphanumeric codes?
a) ASCII
b) Unicode
c) Ordinal
d) EBCDIC
4) When recording sound, the data that describes how long a time period each captured sound measurement
represents is known as the
a) MIDI
b) WAVE
c) amplitude
d) sampling rate
5) The alphanumeric code that has codes for the characters of nearly every character-based alphabet of the
world is
a) ASCII.
b) Unicode.
c) Ordinal.
d) EBCDIC.
6) Characters used to control the position of the output on the screen or paper, to cause some action to occur,
such as ringing a bell or deleting a character, or to communicate status between the computer and an I/O
device are called
a) glyphs.
b) symbols.
c) control characters.
d) command characters.
7) The order of the alphanumeric codes in the representation table, which will determine how data is sorted,
is known as
a) metadata.
b) scan code.
c) control code.
d) collating sequence.
8) How many bytes are needed to store one ASCII character?
a) 1
b) 2
c) 3
d) 4
9) The presentation of an image as input or output, one pixel at a time, in order, is called
a) metadata.
b) sampling.
c) a raster scan.
d) collating sequence.
10) Image files that store each individual point within the image are
a) glyphs.
b) vector images.
c) object images.
d) bitmap images.
11) Images that are defined mathematically as geometrically definable shapes that can be easily moved
around, scaled, and rotated without losing their shape and identity are known as
a) GIF images.
b) raster images.
c) vector images.
d) bitmap images.
12) An example of an image file that uses lossless compression is
a) TIFF.
b) PNG.
c) MP3.
d) JPEG.
13) Which image file format is best used for photographs of real-world objects?
a) GIF
b) PNG
c) MP3
d) JPEG
14) The nature of display technology makes it much more convenient and cost effective for regular printers
and display screens to display and print all images as
a) palettes.
b) bitmaps.
c) equations.
d) pseudocode.
15) The color translation table, which translates the code for each pixel into actual color values, is known as
a) a theme.
b) a glyph.
c) a palette.
d) a color chart.
16) The individual elements that form a bitmap image are called
a) pixels.
b) palettes.
c) grid bits.
d) resolution.
17) Increasing or decreasing the number of pixels per inch changes the
a) codec.
b) amplitude.
c) resolution.
d) color depth.
18) Making the pixels smaller and increasing their number will result in a
a) corrupt file.
b) clearer image.
c) loss of quality.
d) smaller file size.
19) Which of the following is NOT an advantage of object images over bitmap images?
a) Easy to create
b) Manipulated easily
c) Resolution independent
d) Require far less storage space
20) In graphically based systems it is necessary to distinguish between characters and their object image-
based representations, known as
a) PNGs.
b) TIFFs.
c) icons.
d) glyphs.
21) Video format is determined by an encoder/decoder algorithm known as a
a) codec.
b) modifier.
c) converter.
d) transformer.
22) Video that is transmitted through a network and displayed in real time is called
a) raster.
b) flowing.
c) streaming.
d) Post Script.
23) Original sound waves are analog in nature and must be converted to digital form for use in the computer.
The circuit that performs this function is known as a(n)
a) analog inverter.
b) digital inverter.
c) A-to-D converter.
d) digital to analog converter.
24) Which of the following waveform metadata would NOT be necessary to process and reproduce the
waveform?
a) Genre
b) Sampling rate
c) Maximum amplitude
d) Total number of samples
25) What is the format used to coordinate the sounds and signals between a computer and connected musical
instruments, particularly keyboards?
a) MOD
b) VOC
c) WAV
d) MIDI
26) The bit rate of an MP3 file is usually measured in
a) bits per second.
b) Kbits per second.
c) Mbits per second.
d) Gbits per second.
27) What is the primary contributor to the small MP3 file size?
a) Lossless compression
b) Psychoacoustic lossy compression
c) Compression, using an algorithm called LZW
d) Compression, similar to that used in .WAV files
28) The .WAV format is a general-purpose format used primarily to store and reproduce
a) text.
b) sound.
c) movies.
d) pictures.
29) Lossless data compression must be used for all of these EXCEPT
a) text files.
b) program files.
c) multimedia files.
d) numerical data files.
30) ZIP files use
a) lossy algorithms only.
b) lossless algorithms only.
c) mix of both lossless and lossy algorithms.
d) depends on the nature of the data being compressed.
31) Most page description languages also provide the capability to extend the language to include
new data formats and new objects using language stubs called
a) clients.
b) plug-ins.
c) web-apps.
d) applications.
32) A language that describes the layout of objects on a displayed or printed page is called
a) MIDI.
b) a palette.
c) EBCDIC.
d) a page description language.
33) Which of the following is NOT an example of a page description language?
a) PDF
b) PCX
c) HTML
d) PostScript
34) Two-valued variables or constants with values of true or false are called
a) float.
b) binary.
c) Boolean.
d) symbols.
35) Numbers with a fractional portion are called
a) real.
c) integers.
b) Boolean.
d) enumerated.
Discussion Questions

1) What is the major difference between how JPEG and GIF image files are compressed?
Sol: GIF uses a lossless compression algorithm (LZW); JPEG is a lossy compression
algorithm.
2) Why is "metadata" important?
Sol: Metadata contains information about the waveform or graphic image required to process and
reproduce the waveform or graphic image. Without metadata, applications would not understand
how to process and reproduce the original content.
3) Why is it critical that standard data representations exist?
Sol: From the text: "These data representations must be recognized by a wide variety of hardware
and software so that they can be used by users working within different computer environments.”
4) What data type would likely be used for a phone number and why?
Sol: Text (string of characters). Phone numbers are not commonly manipulated mathematically, so
there is no reason to store phone numbers in numeric form. Also, phone numbers are more commonly
used in text-based queries, which are more easily handled by text-based manipulation.
5) What shortcomings of ASCII led to the development of Unicode?
Sol: ASCII is 7-bit, and extended ASCII is 8-bit giving a total representation space of 127 and 256
symbols respectively. This is a severe limitation for representing other languages besides English.
Alternatively, ASCII cannot encode enough symbols to represent languages that use other than the
basic Latin alphabet.
6) What would printing ASCII text on an EBCDIC terminal do, and why?
Sol: from the text: "if we use an ASCII terminal for the input, the output will also be in ASCII form
unless some translation took place within the computer. In other words, printing ASCII characters on
an EBCDIC terminal would produce garbage."
7) When sorting an array of words, which comes first: "Apple" or "alligator"? How can you fix it for natural
sort?
Sol: Uppercase "A" has a collating sequence of 65(dec) and lowercase "a" has a collating sequence of
97(dec). Sorting the words "Apple" and "alligator" would result in "Apple" coming before
"alligator." This is fixed by converting the words to all uppercase (or lowercase) before sorting.
8) What is the general concept behind psychoacoustic compression?
Sol: From the text: "Psychoacoustic compression is based on the assumption that there are sounds
that a listener cannot hear or will not notice, which can then be eliminated. As an example, a soft
sound in the background is not usually noticeable against a loud foreground sound. The level of
compression depends on the tolerable level of sound quality, but also on the nature of the audio being
compressed."
9) If we record a song that is one minute long using 16-bit sound samples, sampled at 44.1KHz in mono
channel, without any metadata or compression, how large would the file be? (Express your answer in
Megabytes)
Sol:
Note:
K=1,000 in speed calculations.
M = 1,048,576 for capacity calculations.

Solution is (samples)(sampling rate)(number of channels)(60sec/min)

= (16-bit samples)(44.1K/sec)(1 for mono)(60sec/min)
= 42,336Kbits/min
= 42,336,000bits/min (1byte/8bits)(M/1,048,576)
= 5MB
10) If true color requires 3 bytes per pixel, how much storage space is required for a minute's worth of
output for a video camera producing full screen 1024 × 768 pixel true-color images at a frame rate of thirty
frames per second? Explain any assumptions you make about your calculations.
Sol:
Bytes in one frame = (1024 x 768 pixels)(3 bytes/pixel) = 2,359,296 bytes/frame
Bytes in one minute = (2,359,296 bytes/frame)(30frames/sec)(60sec/min)
= 4,246,732,800 bytes/min
Convert to MB = (4,246,732,800 bytes)(M/1,048,576)
=4,050MB in one minute.

Assume M = 1,048,576 for capacity calculations.

11) Describe the trade-offs between audio quality versus transmission rate or file size for MP3 digital audio
data format.

Sol: Higher bitrates are directly related to file size and audio quality. A high bitrate means improved
representation of the audio, but larger file sizes. That in turn, means longer transmission times. From
the text "the options chosen are made by the creator of the file during the encoding process, based on
the trade-off between tolerable audio quality versus transmission rate or file size."
12) What is the main assumption regarding lossy compression?

Sol: from the text: "Lossy algorithms operate on the assumption that some data can be sacrificed
without significant effect, based on the application and on known properties of human perception."
13) Describe the advantages and disadvantages of data compression.
Sol: Files are compressed for reducing their file size but it takes computing power to perform the
compression and reverse the compression for use. Smaller files have the advantage of reduced storage
and can be transmitted over a network faster. Lossless compression is the only option for files that
must maintain their integrity.
14) A loan application takes as input loan amount, credit scores, salary history, tax history and other relevant
data and produces a single result: either the customer is credit worthy or not. What data type is the variable
"result"?
Sol: Boolean. There are only two possible values. The input data types will vary as integer, float, text
or some other data type.
15) What two factors determine how the binary numbers stored in a computer are interpreted? That is—
what determines whether 01000001 is seen as the character "A" or the integer 65?
Sol: From the text: "The interpretation of these [binary numbers stored in the computer] depends
upon two factors: The actual operations that the computer processor is capable of performing" and
"The data types that are supported by the programming language used to create the application
program." Alternative answer: The context in which the value is used.

Problem Answer Section in text / comments

1 b Section 4.1 General Considerations
2 d Section 4.1 General Considerations
3 c Section 4.1 General Considerations
4 d Section 4.1 General Considerations
5 b Section 4.2 Alphanumeric Character Data
6 c Section 4.2 Alphanumeric Character Data
7 d Section 4.2 Alphanumeric Character Data
8 a Section 4.2 Alphanumeric Character Data
9 c Section 4.3 Visual Data
10 d Section 4.3 Visual Data
11 c Section 4.3 Visual Data
12 b Section 4.3 Visual Data
13 d Section 4.3 Visual Data
14 b Section 4.3 Visual Data
15 c Section 4.3 Visual Data
16 a Section 4.3 Visual Data
17 c Section 4.3 Visual Data
18 b Section 4.3 Visual Data
19 a Section 4.3 Visual Data
20 d Section 4.3 Visual Data
21 a Section 4.3 Visual Data
22 c Section 4.3 Visual Data
23 c Section 4.4 Audio Data
24 a Section 4.4 Audio Data
25 d Section 4.4 Audio Data
26 b Section 4.4 Audio Data
27 b Section 4.4 Audio Data
28 b Section 4.4 Audio Data
29 c Section 4.5 Data Compression
30 b Section 4.5 Data Compression
31 b Section 4.6 Page Description Languages
32 d Section 4.6 Page Description Languages
33 b Section 4.6 Page Description Languages
34 b Section 4.7 Internal Computer Data Format
35 a Section 4.7 Internal Computer Data Format
 Chapter 5 Representing Numerical Data

1) How do computers store all data and program instructions?

a) As decimal numbers.
b) As ASCII characters
c) As binary numbers.
d) As algebraic equations.
2) The binary numbers in a computer might represent
c) images.
b) numbers.
a) characters.
d) All of the above
3) What numbers are generally manipulated as characters?
a) Zip code.
b) Telephone number.
c) Grade point average.
d) Both a and c.
4) When the number to be expressed is outside of the integer range of the computer (too large or too small), or
when the number contains a fractional part it must be stored as a(n)
a) constant.
b) exponent.
c) complement.
d) real number.
5) An 8-bit storage location can store any unsigned integer of value between 0 and
a) 7
b) 16
c) 255
d) 512
6) What does BCD stand for?
a) Binary-Coded Decimal
b) Binary Calculating Device
c) Binary Common Denominator
d) Binary Character Data
7) What is the range of a 1 byte number stored in BCD format?
a) 0-9
b) 0-99
c) 0-999
d) 0-9999
8) How many BCD digits can be stored in one byte?
a) 1
b) 2
c) 7
d) 255
9) What is the most common way to represent negative integers in binary form?
a) As BCD
b) Using 2's complement
c) Using sign-and-magnitude
d) None of the above
10) If we complement the value twice, it will
a) be twice as big.
b) return to its original value.
c) cause an overflow error.
d) reset the carry flag.
11) A combination of numbers that produces a result outside the available range is known as
a) overload.
b) overflow.
c) spillover.
d) wraparound.
12) Changing every 0 to a 1 and every 1 to a 0 is also known as
a) reversion.
b) inversion.
c) diversion.
d) conversion.
13) Using sign-and-magnitude representation, the largest positive number that can be stored in 8 bits is
a) 7
b) 127
c) 255
d) 512
14) Using sign-and-magnitude representation, if the leftmost bit is 1 the number is
a) positive.
b) negative.
c) an error.
d) a character
15) If both inputs to an addition have the same sign, and the output sign is different then
a) the leftmost bit should wrap around.
b) the leftmost bit should be disregarded.
c) the range is insufficient to hold the result.
d) you must take the complement of the result.
16) Using sign-and-magnitude representation, storing the number -12 in 4 bits is
a) 1100
b) 0011
c) 0100
d) impossible.
17) In 1's and 2’s complement representations, a negative number begins with
a) -1
b) 0
c) 1
d) -0
18) How do you find the 2's complement of positive numbers?
a) Invert the numbers
b) Invert the numbers and add one
c) Invert the numbers and wrap around the leftmost bit
d) Do nothing, the complement is the same as the original
19) How do you find the 2's complement of negative numbers?
a) Invert the numbers.
b) Invert the numbers and add one.
c) Invert the numbers and wrap around the leftmost bit.
d) Do nothing, the complement is the same as the original.
20) When adding two numbers using 2's complement, carries beyond the leftmost digit are
a) inverted.
b) ignored.
c) shifted left.
d) shifted right.
21) What is the 8-bit 2’s complement representation for -35?
a) 11011101
b) 01011101
c) 11011100
d) 11011111
22) To correct for carries and borrows that occur when large numbers must be separated into parts to perform
additions and subtractions, we use
a) a bit hold.
b) a carry flag.
c) an error flag.
d) an overflow flag.
23) What is the number 12.345 x 10 2 without using exponential notation?
a) 0.12345
b) 123.45
c) 1234.5
d) 12345
24) In excess-50 notation, an exponent can range from
a) 0 to 50
b) -50 to 49
c) -49 to 50
d) -99 to 99
25) In excess-50 notation, an exponent equaling 17 is stored as
a) -37
b) 17
c) 67
d) 87
26) Shifting numbers left and increasing the exponent until leading zeros are eliminated is called
a) conversion.
b) factorization.
c) normalization.
d) excess notation.
27) The leftmost bit in an IEEE standard floating point number represents
a) the exponent.
b) the mantissa.
c) the sign of the mantissa.
d) the sign of the exponent.
28) The exponent of a floating point number is stored using
a) excess N notation.
b) one's complement.
c) two's complement.
d) binary coded decimal.
29) In the IEEE 754 standard 32 bit single-precision floating point format, how many bits are allocated to the
exponent?
a) 1
b) 2
c) 7
d) 8
29) In the IEEE 754 standard 32 bit single-precision floating point format, how many bits are allocated to the
mantissa?
a) 8
b) 16
c) 23
d) 24
31) With floating point numbers, to add and subtract require that
a) the sign in each number be equal.
b) the mantissa in each number be equal.
c) the exponents in each number be equal.
d) you convert to decimal to perform the operation.
32) In the normalized IEEE 754 standard 32 bit single-precision floating point format, the leading bit of the
mantissa is
a) the sign bit.
b) not stored.
c) always a zero.
d) used for larger exponents.
33) In the IEEE 754 standard 32 bit single-precision floating point format the number "zero" is
a) impossible to represent.
b) treated as a special case.
c) has a mantissa of all ones.
d) has an exponent of all ones.
34) The Department of Motor Vehicles is developing a software program that uses a variable to count the
number of cars being sold each day. The maximum number of cars sold is expected to be several million over
the life of the program and there are no fractional sales. What data type will you use for this variable?
a) float 32-bit
b) float 64-bit
c) integer long 64-bit
d) integer short 32-bit
35) Calculations with floating point numbers
a) are faster than integer calculations.
b) are more precise than integer calculations.
c) typically require less storage space than integers for the results.
d) None of the above.
Discussion Questions

1) Calculate largest positive integer that can be stored in 2 bytes using a) an unsigned integer
b) an integer using sign and magnitude, and c) an unsigned BCD number.

Sol: This is useful: The relationship between largest positive integer and the number (n) of bits used is

largest positive number using n bits = 2^n-1

a) Largest positive integer = 2^16 – 1

= 65536 – 1
= 65,535

b) In two bytes there are 16 bits, of those 15 are available for positive numbers:
= 2^15 – 1
= 32768 – 1
= 32,767

c) BCD uses 4 bits per digit, so we can use up to 4 digits: 9999

(9999 = 1001 1001 1001 1001)
2) How does overflow occur when using a fixed word size to represent integers?

Sol: from the text: “A fixed word size results in a range of some particular fixed size; it is always possible
to have a combination of numbers that produces a result outside the range. This condition is known as
overflow.”
3) The 9’s complementary operation.
a) Find the 9’s complementary representation for the three-digit number -351.
b) Find the 9’s complementary representation for the four-digit number -351.
Sol:
a) In three-digits, the 9’s complementary representation is
999
- 351
-----------
648

b) In four-digits, the 9’s complementary representation is

9999
- 351
-----------
9648
4) The 9’s complementary representation.
a) What is the sign-and-magnitude value of the three-digit number represented in 9’s complement by 461?
b) What is the sign-and-magnitude value of the three-digit number represented in 9’s complement by 747?
Sol:
a) In 9’s complement, numbers 0 to 499 are positive, hence 461 is +461.
b) In 9’s complement, numbers 500 to 998 are negative, so we find the complement:
999
-747
-------------
252
Adjust sign: answer is -252
5) Two's complement

a) Find the 2’s complementary representation in 8-bits of the number -51.

b) Find the 2’s complementary representation in 16-bits of the number -331.

Sol:
a) Step 1: 51 in binary using 8-bits is 00110011
Step 2: Flip the bits: 11001100
Step 3: add 1: 11001101

b) Step 1: 331 in binary using 16-bits is 0000 0001 0100 1011

Step 2: Flip the bits: 1111 1110 1011 0100
Step 3: add 1: 1111 1110 1011 0101
6) Two's complement.

a) What is the decimal sign-and-magnitude value of the 8-bit number represented in 2's complement by
11010011?

b) What is the decimal sign-and-magnitude value of the 8-bit number represented in 2's complement by
01000011?

Sol:
a) Since the leftmost digit is 1, the number is negative. So, invert the number and add one:
11010011 --> 00101100 + 1 = 45. Include the negative sign -45.

b) Since the leftmost digit is 0, the number is positive. So, just convert to decimal:
01000011 (base 2) = 67 (base 10).
7) The exponent for a given number is negative 25. What value is stored to represent the exponent in excess-50
notation?

Sol: In excess-50 notation, 50 is the midvalue or offset. So, we subtract 25 from 50 = 25.
8) What purpose is served by "normalizing" the mantissa? That is—given the extra work—
what is gained?

Sol: Moving the decimal point such that there are no leading zeros ensures the fewest number of
significant digits are truncated, which maximizes the precision.

From the text: “To maximize the precision for a given number of digits, numbers will be stored whenever
possible with no leading zeros. This means that, when necessary, numbers are shifted left by increasing
the exponent until leading zeros are eliminated. This process is called normalization.”
In problems 9-13 use the floating point format SEEMMMMM, where S = 0 is "+" and 5 is "-"; EE is the exponent
in excess-50, and MMMMM are five digits of mantissa.
9) Show how 12.25 is represented in SEEMMMMM format.
Sol:
12.25 = .1225 x 10^2
S=0
EE=52
MMMMM = 12250, where the added zero is added to make five digits
Answer: 05212250
10) Show how -0.00012325 is represented in SEEMMMMM format.

Sol:
0.00012325 = .1225 x 10^-4
S=5
EE=46
MMMMM = 12325
Answer: 54612325
11) Convert 55698799 in SEEMMMMM to a decimal integer without exponents.

Sol:
5 = S; sign is negative
56 = EE; exponent is 6
98799 = MMMMM
- .98799 x 10^6 = -987990.
12) Add the two numbers 04933460 and 04877456 (in SEEMMMMM format.) Represent your answer in
decimal form without using exponents.

Sol:
04933460 ---> +.33460 x 10 ^-1 or 0.033460
04877456 ---> +.77456 x10 ^-2 or 0.0077456
0.033460 + 0.0077456 = 0.0412056
13) Multiply the two numbers 05312675 and 05144359 (in SEEMMMMM format.) Leave the answer in
SEEMMMMM rounding if necessary.

Sol:
05312675 --> +.12675 x 10^3 = 126.75
05144359 --> +.44359 x 10^1 = 4.4359
126.75 x 4.4359 = 562.250325

562.250325 = .562250325 x 10^3 = .56225 x 10^3 rounded to five decimal places

Build the SEEMMMMM
05356225
14) What are the trade-offs between integer and floating calculations?

Sol: From the text: “The trade-offs between integer and floating point are clear. Integer calculations are
easier for the computer to perform, have the potential to provide higher precision, and are obviously
much faster to execute. Integer values usually take up fewer storage locations. As you will see later, it
takes a certain amount of time to access each storage location; thus, the use of fewer storage locations
saves time, as well as space.”
15) Suppose you are writing a program that needs to represent a maximum 50,000 whole things (i.e. integer
data type). What would be better: to use a short integer (16 bits) or long integer (64 bits)? Why?

Sol:
First check that 16 bits is sufficient: 2^16 = 65,536 greater than 50,000, so it possible to use short integer.

From the text: “The longer integer formats may require multiple-word calculation algorithms, and as
such are slower to execute than short formats. The short format is preferable when it is sufficient for the
values that you expect. It may also be necessary to consider the limitations of other systems that the same
program may have to operate on.”
Problem Answer Section in text / comments
1 c Section 5.0 Introduction
2 d Section 5.0 Introduction
3 d Section 5.0 Introduction
4 d Section 5.0 Introduction
5 c Section 5.1 Unsigned Binary and Binary-Coded Decimal Representations
6 a Section 5.1 Unsigned Binary and Binary-Coded Decimal Representations
7 b Section 5.1 Unsigned Binary and Binary-Coded Decimal Representations
8 b Section 5.1 Unsigned Binary and Binary-Coded Decimal Representations
9 b Section 5.2 Representations for Signed Integers
10 b Section 5.2 Representations for Signed Integers
11 b Section 5.2 Representations for Signed Integers
12 b Section 5.2 Representations for Signed Integers
13 b Section 5.2 Representations for Signed Integers
14 b Section 5.2 Representations for Signed Integers
15 c Section 5.2 Representations for Signed Integers
16 d Section 5.2 Representations for Signed Integers
17 c Section 5.2 Representations for Signed Integers
18 b Section 5.2 Representations for Signed Integers
19 b Section 5.2 Representations for Signed Integers
20 b Section 5.2 Representations for Signed Integers
21 a Section 5.2 Representations for Signed Integers
22 b Section 5.2 Representations for Signed Integers
23 c Section 5.3 Real Numbers
24 b Section 5.3 Real Numbers
25 c Section 5.3 Real Numbers
26 c Section 5.3 Real Numbers
27 c Section 5.3 Real Numbers
28 a Section 5.3 Real Numbers
29 d Section 5.3 Real Numbers
30 c Section 5.3 Real Numbers
31 c Section 5.3 Real Numbers
32 b Section 5.3 Real Numbers
33 b Section 5.4 Programming Considerations
34 c Section 5.4 Programming Considerations
35 d Section 5.4 Programming Considerations
 Chapter 6 The Little Man Computer

Consider this model of the LMC and answer the questions below.

1) The LOAD instruction copies data from the

a) in basket to a mailbox.
b) calculator to a mailbox.
c) in basket to the calculator.
d) mailbox to the calculator.
2) The STORE instruction copies data from the
a) in basket to a mailbox.
b) mailbox to the calculator.
c) calculator to a mailbox.
d) in basket to the calculator.
3) The ADD instruction adds data from
a) the in basket to a mailbox.
b) a mailbox to the calculator.
c) a mailbox to the in basket.
d) one mailbox to another mailbox.
4) The SUBTRACT instruction subtracts data in
a) the calculator from a mailbox.
b) the in basket from a mailbox.
c) a mailbox from the calculator.
d) one mailbox from another mailbox.
5) The INPUT instruction takes data from the
a) in basket and places it in a mailbox.
b) mailbox and places it in the in basket.
c) mailbox and places it in the calculator.
d) in basket and places it in the calculator.
6) The OUTPUT instruction takes data from the
a) out basket and places it in a mailbox.
b) mailbox and places it in the out basket.
c) out basket and places it in the calculator.
d) calculator and places it in the out basket.
7) The COFFEE BREAK (HALT) instruction
a) pauses the program.
b) clears all mailboxes.
c) empties the out basket.
d) ignores the address portion of the instruction.
8) A LOAD command will leave the original data in the mailbox
a) deleted.
b) corrupted.
c) unchanged.
d) overwritten.
9) A LOAD command will leave the original data in the calculator
a) deleted.
b) corrupted.
c) unchanged.
d) overwritten.
10) A STORE command will leave the original data in the mailbox
a) deleted.
b) corrupted.
c) unchanged.
d) overwritten.
11) A STORE command will leave the original data in the calculator
a) deleted.
b) corrupted.
c) unchanged.
d) overwritten.
12) An ADD command will leave the original data in the mailbox
a) deleted.
b) corrupted.
c) unchanged.
d) overwritten.
13) An INPUT command will leave the original data in the calculator
a) deleted.
b) corrupted.
c) unchanged.
d) overwritten.
14) An OUTPUT command will leave the original data in the calculator
a) deleted.
b) corrupted.
c) unchanged.
d) overwritten.
15) Which sequence of commands is needed to enter two numbers into the LMC (using the INPUT
command)?
a) INPUT, ADD, INPUT
b) INPUT, LOAD, INPUT
c) INPUT, STORE, INPUT
d) INPUT, ENTER, INPUT
16) The BRANCH UNCONDITIONALLY instruction changes the value in the
a) mailbox.
b) calculator.
c) out basket.
d) program counter (also called instruction location counter).
17) The BRANCH ON ZERO instruction "jumps" if the value in the
a) mailbox is zero.
b) in basket is zero.
c) calculator is zero.
a) instruction location counter is zero.
18) The BRANCH ON POSITIVE instruction "jumps" if the value in the
a) mailbox is positive.
b) in basket is positive.
c) calculator is positive.
d) instruction location counter is positive.
19) The instruction cycle can be broken into these two parts
a) fetch and decode.
b) fetch and execute.
c) decode and execute.
d) execute and increment.
20) The LMC knows which mailbox contains the next task by looking at the
a) calculator.
b) in basket.
c) current mailbox.
d) program counter (instruction location counter).
Please refer to this table of op codes for problems 21 through 33

Opcode Definition
0 Halt
1 ADD
2 SUBTRACT
3 STORE
5 LOAD
6 BRANCH UNCONDITIONALLY
7 BRANCH ON ZERO
8 BRANCH ON POSITIVE
901 INPUT
902 OUTPUT

Please refer to this table of Mailboxes and Contents for problems 21 through 26

Mailbox Contents
00 505
01 106
02 507
03 902
04 000
05 1 DAT
06 3 DAT
07 6 DAT
21) What is the value in the calculator after the first instruction (505) is completed?
a) 1
b) 2
c) 3
d) 6
22) What is the value in the program counter (instruction location counter) after the first instruction
(505) is completed?
a) 01
b) 02
c) 03
d) 04
23) What is the value in the calculator after the fetch but before the execute portion of second instruction
(106)?
a) 1
b) 2
c) 3
d) 6
24) What is the value in the calculator after the second (106) instruction is completed?
a) 1
b) 2
c) 3
d) 4
25) What is the value in the calculator after the third instruction (507) is completed?
a) 1
b) 2
c) 3
d) 6
26) What is the value in the calculator when the program is finished, i.e., when the halt instruction has been
executed?
a) 1
b) 2
c) 3
d) 6
Please refer to this table of Mailboxes and Contents for problems 27 through 33

Mailbox Contents
00 602
01 106
02 507
03 206
04 902
05 000
06 1 DAT
07 3 DAT
08 6 DAT
27) What is the value in the calculator after the first instruction (602) is completed?
a) 1
b) 2
c) 3
d) unknown
28) What is the value in the program counter (instruction location counter) after the first instruction
(602) is completed?
a) 01
b) 02
c) 03
d) 06
29) What is the value in the calculator after the instruction 507 is completed?
a) 1
b) 2
c) 3
d) 6
30) What instruction is never executed?
a) 602
b) 106
c) 507
d) 902
31) What data (DAT) value is never used?
a) 1
b) 2
c) 3
d) 6
32) What is the value in the program counter (instruction location counter) when the program is
finished?
a) 03
b) 04
c) 05
d) 06
33) What is the value in the calculator when the program is finished?
a) 1
b) 2
c) 3
d) 6
34) In the von Neumann architecture, memory holds
a) data only.
b) instructions only.
c) data and instructions.
d) neither data and instructions.
35) In the von Neumann architecture, memory is addressed
a) by location number.
b) by the value stored.
c) by contents of the memory location.
d) None of the above.
Discussion Questions
Please refer to this table of op codes for the discussion questions
Opcode Definition
0 Halt
1 ADD
2 SUBTRACT
3 STORE
5 LOAD
6 BRANCH UNCONDITIONALLY
7 BRANCH ON ZERO
8 BRANCH ON POSITIVE
901 INPUT
902 OUTPUT
1) Using the LMC program below, add comments to explain what the result (value in the calculator) is after
the completion of each instruction. The first one is completed as an example.

Mailbox Contents Result after completion

00 901 Read contents from in basket and store in calculator
01 319
02 901
03 320
04 219
05 709
06 518
07 902
08 000
09 517
10 902
11 000
----------------
17 DAT
18 DAT
19 DAT
20 DAT

Sol:

Mailbox Contents Result after completion

00 901 Read contents from in basket and store in calculator
01 319 Store value of calculator in mailbox 19
02 901 Read contents from in basket and store in calculator
03 320 Store value of calculator in mailbox 20
04 219 Subtract the value in calculator by value in mailbox 19
05 709 Branch to mailbox 09 if calculator is 0
06 518 Load value in mailbox 18 to calculator
07 902 Move value in calculator to out basket
08 000 Halt
09 517 Load value in mailbox 17 to calculator
10 902 Move value in calculator to out basket
11 000 Halt
----------------
17 DAT
18 DAT
19 DAT
20 DAT
2) Refer to the LMC program in question (1). Suppose the contents of mailbox 17 = 5; contents of mailbox
18 = 1.

a) What is the final value in out basket if the first in basket is 56 and second in basket is 89?
b) What is the final value in out basket if the first in basket is 75 and second in basket is 75?
c) What is the final value in out basket if the first in basket is 89 and second in basket is 56?

Sol: The order of input does not matter.

a) 5 (because 56 and 89 are different)

b) 1 (because 75 and 75 are the same)
c) 5 (because 56 and 89 are different)
3) Describe what the LMC program in question (1) does. Suppose the contents of mailbox 17 = 5; contents
of mailbox 18 = 1.

Sol: This program displays to the out basket "5" if the inputs are different, and a “1” if they are
same; the order of input does not matter.
4) Refer to the LMC program below and the table of op codes given above.
a) What is the first number placed in the out basket?
b) What is the last number placed in the out basket?

Mailbox Contents
00 517
01 218
02 902
03 705
04 601
05 000
……………..
17 100 DAT
18 2 DAT
Sol:
a) 98
b) 0
5) Refer to the LMC program in question (4). Change DAT in mailbox 18 to 4.
a) What is the first number placed in the out basket?
b) What is the last number placed in the out basket?
Sol:
a) 96
b) 0
6) Describe what the LMC program in question (4) does.

Sol: This program displays even numbers to the out basket counting backwards from 98. The first
number displayed is 98, and the last number displayed is 0.
7) Refer to the LMC program below. Write down what the calculator will hold after the instruction is
complete in each loop. The first one is completed as an example.
Mailbox Contents Calculator after instruction is complete
Loop1 Loop2 Loop3 Loop4
00 517 1 2 3 4
01 118
02 317
03 219
04 710
05 600
……………..
17 1 DAT
18 1 DAT
19 5 DAT

Sol:

Mailbox Contents Calculator after instruction is complete

Loop1 Loop2 Loop3 Loop4
00 517 1 2 3 4
01 118 2 3 4 5
02 317 2 3 4 5
03 219 -3 -2 -1 0
04 710 -3 -2 -1 0
05 600 -3 -2 -1 NA
……………..
17 1 DAT
18 1 DAT
19 5 DAT
8) Refer to the LMC program in question (7). How did the contents of mailboxes 17-19 change for each
loop?

Sol: The content of address 17 goes: 2-3-4-5. The others don’t change.
9) What instruction should be placed in mailbox 02 so the program loops 4 times? Refer to the table of op
codes above.

Mailbox Contents
00 517
01 218
02 ???
03 317
04 902
05 600
06 000
……………..
17 10
18 2

Sol: The contents of address 02 should be 706 to loop 4 times.

10) Describe what the following LMC program does. Refer to the table of op codes above.

Mailbox Contents
00 901
01 309
02 207
03 902
04 708
05 602
06 000
07 1
08 000
09 DAT

Sol: The program gets a number from the user. It then loops by that number displaying the loop
count to the out basket each time. Example: in basket 4: Display to out basket: 3 – 2 – 1– 0.
11) The contents in memory occasionally have to be moved to another area of memory. When that happens,
the mailbox references must be adjusted so that the program continues to function properly. Rewrite the
LMC code in problem (10) so that it occupies mailboxes 05 through 14 only; mailboxes 01 through 04 will
be used by another program, so they can't be used. Assume that instruction 605 remains in mailbox 00.

Mailbox Contents
00 605
01 used by other program
02 used by other program
03 used by other program
04 used by other program
05 ???
06 ???
07 ???
08 ???
09 ???
10 ???
11 ???
12 ???
13 ???
14 ???
Sol:

Mailbox Contents
00 605
01 used by other program
02 used by other program
03 used by other program
04 used by other program
05 901
06 314
07 212
08 902
09 713
10 606
11 000
12 1
13 000
14 DAT
12) Describe the LMC three-digit instruction format. How does the LMC know what part of the value is an
instruction, and what part is an address?

Sol: The format of an instruction takes the form XYY

Where X is the op code (0-9) and YY is the address (00-99).
There is no op code X=4.

The LMC only has to check the first digit for the opcode; the remaining 2 digits are an address.
13) How does the LMC "know" if a particular mailbox contains data or instructions?

Sol: LMC does not know if the value in a mailbox is an instruction or not. The first instruction
location is 00 and the next is determined by the program counter. If the LMC happens upon a
memory value that wasn’t intended to be an instruction, the LMC would try to execute it.
Alternatively, if the program counter points to a particular mailbox, it is assumed to contain an
instruction, not data.
14) What happens if the LMC is executing a program and never encounters a "HALT" command?

Sol: The program will continue to execute until it encounters a location that contains “000” (the
HALT instruction, even it it’s data) or a location that begins with a 4, which is an invalid operation
code. This assumes that incrementing the program counter past 99 returns it to zero.
15) Describe how the LMC is von Neumann architecture.

Sol: We need three things:

1) Memory holds both programs and data; this is known as the stored program concept. The stored
program concept allows programs to be changed easily.

Yes, LMC memory holds programs and data

2) Memory is addressed linearly; that is, there is a single sequential numeric address for each and
every memory location.

Yes, LMC memory is addressed linearly

3) Memory is addressed by the location number without regard to the data contained within.

Yes, LMC memory is addressed without regard for the contents.

Section 6.6 A Note Regarding Computer Architectures

Alternative answer:

1. The computer consists of a CPU and memory, with facility for input and output
2. The memory holds both instructions and data
3. The instructions are executed sequentially, that is, one at a time.
Solutions

Problem Answer Section in text / comments

1 d Section 6.2 Operation of the LMC
2 c Section 6.2 Operation of the LMC
3 b Section 6.2 Operation of the LMC
4 c Section 6.2 Operation of the LMC
5 d Section 6.2 Operation of the LMC
6 d Section 6.2 Operation of the LMC
7 a Section 6.2 Operation of the LMC
8 c Section 6.2 Operation of the LMC
9 d Section 6.2 Operation of the LMC
10 d Section 6.2 Operation of the LMC
11 c Section 6.2 Operation of the LMC
12 c Section 6.2 Operation of the LMC
13 d Section 6.2 Operation of the LMC
14 c Section 6.2 Operation of the LMC
15 c Section 6.4 An Extended Instruction Set
16 d Section 6.4 An Extended Instruction Set
17 c Section 6.4 An Extended Instruction Set
18 c Section 6.4 An Extended Instruction Set
19 b Section 6.5 The Instruction Cycle
20 d Section 6.5 The Instruction Cycle
21 a Multiple Sections 6.2, 6.4, 6.5
22 a Multiple Sections 6.2, 6.4, 6.5
23 a Multiple Sections 6.2, 6.4, 6.5
24 d Multiple Sections 6.2, 6.4, 6.5
25 d Multiple Sections 6.2, 6.4, 6.5
26 d Multiple Sections 6.2, 6.4, 6.5
27 d Multiple Sections 6.2, 6.4, 6.5
28 b Multiple Sections 6.2, 6.4, 6.5
29 c Multiple Sections 6.2, 6.4, 6.5
30 b Multiple Sections 6.2, 6.4, 6.5
31 d Multiple Sections 6.2, 6.4, 6.5
32 d Multiple Sections 6.2, 6.4, 6.5
33 b Multiple Sections 6.2, 6.4, 6.5
34 c Section 6.6 A Note Regarding Computer Architectures
35 a Section 6.6 A Note Regarding Computer Architectures
 Chapter 7 The CPU And Memory

1) The Little Man instruction set is based on a decimal number system; real computers encode instructions and
data using the
a) binary system.
b) Unicode system.
c) decimal system.
d) algebraic system.
2) The ALU and CU together are known as the
a) CPU.
b) instruction set.
c) program counter.
d) Memory Management Unit.
3) The area inside of the CPU that holds data temporarily and performs calculations is called the
a) accumulator.
b) program counter.
c) arithmetic logic unit.
d) Memory Management Unit.
4) The storage locations that are used for a particular defined purpose within the CPU are called
a) RAM.
b) storage.
c) the bus.
d) registers.
5) The 1-bit registers that are used to allow the computer to keep track of special conditions (like overflow or
power failure) are often called
a) flags.
b) loops.
c) the ALU.
d) I/O counters.
6) Loading the value zero into a register is called
a) inverting a register.
b) clearing a register.
c) dumping the register.
d) incrementing a register.
7) The register that holds the address of the memory location that needs to be accessed is called the
a) IR.
b) MAR.
c) MDR.
d) MBR.
8) The register that holds the current instruction is called the
a) IR.
b) PC.
c) LMC.
d) MBR.
9) The register that will hold the data value that is being transferred between the CPU and a particular memory
location is called the
a) PC.
b) ALU.
c) MAR.
d) MDR.
10) The mailboxes in the LMC model are the equivalent to a real computer's
a) CPU.
b) ports.
c) memory.
d) control unit.
11) Which of the following is NOT one of the three lines that control the memory cell?
a) Skew line
b) Address line
c) Read/write line
d) Activation line
12) If the Memory address register is 8 bits wide, the number of possible memory addresses is
a) 8
b) 16
c) 64
d) 256
13) Memory that retains its values when power is removed is called
a) DRAM.
b) SRAM.
c) volatile.
d) nonvolatile.
14) There would never be a reason for an address transfer from the ________ to another register within the CPU.
a) IR
b) PC
c) MAR
d) MDR
15) When the instruction being executed is to store data, the data will be transferred from another register in the
CPU to the _____, and from there it will be transferred into memory.
a) IR
b) PC
c) MAR
d) MDR
16) The different ways of establishing memory addresses within an instruction are called
a) MAR codes.
b) MDR codes.
c) addressing modes.
d) programmable modes.
17) Flash Memory
a) is volatile.
b) is faster than standard RAM.
c) has unlimited rewrite capacity.
d) is nonvolatile.
18) The first step in the instruction cycle is
a) clear the accumulator.
b) fetch the instruction from memory.
c) decode the instruction in the accumulator.
d) copy the data from the MAR to the MDR.
19) The physical connections that make it possible to transfer data from one location in the computer system to
another are called
a) flags.
b) fibers.
c) buses.
d) peripherals.
20) Optical conductors are
a) faster than electrical conductors.
b) cheaper than electrical conductors.
c) more common than electrical conductors.
d) all of the above.
21) A bus in which there is an individual line for each bit of data, address, and control is called a
a) wide bus.
b) serial bus.
c) parallel bus.
d) dedicated bus.
22) A bus that transfers data sequentially, one bit at a time using just a single line pair is called
a) a serial bus.
b) a single bus.
c) a narrow bus.
d) a sequential bus.
23) A bus line that is "one-way" is called
a) a simplex bus line.
b) a serial bus line.
c) a one-way bus line.
d) a sequential bus line.
24) A bus line that can carry data in both directions at the same time is called a
a) simplex bus line.
b) complex bus line.
c) full duplex bus line.
d) half duplex bus line.
25) The exposed connectors into which external cables can be plugged are often called
a) plugs.
b) lines.
c) ports.
d) stacks.
26) A bus that carries signals from a single specific source to a single specific destination is a(n)
a) simplex bus.
b) broadcast bus.
c) Ethernet bus.
d) point-to-point bus.
27) Virtually every bus internal to the CPU is
a) serial.
b) cables.
c) optical.
d) parallel.
28) Instructions that only the operating system can execute are called
a) system instructions.
b) executive instructions.
c) privileged instructions.
d) administrative instructions.
29) Programs that execute without privileges are said to execute
a) in user space.
b) in data mode.
c) in kernel space.
d) in privilege space.
30) Multimedia applications, like modifying an image, often use
a) PSW instructions.
b) Flash instructions.
c) MMD instructions.
d) SIMD instructions.
31) The sources and destinations of data for an instruction are known as
a) Op codes.
b) Operands.
c) Op registers.
d) Operation fields.
32) Increasing the number of bits available for the op code in an instruction word
a) increases the demand on the CPU.
b) increases the number of memory locations that can be addressed.
c) increases the number of instructions available in the instruction set.
d) has no impact on any of the above.
Discussion Questions
1) How are the registers in the CPU different from main memory?

Sol: From the text: “A register is a single, permanent storage location within the CPU used for a
particular, defined purpose. A register is used to hold a binary value temporarily for storage, for
manipulation, and/or for simple calculations. Note that each register is wired within the CPU to perform
its specific role. That is, unlike [main] memory, where every address is just like every other address, each
register serves a particular purpose. The register's size, the way it is wired, and even the operations that
take place in the register reflect the specific function that the register performs in the computer.”
Alternately: Register access is much faster, and there are far fewer registers than memory locations.
2) How does the computer keep track of special conditions such as arithmetic carry and overflow, power failure,
and internal computer error?

Sol: From the text “The control unit will also contain several 1-bit registers, sometimes known as flags,
that are used to allow the computer to keep track of special conditions such as arithmetic carry and
overflow, power failure, and internal computer error. Usually, several flags are grouped into one or more
status registers.”
3) What factor factor determines the maximum capacity of memory in a real computer?

Sol: The number of bits in the memory address register determines the maximum number of memory
locations that can be addressed.
4) Why is it necessary to store start-up program code in nonvolatile memory?

Sol: from the text “At least some of the program code used to start a computer must be present in a
nonvolatile segment of primary memory. (Otherwise there would be no program in memory to execute
when the computer is powered up!) This code is known as firmware.”
5) Why is flash memory not suitable for use as main memory?

Sol: from the text “[Flash memory] is generally considered unsuitable for primary memory because it is
not possible to write to a single memory location. Instead it is necessary to erase and rewrite a large block
of memory to make any changes in flash memory. The rewrite time is extremely slow compared to
standard RAM and the number of rewrites over the lifetime of flash memory is somewhat limited.”
6) Classify the registers as either a) holding addresses only, b) holding instructions only, or c) anything.

IR ____
PC ____
MAR ____
MDR ____
Accumulator ____
General Purpose ____

Sol:

IR (b) holding instructions only

PC (a) holding addresses only
MAR (a) holding addresses only
MDR (c) anything
Accumulator (c) anything
General Purpose (c) anything
7) What is the technique that real computers use to extend the address space beyond that of the address field in
an instruction?

Sol: From the text “…….one common method, consider a computer that can use one of the general-
purpose registers to hold an address. To find a memory location, the computer would use the value in
that register as a pointer to the address. Instead of an address field, the instruction needs only to indicate
which register contains the address. Using this technique, the addressing capability of the computer is
determined by the size of the register.”
8) What is skew?
Sol: The slight delay in arrival time on different lines as signals traverses a parallel bus.
9) What are “Arithmetic Shifts” commonly used for?
Sol: from the text “Arithmetic shift instructions are commonly used to multiply or divide the original
value by a power of 2.”
10) Explain pop and push operations on a stack.

Sol: A pop is when data comes off the stack and a push is when data is put in the stack. Stacks are used to
implement last-in, first-out structures.
11) Why are input/output instructions generally considered privileged instructions?

Sol: from the text: “Input/output instructions are generally privileged instructions because we do not
want input and output requests from different users and programs interfering with each other.”

To avoid interference, the OS handles the I/O requests.

12) What are different ways of characterizing a bus? In other words, what attributes do all buses have?

Sol: From the text “A bus can be characterized by the number of separate wires or optical conductors in
the bus; by its throughput, that is, the data transfer rate measured in bits per second; by the data width
(in bits) of the data being carried; by the number and type of attachments that the bus can support; by
the distance between the two end points; by the type of control required; by the defined purpose of the
bus; by the addressing capacity; by whether the lines on the bus are uniquely defined for a single type of
signal or shared; and by the various features and capabilities that the bus provides.”
13) Why is there no need for a subtract instruction?

Sol: Subtracting a number from another number is the same as changing the sign of the subtrahend and
adding. That is, 5-9 is the same as 5+(-9).

From the text: “Even the subtract instruction is theoretically not necessary, since we showed in Chapter 5
that integer subtraction is performed internally by the process of complementing and adding.”
14) Identify the implicit and explicit addresses in the Little Man instruction 531; recall that “5” is the op code
for the load instruction.

Sol: The instruction 531 is a load from mailbox 31 to the accumulator. The explicit address is 31 and the
accumulator is the implicit address.
15) What is an important disadvantage of variable length instructions?

Sol: From the text: “Variable length instructions complicate pipelining, because the starting point of the
new instruction is not known until the length of the previous instruction has been determined. If you
extend this idea to multiple instructions, you can see the difficulty of maintaining a smooth assembly line.
This issue is discussed in more detail in Chapter 8. Because pipelining has become so important to
processing speed in modern computers, the use of variable length instructions has fallen out of favor for
new CPU designs. Nearly all new CPU designs use fixed length instructions exclusively.”
Problem Answer Section in text / comments
1 a Section 7.0 Introduction
2 a Section 7.1 The Components of the CPU
3 c Section 7.1 The Components of the CPU
4 d Section 7.2 The Concept of Registers
5 a Section 7.2 The Concept of Registers
6 b Section 7.2 The Concept of Registers
7 b Section 7.2 The Concept of Registers
8 a Section 7.2 The Concept of Registers
9 d Section 7.2 The Concept of Registers
10 c Section 7.3 The Memory Unit
11 a Section 7.3 The Memory Unit
12 d Section 7.3 The Memory Unit
13 d Section 7.3 The Memory Unit
14 c Section 7.3 The Memory Unit
15 d Section 7.3 The Memory Unit
16 c Section 7.3 The Memory Unit
17 d Section 7.3 The Memory Unit
18 b Section 7.4 The Fetch-execute
19 c Section 7.5 Buses
20 a Section 7.5 Buses
21 c Section 7.5 Buses
22 a Section 7.5 Buses
23 a Section 7.5 Buses
24 c Section 7.5 Buses
25 c Section 7.5 Buses
26 d Section 7.5 Buses
27 d Section 7.5 Buses
28 c Section 7.6 Classification of Instructions
29 a Section 7.6 Classification of Instructions
30 d Section 7.6 Classification of Instructions
31 b Section 7.7 Instruction Word Formats
32 c Section 7.8 Instruction Word Requirements and Constraints
 Chapter 8: CPU and Memory Design Enhancement and Implementation

1) CPU architecture is defined by the basic characteristics and major features of the CPU. “CPU architecture” is
sometimes called
a) architecture design
b) structural organization
c) instruction set architecture
d) CPU design and organization
2) The use of fixed-length, fixed-format instruction words with the op code and address fields in the same
position for every instruction would allow instructions to be fetched and decoded
a) independently.
b) dependently and in parallel.
c) independently and in serial.
d) independently and in parallel.
3) There are several factors that determine the number of instructions that a computer can perform in a second.
Which of the following is NOT a factor?
a) Word size
b) Clock speed
c) Instruction format - fixed or variable
d) Number of steps required by each instruction type
4) The __________ must be designed to assure that each step of the instruction cycle has time to complete
before the results are required by the next step.
a) ALU
b) clock cycle
c) Control Unit
d) instruction pointer
5) The fetch unit portion of the CPU consists of an instruction fetch unit and an instruction ____________ unit.
a) decode
b) translate
c) decipher
d) conversion
6) The ___________ unit contains the arithmetic/logic unit and the portion of the control unit that identifies and
controls the steps that comprise the execution part for each different instruction.
a) fetch
b) decode
c) execution
d) conversion
7) Overlapping instructions—so that more than one instruction is being worked on at a time—is known as the
a) conveyor belt method.
b) pipelining method.
c) assembly line method.
d) accelerator method.
8) Instruction reordering makes it possible to provide parallel pipelines, with duplicate CPU logic, so that
multiple instructions can actually be executed
a) sequentially.
b) consecutively.
c) simultaneously.
d) very fast in serial operation.
9) Which of the following is not a specific execution unit?
a) steering unit
b) LOAD/STORE unit
c) integer arithmetic unit
d) floating point arithmetic unit
10) A(n) _____________ processor is one that can complete an instruction with each clock tick.
a) linear
d) direct
c) scalar
d) express
11) There are a number of difficult technical issues that must be resolved to make it possible to execute multiple
instructions simultaneously. One of the most important of these is
a) Instructions completing out of order.
b) Instructions that have floating point operations.
c) Instructions that can be serialized.
d) Instructions that require the same number of CPU cycles complete.
12) Out-of-order instruction execution can cause problems because a later instruction may depend on the results
from an earlier instruction. This situation is known as a __________ or a _______________.
b) risk, reliance
a) hazard, reliance
d) risk, dependency
c) hazard, dependency
13) CPUs can actually search ahead for instructions without apparent dependencies, to keep the execution units
busy. Current Intel x86 CPUs, can search ___________ instructions ahead, if necessary, to find instructions
available for execution.
a) five to ten
b) ten to twenty
c) twenty to thirty
d) fifty to one hundred
14) Branch instructions must always be processed ahead of subsequent instructions. Conditional branch
instructions are more difficult than unconditional branches. These types of dependencies are known as control
dependencies or sometimes as ______________ or branch dependencies.
a) flow
b) decision
c) qualified
d) provisional
15) Some systems provide a small amount of dedicated memory built into the CPU that maintains a record of
previous choices for each of several branch instructions that have been used in the program being executed to
aid in determining whether a branch is likely to be taken. What are the contents of this memory called?
a) look-ahead table
b) branch history table
c) branch prediction table
d) future speculation table
16) What are the slowest steps in the instruction fetch-execute cycle?
a) Slowest steps are those that require memory access.
b) Slowest steps involve incrementing the instruction pointer.
c) Slowest steps are those that require special integer register access.
d) Slowest steps are those that require floating point register access.
17)What is the major drawback of Dynamic RAM (DRAM)?
a) cost
b) capacity
c) data loss
d) memory latency
18) Which of the following is a commonly used approach for improving performance of memory?
a) Doubling the capacity of memory.
b) Using DRAM instead of SDRAM.
c) Compressing instructions and data in RAM.
d) Widening the system bus between memory and the CPU.
19) Another method for increasing the effective rate of memory access is to divide memory into parts, called,
_____________ so that it is possible to access more than one location at a time.
a) block separation
b) high-low separation
c) memory interleaving
d) wide-path separation
20) Each block of cache memory provides a small amount of storage, perhaps between 8 and 64 bytes, also
known as
a) a cache hit.
b) niche cache.
c) a cache line.
d) a small block cache.
21) What does "locality of reference" mean?
a) most memory references occur concurrently
b) most memory references will pull data of numeric type
c) most memory references will be accessed in a predictable order
d) most memory references are confined to one or a few small regions of memory
22) The locality of reference principal makes sense because most of the instructions being executed at a
particular time are
a) register-to-memory type instructions.
b) math and logical type instructions.
c) control and branch type instructions.
d) part of a small loop or a small procedure or function.
23) Cache memory hit ratios of ________ percent and above are common with just a small amount of cache.
a) 30
b) 60
c) 80
d) 90
24) When a cache miss occurs, however, there is a time delay while new data is moved to the cache. The time to
move data to the cache is called _____________ time.
a) stall
b) backup
c) write-through
d) cache back
25) Which of the following is most likely:
a) L1 cache has 32KB and L2 cache has 1MB
b) L1 cache has 1MB and L2 cache has 32KB
c) L1 cache has 32KB and L2 cache has 32KB
d) L1 cache has 1MB and L2 cache has 1MB
26) A part of main memory can be allocated to store several adjoining blocks of disk memory. If the requested
data is in _________ then no disk access is necessary.
a) disk cache
b) cache blocks
c) read once cache
d) buffer disk cache
27) Instructions, fetched from memory, are _____________within the instruction unit, to determine the type of
instruction that is being executed. This allows branch instructions to be passed quickly to the branch processing
unit for analysis of future instruction flow.
a) partially decoded
b) partially executed
c) completely decoded
d) completely executed
28) In a superscalar CPU, the instruction unit has a(n) ____ to hold instructions until the required type of
execution unit is available.
a) pipeline
b) assembly unit
c) instruction set
d) cache memory
29) Computers that have multiple CPUs within a single computer, sharing some or all of the system's memory
and I/O facilities, are called______________, or sometimes tightly coupled systems.
a) bundled systems
b) simultaneous systems
c) multiprocessor systems
d) compound processor systems
30) Under ideal conditions, each CPU processes its own assigned sequence of program instructions
a) independently of other CPUs.
b) partially sharing the workload with other CPUs.
c) without interrupting the other CPUs.
d) by sharing L1 cache between other CPUs.
31) Each CPU in the processor, within a single integrated chip, is called a ___________
a) core.
b) CPU unit.
c) control unit.
d) Independent Processor Chip (IPC).
32) Which of the following is not an advantage of adding more than one CPU processor within a single
integrated chip?
a) Relatively inexpensive.
b) Reduce resource conflicts.
c) Programs can be divided into independent pieces and run separately.
d) Reduces power consumption, heat, and stress but gives equivalent processing power.
33) What is a "thread"?
a) The same segment of code used by many programs.
b) Independent segments of programs available to be executed in parallel.
c) The set of all variables that are used by all programs in execution.
d) Shared allocation of cache memory used by programs available to be executed.
34) In Symmetrical Multiprocessing (SMP) each CPU has
a) identical access to memory.
b) identical access to the I/O and memory.
c) identical access to the operating system, I/O and memory
d) identical access to the operating system, and to all system resources, including memory.
35) Simultaneous thread multiprocessing (STM) is also known as ___________
a) hyperthreading.
b) superthreading
c) expert threading
d) concurrent threading
Chapter 8 Discussion Questions

1) What are common characteristics included in the instruction set architecture (ISA)?

Sol: From the text: “These characteristics include such things as the number and types of registers,
methods of addressing memory, and basic design and layout of the instruction set.”
2) What are three important CPU architectural families, today?

Sol: From the text: “At present, important CPU architectural families include the IBM mainframe series,
the Intel x86 family, the IBM POWER/PowerPC architecture, the ARM architecture, and the Oracle
SPARC family.”
3) Having large numbers of specialized instructions inhibited efficient organization of the CPU. Why?

Sol: From the text: “Specialized instructions were used rarely, but added hardware complexity to the
instruction decoder that slowed down execution of the other instructions that are used frequently.
4) What is the benefit of having fixed-length instructions over variable-length instructions?

Sol: From the text: “The use of fixed-length, fixed-format instruction words with the op code and address
fields in the same position for every instruction would allow instructions to be fetched and decoded
independently and in parallel. With variable-length instructions it is necessary to wait until the previous
instruction is decoded in order to establish its length and instruction format.”
5) Describe the technique called code-morphing.

Sol: From the text: “Furthermore, a technique called code-morphing can be used to translate complex
variable-width instruction words to simpler fixed-width internal equivalents for faster execution. This
technique allows the retention of legacy architectures while permitting the use of modern processing
methods. Modern x86 implementations use this approach.”
6) Summarize how separating the fetch-execution cycle into different fetch and execution units improves
performance.

Sol: From the text: “Implementation of the fetch-execute cycle is divided into two separate units: a fetch
unit to retrieve and decode instructions and an execution unit to perform the actual instruction
operation. This simple reorganization of the CU and ALU components allows independent, concurrent
operation of the two parts of the fetch-execute cycle.”
7) Summarize how pipelining improves performance.

Sol: From the text: “The model uses an assembly line technique called pipelining to allow overlapping
between the fetch-execute cycles of sequences of instructions. This reduces the average time needed to
complete an instruction.” Or “Pipelining allows several instructions to be ‘in flight’ at the same time.”
8) Summarize the performance benefits of using separate execution units for different types of instructions.

Sol: From the text: “The model provides separate execution units for different types of instructions. This
makes it possible to separate instructions with different numbers of execution steps for more efficient
processing. It also allows the parallel execution of unrelated instructions by directing each instruction to
its own execution unit.”
9) Do pipelining and superscalar processing techniques affect the number of clock cycles of any individual
instruction? Explain your answer.

Sol: No they do not. From the text: “It is important to remember that pipelining and superscalar
processing techniques do not affect the cycle time of any individual instruction. An instruction fetch-
execute cycle that requires six clock cycles from start to finish will require six clock cycles whether
instructions are performed one at a time or pipelined in parallel with a dozen other instructions. It is the
average instruction cycle time that is improved by performing some form of parallel execution.”
10) Superscalar processing complicates the design of a CPU considerably. There are a number of difficult
technical issues that must be resolved to make it possible to execute multiple instructions simultaneously. What
are the most important issues?

Sol: From the text:

Problems that arise from instructions completing out of order

Changes in program flow due to branch instructions
Conflicts for internal CPU resources, particularly general-purpose registers
11) How does the cache controller know when to use cache or go to main memory?

Sol: From the text: “Every CPU request to main memory, whether data or instruction, is seen first by
cache memory. A hardware cache controller checks the tags to determine if the memory location of the
request is presently stored within the cache.”
12) Caching recently used data and instructions is an important performance enhancement. Summarize the
benefits cache.

Sol: selected from the subsection on Cache Memory: Main memory access is fast, but still slower than
the speed of the CPU. By storing recently used data and instruction in cache, the time required to fulfill a
memory request is decreased, thereby increasing overall performance. This improvement is significant
because cache hit ratios are commonly over 90%.
13) If a cache block is altered, what methods are used to update main memory? Of the various methods, which
is faster?
Sol: from the text: “Two different methods of handling the process of returning changed data from cache
to main storage are in common use. The first method, write through, writes data back to the main
memory immediately upon change in the cache. This method has the advantage that the two copies, cache
and main memory, are always kept identical. Some designers use an alternative technique known
variously as store in, write back, or copy back. With this technique, the changed data is simply held in
cache until the cache line is to be replaced.”

Sol: from the text: “The write back method is faster…”

14) Summarize the principle of “locality of reference”?
Sol: From the text: “The locality of reference principle states that at any given time, most memory
references will be confined to one or a few small regions of memory.”
15) Increasing the number of CPUs is usually an effective way to improve performance although, as the number
of CPUs increases, the value of the additional CPUs diminishes. Why is that?

Sol: From the text: “…because of the overhead required to distribute the instructions in a useful way
among the different CPUs and the conflicts among the CPUs for shared resources, such as memory, I/O,
and access to the shared buses. With the exception of certain, specialized systems, there are rarely more
than sixteen CPUs sharing the workload in a multiprocessing computer; more commonly today, a
multiprocessor might consist of two, four, or eight core CPUs within a single chip.”
Solutions

Problem Answer Section in text / comments

1 c Section 8.1 CPU Architectures
2 d Section 8.1 CPU Architectures
3 a Section 8.1 CPU Architectures
4 a Section 8.2 CPU Features and Enhancements
5 c Section 8.2 CPU Features and Enhancements
6 b Section 8.2 CPU Features and Enhancements
7 c Section 8.2 CPU Features and Enhancements
8 c Section 8.2 CPU Features and Enhancements
9 a Section 8.2 CPU Features and Enhancements
10 c Section 8.2 CPU Features and Enhancements
11 a Section 8.2 CPU Features and Enhancements
12 c Section 8.2 CPU Features and Enhancements
13 b Section 8.2 CPU Features and Enhancements
14 a Section 8.2 CPU Features and Enhancements
15 b Section 8.2 CPU Features and Enhancements
16 a Section 8.3 Memory Enhancements
17 d Section 8.3 Memory Enhancements
18 d Section 8.3 Memory Enhancements
19 c Section 8.3 Memory Enhancements
20 c Section 8.3 Memory Enhancements
21 d Section 8.3 Memory Enhancements
22 d Section 8.3 Memory Enhancements
23 d Section 8.3 Memory Enhancements
24 a Section 8.3 Memory Enhancements
25 a Section 8.3 Memory Enhancements
26 a Section 8.3 Memory Enhancements
27 a Section 8.4 The Complete Modern Superscalar CPU
28 a Section 8.4 The Complete Modern Superscalar CPU
29 c Section 8.5 Multiprocessing
30 a Section 8.5 Multiprocessing
31 a Section 8.5 Multiprocessing
32 b Section 8.5 Multiprocessing
33 b Section 8.5 Multiprocessing
34 d Section 8.5 Multiprocessing
35 a Section 8.5 Multiprocessing
 Chapter 9 Input / Output
1) Which of the following is not a requirement for a computer system to handle I/O in a sufficient and effective
manner?
a) Peripheral devices must be individually addressable.
b) Peripheral devices must operate only in block mode.
c) Peripheral devices can initiate communication with the CPU.
d) Programmed I/O is suitable only for slow devices and individual word transfers.
2) An important difference between the I/O requirements of keyboards and disk drives is that
a) keyboard input is fast while disk drives are slow.
b) keyboards require constant monitoring, while disk drives do not.
c) disk drives have I/O controllers and keyboards do not have I/O controllers.
d) disk data is always transferred in blocks, never as individual bytes as with the keyboard.
3) From the perspective of a computer, the network
a) is just another I/O device.
b) requires an Ethernet connection.
c) is complex set of interconnected hosts.
d) is addressable only in blocks of 32 bit addresses.
4) The method used to communicate events that need special attention to the CPU are known as
a) interrupts.
b) I/O controllers.
c) programmed I/O.
d) device controllers.
5) The method of transferring data one word at a time from the CPU to a device is called
a) polling.
b) programmed I/O.
c) vectored interrupt.
d) direct memory access.
6) Computers provide interrupt capability by providing one or more special control lines to the central processor
known as
a) fault lines.
b) address lines.
c) interrupt lines.
d) instruction lines.
7) The program that determines the appropriate course of action in the event an interrupt occurs is called the
a) fault handler.
b) device handler.
c) interrupt handler.
d) instruction handler.
8) When an interrupt causes temporary suspension of the program in progress, all the pertinent information about
the program being suspended, including the location of the last instruction executed, and the values of data in
various registers are stored in an area of memory known as the
a) register dump block.
b) memory dump block.
c) program method block.
d) process control block.
9) After interrupting a program in execution, and saving the program’s context, the computer then branches to a
special program known as the
a) driver routine.
b) servicing program.
c) program service program.
d) interrupt handler program.
10)Since many interrupts exist to support I/O devices, most of the interrupt handling programs are also known as
a) device drivers.
b) device handlers.
c) peripheral handlers.
d) peripheral controllers.
11) The method of continuously checking the various input devices to determine if input data is waiting is called
a) polling.
b) observing.
c) monitoring.
d) supervising.
12) Which of the following is not a function of how interrupts are used?
a) A completion signal
b) An abnormal event indicator
c) A means of allocating CPU time
d) A way of buffering large amounts of data
13) Which of the following is an example of an interrupt being used as an external event notifier?
a) A keyboard input
b) A program inadvertently attempts to divide by zero
c) A time quantum has passed and the CPU is interrupted to start another task
d) An application program requests service from the operating system using a software interrupt
14) External events like keyboard input, mouse clicks, printer “out of paper” messages, and power failures are
handled by
a) interrupts.
b) device handlers.
c) peripheral controllers.
d) suspension subprograms.
15) The computer system provides an internal clock that sends an interrupt periodically to the CPU signaling that
it’s time to start processing another program or thread. The time between interrupt pulses is known as a(n)
a) delta.
b) quantum.
c) unit quantity.
d) atomic quantity.
16) Events related to problems or special conditions within the computer system itself, like divide by zero, or
attempting to execute a nonexistent op code, are called
a) irregular events.
b) unusual events.
c) abnormal events.
d) anomalous events.
17) Internal interrupts caused by events related to problems or special conditions within the computer itself are
sometimes called
a) exclusions.
b) exemptions.
c) special errors.
d) traps or exceptions.
18) Instructions that are intended for use by an operating system program, but not by an application program, are
called
a) control instructions
b) limited instructions
c) prevalent instructions
d) privileged instructions
19) The software interrupt is very similar to which type of instruction?
a) STORE
b) LOAD
c) IF-THEN-ELSE
d) SUBROUTINE JUMP
20) The mnemonic for the x86 architecture instruction that simulates an interrupt is
a) SVC.
b) INT.
c) JMP.
d) GTO.
21) One way to assure that multiple programs do not unintentionally alter another program's files or intermingle
printer output is to
a) only execute one interrupt at a time.
b) give programs in execution the highest priority.
c) not allow programs in execution to be interrupted.
d) require that all I/O to shared devices be handled by the operating system.
22) When the device generating the interrupt request identifies its address as part of the interrupt, it is called
a) polling interrupt.
b) discrete interrupt.
c) vectored interrupt.
d) monitoring interrupt.
23) Multiple interrupts can be handled by assigning _______ to each interrupt.
a) priorities
b) a time delay
c) queue levels
d) execution tickets
24) Power failures, internal time-sensitive events, or external events that are time sensitive will trigger interrupts
that are
a) low priority events.
b) high priority events.
c) dependent on the device generating the interrupt.
d) measured for time-to-complete and scheduled accordingly.
25) Interrupts that can be temporarily disabled by program instructions are called
a) variable.
b) maskable.
c) changeable.
d) transferable.
26) Interrupts that can never be temporarily disabled by program instructions are called
a) invariable.
b) unchangeable.
c) nonmaskable.
d) non-transferable.
27) Interrupts are normally checked
a) during the operation of the instruction cycle.
b) immediately, without regard to the instruction cycle.
c) simultaneously with the beginning of an execution cycle.
d) after one instruction is finished and before another begins.
28) An I/O technique that transfers block data directly between the I/O controller and computer memory, is
called
a) direct block access.
b) direct RAM access.
c) direct block transfers.
d) direct memory access.
29) Data from disks, and tapes, and flash memory are transferred only in
a) bits.
b) chunks of data.
c) blocks of data.
d) characters or bytes of data.
30) Which of the following is not one of the three primary conditions for direct memory access to take place?
a) The I/O device must have an internal buffer.
b) There must be a method to connect together the I/O interface and memory.
c) There must be a means to avoid conflict between the CPU and the I/O controller.
d) The I/O controller associated with the particular device must be capable of reading and writing to memory.
31) Four pieces of data must be provided to the I/O controller for a particular I/O device to initiate the DMA
transfer. Which of the following is not required?
a) The size of the block to be transferred.
b) The location of the data on the I/O device.
c) The length of time required to transfer the data.
d) The starting location of the block of data in memory.
32) The incompatibilities in speed between the various devices and the CPU make I/O synchronization difficult,
especially if there are multiple devices attempting to do I/O at the same time. To handle these problems data is
usually stored
a) in a buffer.
b) on the network.
c) on the disk drive.
d) in external storage.
33) I/O controllers that control a single type of device are often called
a) device controllers.
b) precision controllers.
c) peripheral controllers.
d) single-type controllers.
34) An I/O controller that is designed to control hard disks is called a
a) disk handler.
b) disk controller.
c) disk coordinator.
d) disk interrupt handler.
35) Which of the following is not a common function of an I/O disk controller?
a) The I/O disk controller manages main memory during the transfer.
b) The I/O disk controller recognizes messages addressed to it and accepts commands from the CPU.
c) The I/O disk controller has interrupt capability, which it uses to notify the CPU when the transfer is complete.
d) The I/O disk controller provides a buffer where the data from memory can be held until it can be transferred to
the disk.
Discussion questions

1) Why is it so important that the CPU be allowed to do other tasks while waiting for a particular I/O operation
to be completed? (Two or three sentences should be adequate to answer this question.)

Sol: The CPU is operating at much higher speeds than I/O operations. If the CPU waited for I/O
operations, this would be extremely inefficient.
2) What would happen if interrupts were checked and processed during the middle of an execution cycle instead
of after the execution cycle has completed? (Two or three sentences should be adequate to answer this question)
Sol: From the text: "Interrupts are normally checked at the completion of each instruction. That is,
interrupts are normally checked after one instruction is finished and before another begins. This assures
that conditions won't change in the middle of an instruction that would affect the instruction's execution."
3) Once a DMA transfer has been initiated, why is it important that data being transferred not be modified during
this period? (Two or three sentences should be adequate to answer this question)
Sol: From the text: "Once the DMA transfer has been initiated, the CPU is free to perform other
processing. Note, however, that the data being transferred should not be modified during this period, since
doing so can result in transfer errors, as well as processing errors."
4) Explain why it is better to have an I/O device initiate an interrupt to the CPU rather than the CPU monitor the
I/O device. (Two or three sentences should be adequate to answer this question)
Sol: Monitoring I/O devices is considered polling, which is inefficient for the CPU. By having the I/O
device initiate communication to the CPU through an interrupt, it frees the CPU to perform other tasks.
5) Suppose that the keyboard device stored keystrokes in a buffer until it was full then sent the entire buffer for
processing. What would be some adverse consequences? (Two or three sentences should be adequate to answer
this question)
Sol: Student responses could be more creative, but generally, if user input is expected by an application,
then the application would stall waiting for the buffer to fill up. If the user wanted to interrupt the
computer, as in typing "CONTROL-ALT-DEL," nothing would happen until the buffer was full.
6) Consider the steps required to write a block of data from a disk to memory. Outline the major sequence of I/O
events that must occur to make this possible. (There are three major steps)
Sol: Taken from the example in the text.
1) Four pieces of data are sent to disk controller: 1) the location of the block in memory; 2) the location
where the data is to be stored on disk; 3) the size of the block 4) and the direction of transfer: Write.
2) The I/O service program sends a “ready” message to the disk controller and the DMA transfer process
takes place.
3) After the transfer is complete, the disk controller sends an interrupt to the CPU signaling completion,
and the interrupt handler either returns control to the program that initiated the request or notifies the
operating system that the program can be resumed.
7) Suppose an application program has initiated a DMA transfer from an I/O device, why does the I/O device
controller interrupt the CPU when it's complete? (Two or three sentences should be adequate to answer this
question)
Sol: In DMA transfers, the CPU is performing other tasks while the data transfer takes place; the CPU is
unaware of when the data transfer has completed. The device controller has to notify the CPU when it's
done so the interrupt handler can return control to the application that initiated the request.
8) Describe how the computer uses interrupts to control the flow of data to the printer.
Sol: From the text: "The computer sends one block of data at a time to the printer. The size of the block
depends on the type of printer and the amount of memory installed in the printer. When the printer is
ready to accept more data, it sends an interrupt to the computer. This interrupt indicates that the printer
has completed printing the material previously received and is ready for more."
9) Discuss how writing a device driver for a hard disk would require an in-depth understanding of how the
hardware functions. Would you also need an in-depth understanding of the OS platform for which the device
was designed to function? (Recommend using over 100 words to adequately answer this question)
Sol: I/O controllers work at the CPU interface and the device interface. The I/O device controller must
understand the specific OS instructions for CPU interfacing tasks: accepting I/O commands from the
CPU, transferring data between the controller and the CPU or memory, and sending interrupts and status
information to the CPU. At the device interface, the I/O controller must be able to control the device, such
as moving the mechanical read/write head to the correct track in a disk drive, when to read or write data
on the track, and maintaining rotational speed of the disk. Thus, writing a device driver would require an
in-depth understanding of the OS and hardware.
10) How is an arithmetic overflow error or divide by zero error interrupt different than an interrupt from the hard
disk controller signaling that a data transfer has completed? (Three or four sentences are sufficient)
Sol: Arithmetic overflow or divide by zero errors are abnormal events and it may not be possible to
complete the program in execution. In that case, the OS attempts to gracefully recover from the error
through traps or exceptions. A hard disk controller interrupting the CPU to signal that a data transfer has
completed is used by the OS to resume control of the program requesting the data transfer and does not
create the possibility that the system is halted.
11) A program in execution generates an interrupt with low priority. Before that interrupt is handled, it generates
a high priority interrupt. Discuss how these two interrupts change the flow of execution from the start of the low
priority interrupt through the completion of interrupt handling for this sequence of interrupts. (Three or four
sentences are sufficient)
Sol: From the text: “This [multiple interrupt problem] leads to a hierarchy of interrupts, in which higher-
priority interrupts can interrupt other interrupts of lower priority, back and forth, eventually returning
control to the original program that was running.”
12) The system designer of a workstation computer wants to have enough interrupt codes (IRQs) to support 32
different interrupt lines, IRQ0 – IRQ31. How many bits are needed to address all the IRQs? Show your work and
how you arrived at the solution.
Sol: Without any control or synchronous bits, 2 to the 5th power equal 32. Therefore 5 bits are needed.
13) Suppose that all programs in a particular CPU are given 50 clock cycles to process before getting swapped
out for another program. Suppose also, that it takes 5 CPU clock cycles to swap out the process control block
(PCB) for a particular program and restore the next program’s PCB.

a) What percent of the CPU clock cycles are used for processing 100 programs? (Hint: calculate: Program clock
cycles / (Swap clock cycles + Program clock cycles)). Show your work and how you arrived at the solution.

Sol: Just to build the formula, look at 2 programs (n=2):

|<--------50cycles-------->|<--5cycles-->|<--------50cycles-------->|
|<--------Program------->|<--PCB----->|<-------- Program ----->|

Notice that the total number of clock cycles to swap out the PCB is (n-1)*(5), where n is the number of
programs.

Total number of Clock cycles to swap out the PCB = (n-1)* 5 = 1*5 = 5
Total number of Program clock cycles = n*50 = 2*50 = 100.

Percent of CPU clock cycles used for processing 2 programs = 100/(5 +100) = 100/105 or 95.2%

With the same reasoning, 100 programs will have

Total number Clock cycles to swap out the PCB = (n-1)* 5 = 99*5 = 495
Total number Program clock cycles = n*50 = 100*50 = 5000.

Percent of CPU clock cycles used for processing 100 programs = 5000/(495 +5000) = 91%
…………………………………………………………………………………………………………………
b) With the same conditions as above assume that each of the 100 programs has one and only one interrupt
lasting 25 clock cycles. What percent of the CPU clock cycles are used for processing 100 programs?
To get started, here is an example for 2 programs and 2 interrupts.

EXAMPLE: 2 programs and 2 interrupts:

Program one gets interrupted at the 42nd clock cycle (arbitrarily chosen), and the interrupt gets serviced leaving
8 clock cycles to be completed (8 +42 = 50 cycles):
|<--------42cycles-------->|<--5cycles-->|<---25cycles---->|<--5cycles-->|<----8cycles-------->|
|<--------Prog1 start----->|<----swap-->|<---interrupt---->|<--swap----->|<--Prog1 complete->|

After swapping program two into the CPU, program two gets interrupted at the 12th cycle (arbitrarily chosen),
and the interrupt gets serviced leaving 38 clock cycles (12 +38 = 50 cycles):

|<--5cycles-->|<---12cycles-->|<--5cycles-->|<---25cycles---->|<--5cycles-->|-------38cycles---->|
|<--swap--->|<---Prog2 start->|<----swap--->|<---interrupt---->|<--swap-->|<-Prog2 complete--->|

The total number of clock cycles used to swap out the PCB is 3n-1, where n is the number of programs.

Total number of Clock cycles to swap out the PCB = (3n-1)* 5 = 5*5 = 25
Total number of Program clock cycles = n*50 = 2*50 = 100.
Total number of Interrupt clock cycles = n*25 = 2*25 = 50.

Percent of CPU clock cycles used for processing 2 programs = 100/(25 +100+ 50) = 100/175 or 57.1%.

Now, calculate the percent of the CPU clock cycles are used for processing 100 programs were each program
gets interrupted only once.

Sol:
Total number of Clock cycles to swap out the PCB = (3n-1)* 5 = 299*5 = 1495
Total number of Program clock cycles = n*50 = 100*50 = 5000.
Total number of Interrupt clock cycles = n*25 = 100*25 = 2500.

Percent of CPU clock cycles used for processing 2 programs = 5000/(1495 +5000+ 2500) = 5000/8995 or
55.5%.

14) If my CPU runs at 4.0GHz, and on average takes 10 clock cycles to complete an instruction, how many
instructions will be completed in the time it takes to type "MY CPU IS RUNNING NOW"? Assume it takes 5
seconds to type the message. Show your work and how you arrived at the solution.
Sol: 4.0 G (cycles/sec) (1 instruction/10 cycles) (5 seconds) = 2,000,000,000 instructions
15) In terms of performance gains, what role does an I/O controller located inside the peripheral device perform?
(50 to 100 words should be sufficient to answer this question)
Sol: From text: "In general I/O controllers simplify the task of interfacing peripheral devices to a CPU.
I/O controllers offload a considerable amount of work from the CPU. They make it possible to control I/O
to a peripheral with a few simple I/O commands from the CPU. They support DMA, so that the CPU may
be free to perform other tasks. And, as we have already noted, device controllers provide the specialized
circuitry required to interface different types of peripherals to the computer." So, in short, I/O controllers
located inside the peripheral device allow the CPU to offload I/O tasks so the CPU can perform other
tasks, increasing the performance of the system.
Solutions

Problem Answer Section in text / comments

1 b 9.1 Characteristics of Typical I/O Devices
2 d 9.1 Characteristics of Typical I/O Devices
3 a 9.1 Characteristics of Typical I/O Devices
4 a 9.0 Introduction
5 b 9.2 Programmed I/O
6 c 9.3 Interrupts
7 c 9.3 Interrupts
8 d 9.3 Interrupts
9 d 9.3 Interrupts
10 a 9.3 Interrupts
11 a 9.3 Interrupts
12 d 9.3 Interrupts
13 a 9.3 Interrupts
14 a 9.3 Interrupts
15 b 9.3 Interrupts
16 c 9.3 Interrupts
17 d 9.3 Interrupts
18 d 9.3 Interrupts
19 d 9.3 Interrupts
20 b 9.3 Interrupts
21 d 9.3 Interrupts
22 c 9.3 Interrupts
23 a 9.3 Interrupts
24 b 9.3 Interrupts
25 b 9.3 Interrupts
26 c 9.3 Interrupts
27 d 9.3 Interrupts
28 d 9.4 Direct Memory Access
29 c 9.4 Direct Memory Access
30 a 9.4 Direct Memory Access
31 c 9.4 Direct Memory Access
32 a 9.4 Direct Memory Access
33 a 9.4 Direct Memory Access
34 b 9.4 Direct Memory Access
35 a 9.4 Direct Memory Access
 Chapter 10 Computer Peripherals
1) All components comprising a computer system except for the ________ , are considered peripherals.
a) CPU
b) CPU and memory
c) CPU, memory, and power source
d) CPU, memory, disk drives and power source
2) Storage not immediately available to the CPU is referred to as
a) cloud storage.
b) off-line storage.
c) network storage.
d) secondary storage.
3) Most of the access time specified for secondary storage devices consists of
a) seek time.
b) latency time.
c) transfer time.
d) rotational delay.
4) In technical specifications for flash memory, the read/write block is called a
a) page.
b) lump.
c) chunk.
d) paragraph.
5) On a modern hard disk, what is the typical size of a block of data?
a) 64 bytes
b) 128 bytes
c) 512 bytes
d) 1024 bytes
6) With the hard drive read/write head in a fixed position, it traces out a circle on the disk surface as the disk
rotates; this circle is known as a
a) page.
b) block.
c) track.
d) cluster.
7) When a disk drive has multiple platters, the heads on each surface all line up. The set of tracks for all the
surfaces form a geometric shape similar to a
a) bottle.
b) ellipse.
c) sphere.
d) cylinder.
8) In a disk drive where the drive motor turns at constant angular velocity, which is true of the linear velocity?
a) inner tracks move the fastest
b) outer racks move the fastest
c) middle tracks move the fastest
d) all tracks move at the same speed
9) The time it takes for the hard-disk read/write head to move from one track to another is called
a) latency. .
b) seek time.
c) flight time.
d) arrival time.
10) Once the hard-disk read/write head is located over the desired track, the read/write operation must wait for
the disk to rotate to the beginning of the correct sector. This time is called
a) seek time.
b) arrival time.
c) transfer time.
d) rotational latency time.
11) The time required to transfer one block of data is called as the
a) seek time.
b) arrival time.
c) transfer time.
d) rotational latency time.
12) What system performance attribute is most increased by using a redundant array of independent disks
(RAID)?
a) System reliability
b) System accessibility
c) System serviceability
d) System maintainability
13) In a mirrored array with 4 disks, each of the disks stores exactly the same data. The access time for a
multiblock read is reduced by a factor of about ______.
a) two
b) four
c) eight
d) sixteen
14) A special fault-tolerant computer system uses an array of 3 disks. The following logic is used to detect
errors: If the data from all three disks is identical, then it is safe to assume that the integrity of the data is
acceptable. If the data from one disk differs from the other two, then accept the data where both match and flag
the other as an error. This logic is known as
a) disk logic.
b) majority logic.
c) difference logic.
d) greater-part logic.
15) A mirrored array requires a minimum of _________ disk drives.
a) two
b) three
c) four
d) five
16) The technique used for storage and retrieval in an LTO formatted data cartridge is called
a) data torrent.
b) LTO tasking.
c) data continuity.
d) data streaming.
17) In terms of the ability to see detail in a display, a more interesting measure of resolution is the
a) pixel count.
b) pixel density.
c) pixel intensity.
d) pixel concentration.
18) Displays that use 256 (Red) × 256 (Green) × 256 (Blue) different colors on the screen is sometimes
described as a
a) true color system.
b) virtual color system.
c) ultra high density system.
d) high density color system.
19) The number of bits used to represent colors in an image is known as
a) color depth.
b) color length.
c) color strength.
d) color intensity.
20) A proprietary standard, developed by Microsoft to render 2-D and 3-D objects is known as
a) OpenGL.
b) DirectX.
c) ActiveX.
d) OpenSource.
21) An International standard maintained by a non-profit consortium to render 2-D and 3-D objects is known as
a) OpenGL.
b) DirectX.
c) ActiveX.
d) OpenSource.
22) A key to the efficient operation of a GPU is the ability to dispatch instructions to the CPU cores in rapid
succession, a process commonly called
a) flowing.
b) cramming.
c) smoothing.
d) streaming.
23) _________ is a standard GPU programming interface for general-purpose parallel programming that is
implemented on a number of GPUs from different vendors.
a) OpenX
b) DirectX
c) OpenCL
d) ActiveX
24) With the exception of the Cell Engine, current GPUs are generally based on maximizing the number of
operations that can take place at the same time, or ______________.
a) serialization
b) concurrency
c) parallelization
d) synchronization
25) One of the main disadvantages of active matrix LCDs is that they
a) consume a lot of power.
b) have poor viewing angles.
c) are expensive and difficult to manufacture.
d) are lower quality than a passive matrix display.
26) Which display technology consists of a thin display panel that contains red, green, and blue LEDs for each
pixel with transistors for each LED that generate electrical current to light the LED?
a) CRT
b) LCD
c) FED
d) OLED
27) Which of the following printing technologies was derived from xerography?
a) LED printers
b) Laser printers
c) Ink-jet printers
d) Impact printers
28) Which of the following printing technologies boils ink in a nozzle to spray a tiny droplet onto the paper?
a) LED printers
b) Laser printers
c) Ink-jet printers
d) Impact printers
29) When a key is pressed on the keyboard, a binary code called a(n) ______ is sent to the controller.
a) octal code
b) scan code
c) check code
d) ASCII code
30) What kind of data is represented by a bar code?
a) BCD
b) Numeric
c) Alphabetic
d) Alphanumeric
31) How does Quick Response software isolate the Quick Response (QR) code from other parts of an image?
a) QR software compares images to a list of known images.
b) QR software uses 2D mapping technology to read the QR code.
c) QR software requires the image capture device be perpendicular to the QR code.
d) QR software positions and sizes the image with the aid of large squares in three corners and a smaller
square set in from the fourth corner.
32) With voice input data, the translation process requires the conversion of voice data into sound patterns
known as
a) phonemes.
b) sound bytes.
c) sound slices.
d) part-of-speech.
33) The technology necessary to interpret audio data as voice input and to translate the data into alphanumeric
form has improved in recent years. The translation process is aided by
a) Pulse Code Modulation (PCM) techniques that replace less precise analog modulation.
b) Improvements in digitizing audio data that arose from advances in recorded music.
c) Having the user pause between words to eliminate problems of continuous speech.
d) Pronunciation rules, grammar rules, and a dictionary of a particular language.
34) The capability of Smartphones to communicate with low power radio-frequency magnetic fields in close
proximity with similar components is called
a) local field communications.
b) near field communications.
c) narrow field communications
d) close proximity communications.
35) It is impossible to overemphasize the fact that, from the perspective of a computer, a network is
a) simply another I/O device.
b) just another hardware component.
c) the only device without a controller.
d) handled differently than all other I/O devices.
36) Protocols that describe a computer’s communication with the physical layer network are called
a) LAN access control protocols
b) shared access control protocols
c) medium access control protocols
d) medium admission control protocols
Discussion questions

1) What two types of memory are referred to as primary memory? (A single sentence answer will suffice)

Sol: From the text: "Both conventional and cache memory are referred to as primary memory."
2) List four or more benefits of flash memory compared to a hard drive.

Sol: From the text there are at least five benefits:

1) Small size
2) Low power consumption
3) Light weight
4) Usable for tablets, smart phones, and other mobile devices (music players and digital cameras).
5) Convenient for moving files and data from one machine to another and also serve as an inexpensive
and convenient backup medium.
3) What are the barriers that Solid-State Drives (SSD) must overcome in order to supplant magnetic disk drives
as the long-term storage device of choice?

Sol: The barriers are cost and capacity. From the text, " Although magnetic disk storage offers huge
storage capacity at extremely low cost, the capacity of SSDs is continually expanding, and the cost falling,
suggesting that SSDs may replace magnetic disk storage for many, if not most, applications within the
next few years."
4) Explain what is meant by wear-leveling in Flash drives?

Sol: Wear-leveling is a technique that is designed to extend the life of a flash memory device. According
to the text "most failures in flash memory result from erase operations." Furthermore, from the text:
control logic, within the flash memory chip, manages memory space allocation and attempts to distribute
the write operations evenly over the entire space to minimize the number of erasures required. 5) What is
the capacity of a hard drive (in GB) consisting of 120,000 tracks, 4,000 sectors, and 4 surfaces? Assume each
block has 512 bytes.
Sol: On one surface, the size is 120,000 x 4,000 x 512 bytes = 245,760,000,000 bytes
Convert to GB: 245,760,000,000 bytes per surface *(1G / 2^30 bytes) = 228.9 GB per surface
Total capacity of drive is [4 surfaces] * [228.9 GB / surface] = 916 GB
6) If three mirrored drives are used in a fault-tolerant system, describe how majority logic is used to decide if
the integrity of the data is usable.

Sol: From the text: "If the data from all three disks is identical, then it is safe to assume that the integrity
of the data is acceptable. If the data from one disk differs from the other two, then the majority data is
used, and the third disk is flagged as an error."
7) What is the average rotational latency of a hard drive rotating at 7,200 RPM or 120 revolutions per second?
(Give your answer in milliseconds)
1 1
Sol: Formula from text: average latency time = ---------- x ----------------------------
2 rotation speed

Change rotational speed to revolution per sec: 7200 rev/min x [1 min / 60 sec] = 120 rev/sec

1 1
Average latency time = ---------- x ------------------ = 0.004167 sec or 4.167 ms
2 120 rev/sec

8) What is the transfer time for a hard drive rotating at 7,200 RPM or 120 revolutions per second? Assume there
are 30 sectors per track. (Give your answer in milliseconds)
1
Sol: From formula in text: Transfer time = --------------------------------------------
Number of sectors x rotational speed

1 1
Transfer time = --------------------- x ----------------------- = .000278 sec or .278 ms
30 sector/track 120 rev/sec

9) Label these definitions with the correct names:

a) The time it takes the read/write head to move to the correct track is_____________
b) Since the distance between the two tracks is variable, the ___________________ is used as a specification
for the disk.
c) Once the read/write head is over the correct track, the read/write head must wait for the disk to rotate to the
beginning of the sector. This time is referred to as the___________
d) Since the time the read/write head waits for the correct block varies, the _________________ is used as a
measure.
e) Once the read/write head is over the correct sector, the time required to transfer the block is called the
_________________.

Sol:
a) seek time
b) average seek time
c) rotational latency or rotational delay or latency time
d) average rotational latency
e) transfer time
10) Explain how a mirrored array, consisting of 4 disk drives, would be approximately 4 times faster during a
multiblock read.

Sol: From the text: "In a mirrored array, each disk stores exactly the same data. During reads, alternate
blocks of the data are read from different drives, then combined to reassemble the original data. Thus,
the access time for a multiblock read is reduced approximately by a factor equal to the number of disk
drives in the array."
11) For a display of 1920 pixels by 1080 pixels at 16 bits per pixel how much memory, in megabytes, is needed
to store the image?

Sol: 1920 * 1080 = 2,073,600 pixels

2,073,600 pixels * 2bytes/pixel = 4,147,200 bytes
Convert to megabytes: 4,147,200 bytes (1 MB / 1048576 bytes) = 3.955MB
Where 1 MB = 2^20 B = 1,048,576
12) Describe the difference between active matrix display and passive matrix display in a liquid crystal display
(LCD) monitor. Which results in a brighter picture?

Sol: From the text: "In an active matrix display, the display panel contains one transistor for each cell in
the matrix. This guarantees that each cell will receive a strong charge, but is also expensive and difficult
to manufacture."
In a passive matrix display, a single transistor is used for each row and column of the matrix and
activates each cell, one at a time, repetitively, using a scan pattern.
The active matrix display is brighter.
13) How do QR codes differ from a one-dimensional barcode?

Sol: From the text: "Bar codes are read optically using a device called a wand that converts a visual scan
of the code into electrical binary signals that a bar code translation module can read. The module
translates the binary input into a sequence of number codes, one code per digit, that can then be input
into the computer."

From the text: "QR (Quick Response) codes are two dimensional codes, similar to bar codes, but with
larger data capacity. QR codes are read with a camera. They have achieved widespread use because they
are readily captured with mobile devices."

14) Using the Internet as a research tool, give an overview of how pressure-sensitive (resistive film) touch
screens work (about 50 to 100 words). Provide URL, Author (if available) and date accessed.

Sol: URLs will vary, but here is one description: (No Author, 2011), "How can a screen sense touch? A
basic understanding of touch panels." Retrieved November 2, 2013 from
http://www.eizo.com/global/library/basics/basic_understanding_of_touch_panel/

Touch screen monitors using pressure-sensitive technology use "a glass screen and a film screen
separated by a narrow gap, each with a transparent electrode film (electrode layer) attached." As a
finger or stylus touches the outer glass it comes into contact with the thin film below causing a flow of
||||||||||||||ZW2\current and the location is identified. "The point of contact is identified by detecting this
change in voltage."
15) Commercial cloud services can be used as a storage provider for data and programs needed by a company.
Use the Internet as a research tool and give three descriptions of personal or commercial cloud services that can
be used as a storage provider. Provide the author (if possible), URL, and the date you accessed the website. The
descriptions should be about 3 to 4 sentences each.

Sol: URLs will likely be different, but here are three examples:

1. Google Cloud Platform, https://cloud.google.com/products/cloud-storage, accessed November 2, 2013.

No author given.
Description: Google's cloud storage advertises "Store, access and manage your data on Google’s storage
infrastructure." Google offer's a) fast data access, b) reliable infrastructure and c) unlimited storage. The
caveat about unlimited storage was that after an account was created, there was a step to enable 'billing.'
It was undetermined how much the service costs.

2. Amazon Cloud Drive, http://www.amazon.com/gp/feature.html/ref=cd_def/184-8700987-

4696248?ie=UTF8&*Version*=1&*entries*=0&docId=1000828861, accessed November 2, 2013. No
author given.
Description: Amazon Cloud Drive, offers to "Put your important files in Cloud Drive and access them
from any of your computers, your Kindle Fire, or online. Get started using your 5 GB of free storage by
installing Cloud Drive for Windows and Mac." This interface looked easier than Google's cloud storage,
with existing folders on left side of the page, and icons to upload files, documents, pictures and videos.
Paid plans were available for 20GB to 1000 GB.

3. Box, https://www.box.com/home/, accessed November 2, 2013. No author given.

Description: Free cloud storage for 5GB and additional storage of 25GB for $9.99/month; 50GB,
$19.99/month. There were also business and enterprise level accounts. Box claims they provide SSL AES
256-bit encryption behind the firewall. There were some size limits for free accounts. And, Box says they
"[allow] document editing in the cloud through third-party apps, such as Zoho."
Solutions
Problem Answer Section in text / comments
1 c Section 10.0 Introduction
2 d Section 10.1 The Hierarchy of Storage
3 a Section 10.1 The Hierarchy of Storage
4 a Section 10.1 The Hierarchy of Storage
5 c Section 10.3 Magnetic Disks
6 c Section 10.3 Magnetic Disks
7 d Section 10.3 Magnetic Disks
8 b Section 10.3 Magnetic Disks
9 b Section 10.3 Magnetic Disks
10 d Section 10.3 Magnetic Disks
11 c Section 10.3 Magnetic Disks
12 a Section 10.3 Magnetic Disks
13 b Section 10.3 Magnetic Disks
14 b Section 10.3 Magnetic Disks
15 a Section 10.3 Magnetic Disks
16 d Section 10.5 Magnetic Tape
17 b Section 10.6 Displays
18 a Section 10.6 Displays
19 a Section 10.6 Displays
20 b Section 10.6 Displays
21 a Section 10.6 Displays
22 d Section 10.6 Displays
23 c Section 10.6 Displays
24 c Section 10.6 Displays
25 c Section 10.6 Displays
26 d Section 10.6 Displays
27 b Section 10.7 Printers
28 c Section 10.7 Printers
29 b Section 10.8 User Input Devices
30 d Section 10.8 User Input Devices
31 d Section 10.8 User Input Devices
32 a Section 10.8 User Input Devices
33 d Section 10.8 User Input Devices
34 b Section 10.8 User Input Devices
35 a Section 10.8 User Input Devices
36 c Section 10.9 Network Communication Devices