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DC MCQ'S

SPPU E&TC Second Year Engineering

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Sheetal Waghchaware
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30 views4 pages

DC MCQ'S

SPPU E&TC Second Year Engineering

Uploaded by

Sheetal Waghchaware
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Shalaka Foundation’s

KEYSTONE SCHOOL OF ENGINEERING


Near Handewadi Chowk, UruliDevachi, Pune – 412308
Ph: 020 - 6400 2600/3200
Email: foundation@shalaka.org Web: www.shalakafoundation.com
Approved by AICTE, Government of Maharashtra & Affiliated to University of Pune

Department: E&TC Sem:II Academic Year:2022-23 Class: SE


Course: Digital Circuits Course Co-ordinator: Prof. Sheetal Waghchaware
Multiple Choice Questions

1. What is Digital Electronics?


a) Field of electronics involving the study of digital signal
b) Engineering of devices that digital signal
c) Engineering of devices that produce digital signal
d) All pf the mentioned

2. The combinational logic circuits and sequential circuits are type of


_____________ circuits?
a)Analog
b)Digital
c)Both a&b
d)None of the above

3. _______________ gates are required to build a half adder?

a) EX-OR
b) AND
c) NOR
d) None of the above

4.What are the advantages of static RAM?


a) High-speed
b) High power consumption
c) Low density and capacity
d) All of the above

5. Which of the following options comes under the non – saturated logic family in
Digital Electronics?
a) Emitter – coupled Logic
b) High-Threshold Logic
c) Integrated – injection Logic
d) Diode – Transistor Logic

6. Which gates in Digital Circuits are required to convert a NOR-based SR latch to


an SR flip-flop?

a) Two 2 input AND gates


b) Two 3 input AND gates
c) Two 2 input OR gates
d) Two 3 input OR gates

7. What are the basic gates in MOS logic family?

a) NAND and NOR


b) AND and OR
c) NAND and OR
d) AND and

8. In _____________ digital circuit, the output depends on present state and present
input of the circuit?
a) Combinational
b) Sequential
c) Both a and b
d) None of the above

9. How many outputs do full adder logic circuits will have?


a)One
b)Two
c)Three
d)Four

10. The two’s compliment of 11001011 is ______________


a) 11110101
b) 00110101
c) 00110000
d) 00110100

11. Which one of the following complements is used for arithmetic operations?
a)1’s compliment
b)10’s compliment
c)2’s compliment
d)9’s compliment

12. What is the standard form of DLP?


a) Dual in Long Packages
b) Dual in Line Packages
c) Double in Long Packages
d) None of the above

13. Which of the following gives the correct number of multiplexers required to build
a 32 x 1 multiplexer?
a) Two 16 x 1 mux
b) Three 8 x 1 mux
c) Two 8 x 1 mux
d) Three 16 x 1 mux

14. Which of these flip – flops cannot be used to construct a serial shift register?
a) D – flip flop
b) SR flip – flop
c) T flip – flop
d) JK flip – flop

15. Which of the following codes is a sequential code?


a) 8421 code
b) 2421 code
c) 5421 code
d) 2441 code

16. What is the standard form of CMOS?


a) Continuous Metal Oxide Semiconductor
b) Complex Metal Oxide Semiconductor
c) Complementary Metal Oxide Semiconductor
d) None of the above
17. The complementary metal-oxide-semiconductor technology is used in
___________
a) Microprocessor
b) Digital logic
c) Both a and b
d) None of the above

ANSWER = 1. D
2. B
3. A
4. D
5. A
6. A
7. A
8. B
9. B
10. B
11. C
12. B
13. A
14. C
15. A
16. C
17. C

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